Tesla’s Shanghai factory has reportedly initiated layoffs among its battery assembly workforce. Industry sources suggest that the majority of the layoffs will affect employees in the first phase of battery assembly, with the reduction expected to exceed 50%. While most of the affected individuals will be offered compensation through negotiations, a small number will be reassigned to other positions. Additionally, the equipment in the first phase of battery assembly will either be dismantled or relocated.

From a production capacity standpoint, Tesla’s Shanghai factory currently operates at a capacity of approximately 100,000 vehicles per month. In order to maintain product scarcity and brand image, the output is expected to be controlled within the range of 75% to 85%.

According to TrendForce’s understanding, the layoffs in the first phase of battery assembly are expected to be related to US government policies. The US government has imposed restrictions on subsidizing batteries imported from China and requires the use of locally manufactured batteries. As a result, export orders for batteries from Tesla’s Shanghai factory have been cut, leading to excess production capacity. Tesla, known for its efficiency-driven corporate culture, is intolerant of resource wastage.

On another note, the reduction in capacity and production volume of the first phase of battery assembly by Tesla may indicate preparations for transferring some of the capacity to the United States. By completing the battery pack manufacturing process in the United States, Tesla aims to increase the proportion of the value chain related to battery production in the US, in order to qualify for the full subsidy of USD 7,500 per vehicle in the United States.

(Photo credit: Tesla)

According to sources cited by Nikkan Kogyo Shimbun, TSMC intends to commence the construction of the second fab in Kikuyo-cho, Kumamoto Prefecture, Japan, in April 2024, with the goal of commencing production before the end of 2026.

It is worth mentioning that news about TSMC’s plan to build its second fab in Japan had already surfaced earlier this year. In January, TSMC’s CEO, CC Wei, revealed that the company was considering establishing a second chip manufacturing facility in Japan. In June, TSMC’s Chairman, Mark Liu, also mentioned during a shareholders’ meeting that the Japanese government expressed a desire for TSMC to continue expanding its investments in Japan, while TSMC was still evaluating the construction of the second fab in the country.

Regarding TSMC’s establishment of a fab in Japan, TrendForce indicated that TSMC has played an instrumental role in fostering the growth of Japan’s semiconductor industry as Japanese fabs are unable to handle manufacturing processes as advanced as 1Xnm. TrendForce posits that TSMC could potentially consider setting up a 7nm production line in Phase 2 of JASM to cater to Japan’s demand for advanced technology. Yet, the ongoing market slowdown necessitates a long-term appraisal before implementing any expansion strategies.

In addition to TSMC, more than 20 new wafer fabs are scheduled for completion in the coming years, despite the industry being in a downturn. According to TrendForce’s statistics report in January this year, there are over 20 planned new wafer fabs worldwide, including 5 in Taiwan, 5 in the United States, 6 in Mainland China, 4 in Europe, and 4 in Japan, South Korea, and Singapore combined.

Furthermore, numerous new wafer fab projects have been announced globally since the beginning of this year. For example, in February, Infineon and Texas Instruments both announced plans to construct new wafer fabs. Infineon plans to invest 5 billion euros to build a 12-inch wafer fab in Germany, while Texas Instruments intends to establish its second 300mm wafer fab in Lehi, Utah, USA. On July 5th, PSMC signed an agreement with SBI of Japan, proposing the establishment of a 12-inch wafer foundry.

Currently, semiconductor resources have become strategic assets. In addition to considering commercial and cost structures, wafer fabs must also account for government subsidy policies, meet customer demands for local production, and maintain supply-demand balance. TrendForce believes that future product diversity and pricing strategies will be key factors for the operation of wafer fabs.

TrendForce has released the latest spot prices of memory, which have continued to decline due to the impact of the stagnant market conditions. Both DRAM and NAND Flash spot prices have dropped further. The details are as follows:

DRAM Spot Market:

Compared with last week, the spot market is still not showing a noticeable improvement in terms of trading activities. Sellers are under a certain amount of pressure because some module houses have already stocked up in advance, and the demand from channels remains fairly weak. Hence, spot prices of DDR4 and DDR5 products continue to register daily drops. The average spot price of the mainstream chips (i.e., DDR4 1Gx8 2666MT/s) fell by 0.27% from US$1.501 last week to US$1.497 this week.

NAND Flash Spot Market:

There has been no apparent WoW improvement to the dynamics of the NAND Flash spot market this week. Several module houses, having elevated their inventory in advance, are now experiencing a certain extent of sales pressure from a lack of betterment in demand among channel markets, which led to an on-going drop of NAND Flash prices. 512Gb TLC wafer spots have dropped by 0.28% this week, arriving at US$1.404.

From foundational propulsion systems to cutting-edge autonomous driving, new technologies in modern electric vehicles(EVs) are increasingly leaning on advanced PCBs.

In a state-of-the-art electric vehicle, chips on PCB control a broad range of functions from safety alerts to convenience systems. As additional components like communication, camera, sensor, and battery charging modules join the network, the collective value of PCB is set to rise dramatically.

TrendForce’s study suggests that electric vehicle penetration was at 18% of the global vehicle sales of 80.98 million in 2022. By 2026, it’s estimated to climb to 41% of 92.85 million global vehicle sales. This surge is expected to propel automotive PCB production value from $9.2 billion in 2022 to $14.5 billion in 2026, a 12% CAGR.

Notably, it’s not just quantity but also the average value per vehicle that’s seeing significant growth in PCB use. The rising battery capacity continues to drive PCB usage growth. The average PCB value for an all-electric vehicle is estimated to be a hefty 5 to 6 times that of a traditional gas-powered car. Key contributors to this are Battery Management Systems (BMS) and autonomous driving systems, which are greatly enhancing the overall worth of automotive PCBs.

BMS Embraces FPC as Standard

The electric control system, which makes up over half the value of a vehicle’s PCB, is now experiencing a technical transformation. One of the significant factors affecting the widespread adoption of EVs has been ‘range anxiety.’ Beyond enhancing battery energy density and increasing charging infrastructure, there’s a critical objective to lighten vehicles.

This focus is particularly relevant to the battery, which comprises a third of an electric vehicle’s weight.

In the key BMS systems, the use of FPCs (Flexible Printed Circuits) to replace traditional wiring harnesses is considered a major solution, mainly because FPCs reduce weight and space usage by more than 50% compared to harnesses and also perform better in terms of heat dissipation and design flexibility.

Based on a rough estimate, a mainstream vehicle battery pack requires 7 to 12 battery modules, each including 1 to 2 FPCs, putting the overall value of FPCs at approximately $60 to $210.

Currently, FPCs have a penetration rate of about 20% in BMS. However, as major automotive battery manufacturers like Tesla, CATL, and BYD continue to adopt and set FPCs as the mainstream specification, it is expected that by 2026, the proportion of FPC usage will reach 80%, further enhancing the PCB value content in the electrical control system.

Autonomous Vehicles to Fuel the HDI Demand

Advancements in autonomous driving technology are leading to an increased need for PCBs due to the rise in in-vehicle cameras and radar. Key applications like millimeter-wave radars and LiDAR necessitate advanced PCBs as carriers.

It is said that Tesla may reintroduce millimeter-wave radar, highlighting that this technology remains an indispensable component of autonomous vehicles. The PCB layer count for mainstream 77GHz millimeter-wave radar reaches 8 layers, adopting high-frequency CCLs.

The precision of LiDAR is about ten times that of millimeter-wave radar, which allows for accurate 3D modeling of information about the external environment of the vehicle, hence it is mainly used in L3 and above-level vehicles.

LiDAR primarily uses HDI (High-Density Interconnector), with each LiDAR module requiring about 4 PCBs. Compared to traditional 4 to 8-layer in-vehicle PCBs, the price of HDI is more than three times higher.

For Level 3 and above autonomous systems fitted with LIDAR, the HDIs used can cost tens of dollars. Although LiDAR’s adoption rate is currently slow due to regulatory and technical barriers, its high value offers significant potential for related components.

Another emerging trend is the development of smart cockpits, which comprise the Cockpit Domain Controller (CDC), in-vehicle infotainment system, driver information display system, Head-Up Display (HUD), dashcam, and so on. As the functions become more complex, there is a need for PCBs with higher wiring density and narrower line width and spacing, which will further drive the demand for HDI boards.

In summary, the incorporation of high-value PCBs in both the BMS and autonomous driving systems is still in its infancy. As cars become more intelligent and aim to serve as a ‘third living space,’ we can expect more innovative applications in the automotive industry, thereby providing exciting opportunities for the PCB sector.

AI Chips and High-Performance Computing (HPC) have been continuously shaking up the entire supply chain, with CoWoS packaging technology being the latest area to experience the tremors.

In the previous piece, “HBM and 2.5D Packaging: the Essential Backbone Behind AI Server,” we discovered that the leading AI chip players, Nvidia and AMD, have been dedicated users of TSMC’s CoWoS technology. Much of the groundbreaking tech used in their flagship product series – such as Nvidia’s A100 and H100, and AMD’s Instinct MI250X and MI300 – have their roots in TSMC’s CoWoS tech.

However, with AI’s exponential growth, chip demand from not just Nvidia and AMD has skyrocketed, but other giants like Google and Amazon are also catching up in the AI field, bringing an onslaught of chip demand. The surge of orders is already testing the limits of TSMC’s CoWoS capacity. While TSMC is planning to increase its production in the latter half of 2023, there’s a snag – the lead time of the packaging equipment is proving to be a bottleneck, severely curtailing the pace of this necessary capacity expansion.

Nvidia Shakes the foundation of the CoWoS Supply Chain

In these times of booming demand, maintaining a stable supply is viewed as the primary goal for chipmakers, including Nvidia. While TSMC is struggling to keep up with customer needs, other chipmakers are starting to tweak their outsourcing strategies, moving towards a more diversified supply chain model. This shift is now opening opportunities for other foundries and OSATs.

Interestingly, in this reshuffling of the supply chain, UMC (United Microelectronics Corporation) is reportedly becoming one of Nvidia’s key partners in the interposer sector for the first time, with plans for capacity expansion on the horizon.

From a technical viewpoint, interposer has always been the cornerstone of TSMC’s CoWoS process and technology progression. As the interposer area enlarges, it allows for more memory stack particles and core components to be integrated. This is crucial for increasingly complex multi-chip designs, underscoring Nvidia’s intention to support UMC as a backup resource to safeguard supply continuity.

Meanwhile, as Nvidia secures production capacity, it is observed that the two leading OSAT companies, Amkor and SPIL (as part of ASE), are establishing themselves in the Chip-on-Wafer (CoW) and Wafer-on-Substrate (WoS) processes.

The ASE Group is no stranger to the 2.5D packaging arena. It unveiled its proprietary 2.5D packaging tech as early as 2017, a technology capable of integrating core computational elements and High Bandwidth Memory (HBM) onto the silicon interposer. This approach was once utilized in AMD’s MI200 series server GPU. Also under the ASE Group umbrella, SPIL boasts unique Fan-Out Embedded Bridge (FO-EB) technology. Bypassing silicon interposers, the platform leverages silicon bridges and redistribution layers (RDL) for integration, which provides ASE another competitive edge.

Could Samsung’s Turnkey Service Break New Ground?

In the shifting landscape of the supply chain, the Samsung Device Solutions division’s turnkey service, spanning from foundry operations to Advanced Package (AVP), stands out as an emerging player that can’t be ignored.

After its 2018 split, Samsung Foundry started taking orders beyond System LSI for business stability. In 2023, the AVP department, initially serving Samsung’s memory and foundry businesses, has also expanded its reach to external clients.

Our research indicates that Samsung’s AVP division is making aggressive strides into the AI field. Currently in active talks with key customers in the U.S. and China, Samsung is positioning its foundry-to-packaging turnkey solutions and standalone advanced packaging processes as viable, mature options.

In terms of technology roadmap, Samsung has invested significantly in 2.5D packaging R&D. Mirroring TSMC, the company launched two 2.5D packaging technologies in 2021: the I-Cube4, capable of integrating four HBM stacks and one core component onto a silicon interposer, and the H-Cube, designed to extend packaging area by integrating HDI PCB beneath the ABF substrate, primarily for designs incorporating six or more HBM stack particles.

Besides, recognizing Japan’s dominance in packaging materials and technologies, Samsung recently launched a R&D center there to swiftly upscale its AVP business.

Given all these circumstances, it seems to be only a matter of time before Samsung carves out its own significant share in the AI chip market. Despite TSMC’s industry dominance and pivotal role in AI chip advancements, the rising demand for advanced packaging is set to undeniably reshape supply chain dynamics and the future of the semiconductor industry.

(Source: Nvidia)