In the realm of specifications competition, desktop computers continue to possess numerous irreplaceable advantages. These include ease of upgrading, superior heat dissipation capabilities, and robust and durable construction, resulting in extended usage lifespans. As a result, desktop computers maintain a steadfast market demand. Due to the ease of component replacement in desktops, expandability remains a significant advantage for PC gamers. For creators and business professionals, desktop computers satisfy extensive external connectivity needs while offering superior heat dissipation. Furthermore, owing to the size limitations of laptops, desktop computers continue to provide a more comfortable user experience during prolonged usage.

Windows 10 Exit and Hardware Updates Set to Drive 2024 Upgrade Trend

In the latter half of 2022, brands and retailers aggressively cleared their inventories, a trend that continued into 2023, resulting in a sustained challenging period for the PC market. In recent years, the PC market has approached saturation, making it difficult to drive market growth through sheer quantity. Consequently, brand manufacturers have focused on business, gaming, and creator products. However, PCs inherently belong to a cyclical terminal market. With the Windows 10 operating system set to retire in October 2025 and Windows 11’s heightened hardware specifications requirements, products released before 2017 will require replacements. Additionally, it is anticipated that companies like Intel, AMD, and NVIDIA will gradually unveil new products in the latter half of 2023. This, coupled with the demands of the new operating system, is expected to trigger a noticeable upgrade trend among consumers, ultimately providing a glimmer of hope for the PC market. (Image credit: Unsplash_Alienwaregaming)

Apple is slated to unveil four new iPhone models in mid-September: the iPhone 15, iPhone 15 Plus, iPhone 15 Pro, and iPhone 15 Pro Max. TrendForce predicts a production figure of approximately 80 million units for the iPhone 15 series. This represents a 6% YoY growth, bouncing back from last year’s Foxconn-related production hiccups. The Pro series, armed with smoother production cycles and the Pro Max’s exclusive periscope lens, is poised to be a consumer magnet and potentially propel the Pro series to constitute over 60% of Apple’s new device production. However, with overall gloomy market sentiment and Huawei’s comeback in full swing, Apple’s total iPhone sales for the year may take a hit, expected to hover between 220 to 225 million units for a 5% YoY decline.

In regard to specifications for the iPhone 15 series, several noteworthy hardware upgrades have been made. Compliance with EU regulations has led Apple to jump on the USB Type-C bandwagon this year. The iPhone 15 and iPhone 15 Plus will come with significant camera upgrades, sporting a 48MP main sensor to align with the Pro series. Furthermore, they will also be featuring Apple’s Dynamic Island. On the other hand, the Pro series promises cutting-edge processor upgrades, increased Dram capacity, and introduces a titanium-aluminum alloy frame. The Pro Max also intends to elevate mobile photography to the next level with its exclusive periscope lens.

Advances in technology, while exciting, can also ratchet up the intricacies of mass production. Reports of component snags and assembly issues have surfaced as production of the new iPhone models revs up in the third quarter. The iPhone 15 and iPhone 15 Plus, in particular, have been grappling with lower-than-expected yield rates for their new 48MP cameras. Meanwhile, the Pro series is confronting challenges with panel and titanium alloy frame assembly. However, evidence suggests that the Pro series is likely to overcome its obstacles more swiftly than its non-Pro counterparts.

iPhone 15 Pro Max may see a price increase to reflect cost differences

In light of the global economic downturn, Apple is contemplating a cautious pricing strategy to preserve its sales volumes. While the iPhone 15 and iPhone 15 Plus boast 48MP main cameras, they’ll inherit the A16 processor from the iPhone 14 Pro series, with no other significant upgrades. Hence, their starting prices are projected to be aggressively competitive. The iPhone 15 Pro may sport several enhancements that inflate costs, yet these are anticipated to be offset by cost reductions in other components.

Overall, TrendForce predicts a stable pricing landscape for the iPhone 15, iPhone 15 Plus, and iPhone 15 Pro, largely mirroring last year’s figures. The Pro Max, however, is a different story. Equipped with an exclusive high-cost periscope lens, it’s expected to command a premium—likely a bump of up to US$100—to reflect its increased production costs. Should this price adjustment materialize, it would mark the first such move since the era of the iPhone X.

According to a report by Taiwan’s Commercial Times, the semiconductor market is expected to slow down this year. PSMC Chairman Frank Huang stated that it is estimated that the current wave of semiconductor inventory clearance will not be completed until the end of the first quarter of next year, and the overall market conditions for next year are still not expected to rebound strongly.

When asked about the mature wafer fabs in mainland China aggressively capturing market share this year with low prices, Frank Huang emphasized that this was anticipated. He further stated that PSMC is planning to launch affordable AI chips primarily targeting the consumer market next year, completely differentiating them from Nvidia’s high-priced products. Given the large scale of the consumer market, he expressed optimism regarding future shipment growth.

Huang emphasized that PSMC’s planned AI chips with AI functionality are like miniature computers. Currently, international chip manufacturers offer AI chips with unit prices as high as $200,000, making them impossible for widespread adoption in the consumer market. Therefore, the AI chips PSMC plans to launch next year will have lower prices and will be specifically tailored for the massive consumer market. He gave examples, including affordable AI features being integrated into toys and household appliances. Toys, for instance, will be able to recognize their owners and engage in voice interactions.

Huang mentioned that, because they are targeting affordability and mass appeal, these AI chips will be produced using a 28-nanometer process and are expected to contribute to revenue through formal shipments next year. With a focus on the consumer market, Huang is optimistic about the future shipments and business contributions of these AI chips.

According to a report by Taiwan’s Money DJ, the production schedule for TSMC’s semiconductor foundry in the United States has been delayed until 2025, raising concerns among observers. However, Chairman Mark Liu, in an interview on the 6th, stated that there has been significant progress over the past five months and expressed confidence in the project’s success. Industry sources have indicated that TSMC’s U.S. facility may alter its ramp-up strategy by first establishing a mini-line for trial production, with the expectation of having it in place by the first quarter of 2024.

TSMC’s Fab 21 Phase 1 construction began in April 2021, originally slated for early 2024 production. However, challenges such as a shortage of skilled equipment installation personnel, local union protests, and differences in overseas safety regulations have caused delays in equipment installation. This has compelled TSMC to adjust its plans, and the expected production timeline is now set for 2025, representing a one-year delay.

Industry analysts have noted that the efficiency of equipment entering the facility at TSMC’s U.S. plant in Arizona is only about one-third of that of its Taiwan facilities. Given the current pace of progress, the time required for equipment setup to actual production could be substantial. Therefore, TSMC has decided to change its previous ramp-up strategy and first establish a mini-line with an initial estimated monthly capacity of about 4,000 to 5,000 wafers. This approach aims to ensure some level of production output while mitigating potential contract breach issues arising from delays in production.

(Photo credit: TSMC)

As applications like AIGC, 8K, AR/MR, and others continue to develop, 3D IC stacking and heterogeneous integration of chiplet have become the primary solutions to meet future high-performance computing demands and extend Moore’s Law.

Major companies like TSMC and Intel have been expanding their investments in heterogeneous integration manufacturing and related research and development in recent years. Additionally, leading EDA company Cadence has taken the industry lead by introducing the “Integrity 3D-IC” platform, an integrated solution for design planning, realization, and system analysis simulation tools, marking a significant step towards 3D chip stacking.

Differences between 2.5D and 3D Packaging

The main difference between 2.5D and 3D packaging technologies lies in the stacking method. 2.5D packaging involves stacking chips one by one on an interposer or connecting them through silicon bridges, primarily used for assembling logic processing chips and high-bandwidth memory. On the other hand, 3D packaging is a technology that vertically stacks chips, mainly targeting high-performance logic chips and SoC manufacturing.

CPU and HBM Stacking Demands

With the rapid development of applications like AIGC, AR/VR, and 8K, it is expected that a significant amount of computational demand will arise, particularly driving the need for parallel computing systems capable of processing big data in a short time. To overcome the bandwidth limitations of DDR SDRAM and further enhance parallel computing performance, the industry has been increasingly adopting High-Bandwidth Memory (HBM). This trend has led to a shift from the traditional “CPU + memory (such as DDR4)” architecture to the “Chip + HBM stacking” 2.5D architecture. With continuous growth in computational demand, the future may see the integration of CPU, GPU, or SoC through 3D stacking.

3D Stacking with HBM Prevails, but CPU Stacking Lags Behind

HBM was introduced in 2013 as a 3D stacked architecture for high-performance SDRAM. Over time, the stacking of multiple layers of HBM has become widespread in packaging, while the stacking of CPUs/GPUs has not seen significant progress.

The main reasons for this disparity can be attributed to three factors: 1. Thermal conduction, 2. Thermal stress, and 3. IC design. First, 3D stacking has historically performed poorly in terms of thermal conduction, which is why it is primarily used in memory stacking, as memory operations generate much less heat than logic operations. As a result, the thermal conduction issues faced by current memory stacking products can be largely disregarded.

Second, thermal stress issues arise from the mismatch in coefficients of thermal expansion (CTE) between materials and the introduction of stress from thinning the chips and introducing metal layers. The complex stress distribution in stacked structures has a significant negative impact on product reliability.

Finally, IC design challenges from a lack of EDA tools, as traditional CAD tools are inadequate for handling 3D design rules. Developers must create their own tools to address process requirements, and the complex design of 3D packaging further increases the design, manufacturing, and testing costs.

How EDA Companies Offer Solutions

Cadence, during the LIVE Taiwan 2023 user annual conference, highlighted its years of effort in developing solutions. They have introduced tools like the Clarity 3D solver, Celsius thermal solver, and Sigrity Signal and Power Integrity, which can address thermal conduction and thermal stress simulation issues. When combined with Cadence’s comprehensive EDA tools, these offerings contribute to the growth of the “Integrity 3D-IC” platform, aiding in the development of 3D IC design.

“3D IC” represents a critical design trend in semiconductor development. However, it presents greater challenges and complexity than other projects. In addition to the challenges in Logic IC design, there is a need for analog and multi-physics simulations. Therefore, cross-platform design tools are indispensable. The tools provided by EDA leader Cadence are expected to strengthen the 3D IC design tool platform, reducing the technological barriers for stacking CPU, GPU, or SoC to enhance chip computing performance.

This article is from TechNews, a collaborative media partner of TrendForce.

(Photo credit: TSMC)