According to The Hindu, India, under a transformative partnership with the U.S., is set to establish its first national security semiconductor fabrication plant. This facility will produce chips for military hardware in both nations, as well as for critical telecommunications and electronics networks.

The ambitious project was announced following talks between Prime Minister Narendra Modi and U.S. President Joe Biden in Wilmington on September 21. The two leaders hailed this first-ever India-U.S. semiconductor fabrication collaboration as a “watershed moment,” according to a joint fact sheet.

Based on a report by Bloomberg, the planned India-U.S. semiconductor plant will manufacture infrared, gallium nitride, and silicon carbide semiconductors. In a joint statement, both sides indicated that the India Semiconductor Mission, along with the strategic technology partnership between Bharat Semi, 3rdiTech Inc, and the U.S. Space Force, will provide support for the establishment of the plant.

Meanwhile, Vietnam is also ramping up efforts to develop its semiconductor industry, having set a development blueprint for 2030 with a vision extending through 2050.

As reported by Vietnam Plus, the country plans to capitalize on its geopolitical advantages and labor market strength to selectively attract foreign direct investment (FDI) in the semiconductor sector during the first phase, from 2024 to 2030.

Vietnam aims to become a global hub for semiconductor talent by strengthening its capabilities across the entire supply chain, from research and design to manufacturing, packaging, and testing.

The Vietnamese government has set an ambitious goal of training 50,000 engineers by 2030 to support this high-tech industry. In the second phase, from 2030 to 2040, Vietnam plans to further integrate with global semiconductor and electronics industries, becoming a key global center. By the third phase, from 2040 to 2050, Vietnam aspires to be a global leader in semiconductors and electronics, advancing its research and development capabilities.

By the end of this period, Vietnam aims to build a self-sufficient semiconductor ecosystem, securing a leading position in various steps of the global supply chain.

(Photo credit: Samsung)

The Fed announced a 50-basis-point rate cut last week, sparking expectations of further rate reductions and driving gold prices to new highs. On the 23rd, gold prices surged to an all-time high.

On September 23, gold futures on the COMEX, the world’s largest gold futures exchange, soared to a record high of $2,653 per ounce. This marks a roughly 30% increase in gold prices compared to the start of the year, with prices setting new records throughout the year.

Following the Fed’s announcement of a 50-basis-point cut in the benchmark interest rate last week, both spot and futures gold prices, which were already on an upward trend, reached new historic highs. In addition, rising geopolitical tensions in the Middle East have further fueled gold’s rally.

The decline in interest rates is likely to support continued increases in gold prices, and market expectations that the Fed will maintain its rate-cutting pace suggest that gold prices may continue to grow in the near future.

Read more at Datatrack

MediaTek announced on its official Weibo account that its next-generation flagship chip will be unveiled on October 9.

According to TechNews, MediaTek’s upcoming next-generation chip is the annual flagship smartphone processor, the Dimensity 9400. Based on the expected release date, it will be unveiled ahead of competitor Qualcomm’s Snapdragon 8 Gen 4.

During a recent earnings call for Q2 2024, MediaTek CEO Rick Tsai confirmed that the eagerly anticipated Dimensity 9400 would debut in October. Following its release, the chip is expected to support most major language models on the market, with the company confident of achieving over 50% year-on-year revenue growth for its flagship products.

Market sources cited by TechNews reveal that the Dimensity 9400 will be the largest smartphone processor to date, with a chip area of approximately 150 mm². This increased size will accommodate more transistors, with the Dimensity 9400 expected to feature over 30 billion transistors, a 32% increase from the 22.7 billion in the Dimensity 9300.

Additionally, recent report indicate that the GPU in the Dimensity 9400 significantly outperformed Apple’s A18 Pro in the GFXBench Aztec 1440p test, even surpassing the PC-class M4 processor. Performance data shows that the Dimensity 9400 achieved a Vulkan frame rate of 134 fps in the GFX Aztec 1440p test, exceeding the A18 Pro by 86% and Qualcomm’s Snapdragon 8 Gen 4 by about 41%.

(Photo credit: MediaTek)

A few weeks ago, Intel is said to be seeking assistance from the U.S. government, as CEO Pat Gelsinger reportedly turned to Commerce Secretary Gina Raimondo to emphasize the significance of U.S. chip manufacturing. Now here’s the latest development: according to a report by Bloomberg, the U.S. House has passed a bill that exempts certain semiconductor manufacturing projects from federal permitting requirements, which is expected to benefit companies like Intel and TSMC.

According to Bloomberg, the move aims to alleviate concerns that environmental reviews and legal challenges could slow the construction of domestic chip plants.

The report notes that spurred by incentives from the 2022 Chips and Science Act, chipmakers have committed around USD 400 billion to build factories in the US. Companies such as Intel and TSMC are set to receive billions in funding from the act to support major projects nationwide. Other tech giants, including Micron, Samsung, SK hynix and GlobalFoundries, are also getting billions in U.S. subsidies.

However, many of the projects are facing delays. For instance, Intel’s Fab 52 and Fab 62 in Arizona are previously scheduled to be completed in 2024. However, the schedule may be reportedly delayed a bit, as the fabs are likely to begin operations later this year or in early 2025. The USD 20 billion project in Ohio, on the other hand, may be facing larger obstacles as Intel has delayed the plan after 2026 due to market downturns and delays in U.S. subsidies.

The pending awards, according to Bloomberg, currently require semiconductor construction sites to undergo National Environmental Policy Act (NEPA) reviews, a process that could last months or even years. Now it would be streamlined by the legislation passed on Monday.

The bill specifies three criteria for Chips Act-funded projects to qualify for a NEPA exemption, Bloomberg states.

First, projects must begin construction before the end of this year, a requirement that most major sites should be able to meet, except for a Micron’s project in New York, which has not yet met permitting requirements under the Clean Water Act and various state regulations, Bloomberg explains.

Second, projects that receive only loans—not direct grant funding—would be exempt from NEPA reviews, although this provision currently does not apply to any Chips Act incentive packages.

Finally, facilities would qualify for an exemption if grant funding constitutes less than 10% of project costs, a decrease from the previous threshold of 15% in an earlier version of the legislation, the report notes.

It is worth noting that the proposal, waiting for Biden’s nod, illustrates the dilemma the U.S. government is currently facing. For one thing, the U.S. authority is eager to expedite the construction of chip factories to reduce reliance on Asia, particularly Taiwan. On the other hand, the White House has set ambitious climate goals, and building semiconductor plants could complicate efforts to achieve these targets, according to Bloomberg.

Read more

• [News] Intel Reportedly Sought Commerce Secretary Raimondo’s Help over U.S. Reliance on TSMC

(Photo credit: Intel)

In mid-August, TSMC had signed a contract with panel manufacturer Innolux to purchase its plant and facilities located in southern Taiwan, eyeing to further expand its advanced packaging capacity. According to a report by China Times, the fab, designated as the AP8 facility, is expected to start production in the second half of 2025.

More importantly, the fab will not only provide foundry services but also the eagerly needed capacity for advanced 3D Chip on Wafer on Substrate (CoWoS) IC packaging services, the report notes.

The move will be critical for TSMC to meet the surging demand for the advanced packaging capacity for AI servers, according to the report. Its future capacity will reportedly be nine times that of AP6, TSMC’s advanced packaging fab in Zhunan.

Outbidding Micron, TSMC secured the plant with a transaction value of NTD 17.14 billion, which is much lower than the rumored market price of over NTD 20 billion. Citing sources from the supply chain, the report suggests that the main reason TSMC acquired Innolux’s fab was to bypass the time-consuming environmental assessment process.

Unlike the advanced packaging fab in Chiayi, central Taiwan, which has to be started from scratch, the newly-acquired facility only requires internal modifications. Within a year, TSMC can finish the job of equipment installation, and begin the production afterwards.

Sources cited by the report note that orders for related equipment manufacturing are already underway, with deliveries expected starting in April next year. While the process of trial production may take an additional quarter, the AP8 facility is expected to start production in the second half of 2025.

During an investor conference in mid-April, TSMC Chairman C.C. Wei stated that he anticipates the company’s CoWoS capacity to more than double in both 2024 and 2025. He noted later in July that TSMC targets to reach the balance between supply and demand by 2026.

According to analysts cited by the report, TSMC’s CoWoS capacity, though still remains in short supply, could exceed 32,000 wafers per month by the end of this year. With the additional outsourced capacity, the total CoWoS capacity may approach 40,000 wafers per month. By the end of 2025, TSMC’s CoWoS monthly capacity is projected to reach around 70,000 wafers.

Citing remarks by Jun He, TSMC Vice President of Operations and Advanced Packaging Technology and Service, TSMC’s CoWoS capacity is expected to achieve a compound annual growth rate (CAGR) of over 50% from 2022 to 2026. The foundry giant will also accelerate its pace on constructing fabs, shortening the typical 3-to-5-year timeline to within 2 years to meet customer demand.

Read more

• [News] TSMC Took Another Step in Advanced Process Expansion

(Photo credit: TSMC)