At the SEMICON Taiwan 2024, Samsung’s Head of Memory Business, Jung Bae Lee, stated that as the industry enters the HBM4 era, collaboration between memory makers, foundries, and customers is becoming increasingly crucial.

Reportedly, Samsung is prepared with turnkey solutions while maintaining flexibility, allowing customers to design their own basedie (foundation die) and not restricting production to Samsung’s foundries.

As per anue, Samsung will actively collaborate with others, with speculation suggesting this may involve outsourcing orders to TSMC.

Citing sources, anue reported that SK hynix has signed a memorandum of understanding with TSMC in response to changes in the HBM4 architecture. TSMC will handle the production of SK hynix’s basedie using its 12nm process.

This move helps SK hynix maintain its leadership while also ensuring a close relationship with NVIDIA.

Jung Bae Lee further noted that in the AI era, memory faces challenges of high performance and low energy consumption, such as increasing I/O counts and faster transmission speeds. One solution is to outsource the basedie to foundries using logic processes, then integrate it with memory through Through-Silicon Via (TSV) technology to create customized HBM.

Lee anticipates that this shift will occur after HBM4, signifying increasingly close collaboration between memory makers, foundries, and customers. With Samsung’s expertise in both memory and foundry services, the company is prepared with turnkey solutions, offering customers end-to-end production services.

Still, Jung Bae Lee emphasized that Samsung’s memory division has also developed an IP solution for basedie, enabling customers to design their own chips. Samsung is committed to providing flexible foundry services, with future collaborations not limited to Samsung’s foundries, and plans to actively partner with others to drive industry transformation.

Reportedly, Samsung is optimistic about the HBM market, projecting it to reach 1.6 billion Gb this year—double the combined figure from 2016 to 2023—highlighting HBM’s explosive growth.

Address the matter, TrendForce further notes that for the HBM4 generation base die, SK hynix plans to use TSMC’s 12nm and 5nm foundry services. Meanwhile, Samsung will employ its own 4nm foundry, and Micron is expected to produce in-house using a planar process. These plans are largely finalized.

For the HBM4e generation, TrendForce anticipates that both Samsung and Micron will be more inclined to outsource the production of their base dies to TSMC. This shift is primarily driven by the need to boost chip performance and support custom designs, making further process miniaturization more critical.

Moreover, the increased integration of CoWoS packaging with HBM further strengthens TSMC’s position as it is the main provider of CoWoS services.

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As Intel’s January announced the collaboration with UMC on the 12-nanometer process platform, UMC’s Co-General Manager, Jason Wang, led a team to support Intel’s IFS event.

Cited by Commercial Times in its report, Wang emphasized that UMC’s existing customers would have more production location options and benefit from the platform strategy. UMC will seamlessly transition from the 28/22-nanometer to the critical 12-nanometer.

Followed by joint interviews to share insights into the future strategies of both parties, Wang stated that in the face of rapid changes and challenges in the external environment, industries need to strengthen their cooperative relationships and seize opportunities for collaboration.

Intel and UMC announced their collaboration at the end of January, focusing on the development of a shared platform for the 12-nanometer process. In the future, UMC will be able to expand its orders for the front-end of the 12-nanometer process, while Intel will secure orders for the 12-nanometer wafer manufacturing.

Jason Wang emphasized that UMC has a comprehensive solution for the 28/22-nanometer, with demand trending towards stability. However, due to past limitations in resource allocation , UMC has paused at the 14/16-nanometer. Advancing to more advanced processes is just a matter of timing.

Wang further stated that both parties will focus on creating customer value, breaking frameworks, and innovating in cooperation. The two companies complement each other’s strengths, accelerating the timeline for technological development and expanding their global footprint.

Wang revealed that Intel has already included UMC’s 12-nanometer process in its product roadmap and has begun deep collaboration. UMC has deployed personnel to oversee this, with Intel leveraging UMC’s know-how in management.

Additionally, the collaboration involves revenue sharing rather than the rumored licensing fees. They anticipate completing the Process Design Kit (PDK) by next year and achieving mass production by the end of 2026.

Overall, TrendForce views this alliance as a significant step. UMC brings its plentiful experience in mature processes, while Intel contributes its advanced technological prowess.

This partnership is not just about mutual benefits at the 10nm process level; it’s a watchpoint for potentially deeper and more extensive collaboration in their respective fields of expertise. In the dynamic world of semiconductor manufacturing, this Intel-UMC alliance is a fascinating development to keep an eye on.

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(Photo credit: Intel)

Intel announced on the evening of January 25th that it will collaborate with UMC to develop 12-nanometer process platform technology. The production will utilize Intel’s wafer fab capacity in the United States, and both parties will share the cash generated from the collaboration. The production is expected to commence in 2027.

This marks Intel’s first collaboration with a Taiwanese foundry in process development. Intel is actively venturing into the foundry business, and this collaboration with UMC not only marks a new milestone in the Taiwan-US semiconductor foundry industry but also initiates a new competitive relationship in the global foundry industry.

Intel and UMC have not disclosed the expected investment amount for their collaboration. UMC stated that the investment amount cannot be disclosed as the collaborative technology will not enter production until 2027, at which point it will begin contributing to revenue.

Therefore, the investment will be shared by both parties. Regarding whether they will advance towards more advanced processes, UMC stated that they do not respond to distant matters and primarily focus on financial indicators that the company can afford.

Intel noted that the collaboration with UMC to develop the 12-nanometer process platform is primarily aimed at addressing the high growth in markets such as mobile, communication infrastructure, and networking.

This long-term collaboration combines Intel’s large-scale manufacturing capacity in the United States with UMC’s extensive experience in mature processes in foundry, expanding the process portfolio while providing a better regionally diversified and resilient supply chain to assist global customers in making better procurement decisions.

The new process node, according to Intel, will be developed and manufactured in Fabs 12, 22 and 32 at Intel’s Ocotillo Technology Fabrication site in Arizona.

“Taiwan has been a critical part of the Asian and global semiconductor and broader technology ecosystem for decades, and Intel is committed to collaborating with innovative companies in Taiwan, such as UMC, to help better serve global customers,” said Stuart Pann, Intel senior vice president and general manager of Intel Foundry Services (IFS).

He further stated that, “Intel’s strategic collaboration with UMC further demonstrates our commitment to delivering technology and manufacturing innovation across the global semiconductor supply chain and is another important step toward our goal of becoming the world’s second-largest foundry by 2030.”

Jason Wang, UMC co-president, said that UMC’s collaboration with Intel on a U.S.-manufactured 12 nm process with FinFET capabilities in the United States is a crucial aspect of the company’s pursuit of cost-effective capacity expansion and technological node advancement.

UMC anticipates that this collaboration will assist customers in smoothly migrating to this critical node while benefiting from the resilience of the expanded capacity in the North American market.

UMC looks forward to strategic collaboration with Intel, leveraging the complementary advantages of both parties to expand potential markets and significantly accelerate technology development timelines.

TrendForce believes that this partnership, which leverages UMC’s diversifed technological services and Intel’s existing factory facilities for joint operation, not only aids Intel in transitioning from an IDM to a foundry business model, it also allows UMC to agilely leverage FinFET capacity without the pressure of heavy capital investments.

TrendForce forecasts that this collaboration slashes average investment by a staggering 80%, compared to the cost of new equipment. This calculation includes only the expenses related to the relocation of equipment, secondary piping costs for factory services, and other minor associated expenses for ancillary equipment.

However, the journey is not without its challenges. UMC’s 14nm process, in development since 2017, is yet to hit mass production, and its 12nm process is still in the R&D phase, with mass production eyed for late 2026. This collaboration’s mass production timeline is tentatively set for 2027, with the FinFET architecture’s stability under careful watch.

Overall, TrendForce views this alliance as a significant step. UMC brings its plentiful experience in mature processes, while Intel contributes its advanced technological prowess.

This partnership is not just about mutual benefits in the 10nm process level; it’s a watchpoint for potentially deeper and more extensive collaboration in their respective fields of expertise. In the dynamic world of semiconductor manufacturing, this Intel-UMC alliance is a fascinating development to keep an eye on.

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(Photo credit: Intel)