Recently, IC design company Marvell announced an expansion of its long-term partnership with TSMC to include 2-nanometer technology. They will collaborate on developing the industry’s first 2-nanometer semiconductor production platform optimized for accelerating infrastructure.

Currently, the most advanced production technology in the industry is the 3-nanometer process, manufactured by Samsung Electronics and TSMC. With Intel securing the first ASML lithography machine and updating its latest manufacturing roadmap, and with the increasing collaboration between Rapidus and IBM, the competition for the 2-nanometer advanced process has significantly expanded to include TSMC, Intel, Samsung and  Rapidus.

• Marvell

According to Marvell’s press release, it has stated that Marvell has transitioned from a follower to a leader in integrating advanced node technology into silicon infrastructure.

Marvell first bringing advanced node technology to infrastructure silicon with its 5nm platform, followed by the release of several 5-nanometer designs and the profolio of the first silicon infrastructure product lineup based on TSMC’s 3-nanometer process.

“Tomorrow’s artificial intelligence workloads will require significant and substantial gains in performance, power, area, and transistor density. The 2nm platform will enable Marvell to deliver highly differentiated analog, mixed-signal, and foundational IP to build accelerated infrastructure capable of delivering on the promise of AI,” said Sandeep Bharathi, chief development officer at Marvell.

• TSMC

TSMC commenced mass production of its 3-nanometer process in 2022, with profitability realized starting from the third quarter of 2023. By the fourth quarter of 2023, the 3-nanometer process contributed to 15% of wafer revenue, and its revenue share has been steadily increasing.

According to TrendForce, the foundry market is expected to grow by 7% in 2024, largely attributed to TSMC’s ramp-up of its 3-nanometer process. This has further increased TSMC’s market share.

During the earnings call in the fourth quarter of 2023, TSMC announced that its 2-nanometer process (N2) would utilize Nanosheet transistor structures. It is anticipated that N2 will commence mass production in 2025, leading the industry in terms of density and energy efficiency.

The N2 backside power delivery solution is slated for release in the latter half of 2025 and is expected to enter mass production in 2026, primarily targeting the High-Performance Computing (HPC) sector.

Furthermore, due to the current high demand for 2-nanometer processes from all AI innovators worldwide surpassing that for 3-nanometer processes, almost all AI innovators are collaborating with TSMC on 2-nanometer process technology. The main applications are primarily focused on high-performance computing (HPC) and smartphones.

Consequently, TSMC has announced plans to expand its production capacity for 2-nanometer processes. Originally, two 2-nanometer fabs were planned for the Kaohsiung facility, but now consideration is being given to constructing a third 2-nanometer fab.

• Samsung

Samsung commenced mass production of its 3-nanometer process in June 2022. According to the latest industry reports, Samsung has developed a “second-generation 3-nanometer” process, renamed as “2-nanometer”, with plans for mass production before the end of this year.

At the 2023 Samsung Foundry Forum, Samsung Electronics unveiled the latest roadmap for its 2-nanometer process. Samsung Electronics President and Head of Foundry Business, Siyoung Choi, disclosed that Samsung will first mass-produce 2-nanometer chips for mobile terminals starting from 2025. Subsequently, in 2026, the technology will be applied to high-performance computing (HPC) products, followed by expansion to automotive chips by 2027.

Unlike TSMC, which opted for Gate-All-Around (GAA) structure at the outset of its 2-nanometer process, Samsung has been utilizing GAA structure since its 3-nanometer process. This suggests that Samsung may have more experience in new structures compared to TSMC, thus giving Samsung an advantage in its 2-nanometer node.

In the past, when Samsung Electronics transitioned from 7-nanometer to 5-nanometer process technology in 2020, the second generation 7-nanometer process technology was renamed as 5-nanometer process technology.

Samsung Electronics’ 7-nanometer process technology became the world’s first to use Extreme Ultraviolet (EUV) lithography in 2019, making it more stable and enabling the company to further shrink transistor sizes. This was also the reason for renaming the second generation 7-nanometer process to 5-nanometer process at that time.

A report from the Business Korea has indicated that Samsung Electronics recently secured an order from the Japanese AI startup Preferred Networks (PFN) to produce semiconductors based on the 2-nanometer process.

It is reported that PFN has been collaborating with TSMC since 2016, but this year, it has decided to produce the next generation of AI chips at Samsung’s 2-nanometer node. According to the agreement, Samsung will utilize its latest 2-nanometer chip fab technology to manufacture AI accelerators and other AI chips for PFN.

• Intel

As per Intel’s previously announced plans, the company aims to catch up with and surpass TSMC by 2024 or 2025. At this year’s “Direct Connect” conference hosted by Intel Foundry Services, the company unveiled its latest technological roadmap.

Intel has reported that its primary product, Clearwater Forest, which is under the 18A process, has been completed and is set for production in 2025. Intel’s 18A process is often compared with TSMC’s N2 (2-nanometer) and N3P (3-nanometer) processes in terms of performance, with each company advocating for its own advantages.

Intel CEO Pat Gelsinger emphasizes that both 18A and N2 utilize GAA transistors (RibbonFET), but the 1.8-nanometer node will adopt BSPND, a backside power delivery technology that optimizes power and clock. TSMC, on the other hand, believes that its N3P (3-nanometer) technology will rival Intel’s 18A in power consumption, performance, and area (PPA), while its N2 (2-nanometer) will surpass it in all aspects.

Additionally, Intel’s 20A manufacturing technology is reportedly scheduled for launch in 2024, introducing two technologies: RibbonFET surround gate transistors and backside power delivery network (BSPDN). These aim to achieve higher performance, lower power consumption, and increased transistor density.

Meanwhile, Intel’s 18A production node aims to further refine the innovations of 20A and provide additional PPA improvements from late 2024 to early 2025. Per Intel’s statements regarding its fab processes, its 2-nanometer technology is expected to be the earliest to debut.

Of particular note, Intel announced for the first time at the conference the development of 14A (1.4nm) and its evolutionary version, 14A-E. Intel’s 14A process is the industry’s first node to utilize ASML High-NA EUV lithography tools, making Intel the first company in the industry to acquire cutting-edge High-NA tools. Intel expects to develop 14A by 2027.

• Rapidus

In addition to the aforementioned semiconductor foundries, a Japanese company, Rapidus, is worth noting as well. Established in August 2022, Rapidus was jointly founded by eight Japanese companies including Toyota, Sony, NTT, NEC, SoftBank, Denso, NAND Flash giant Kioxia, and Mitsubishi UFJ.

On January 22nd of 2024, Rapidus President Junichi Koike announced during a press conference that construction of the Rapidus 2-nanometer chip fab in Japan is progressing smoothly, and the trial production line is scheduled to commence operations in April 2025 as planned. Additionally, there are plans for the construction of a second and third facility in the future.

In September of last year, Rapidus began construction of Japan’s first logic chip fab, “IIM-1,” in Chitose City, Hokkaido, capable of producing chips below 2 nanometers. It is reported that the fab is expected to be completed by December of this year.

Previously, Rapidus signed a collaboration agreement with IBM to develop technology based on IBM’s 2-nanometer process. IBM had already introduced the world’s first 2-nanometer process chip back in 2021. Similarly, IBM’s 2-nanometer process also utilizes GAA (Gate-All-Around) structure. This partnership provides Rapidus with the technical support necessary for advanced process development.

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(Photo credit: TSMC)

As Samsung’s foundry business closely trails TSMC, Economic Daily News has reported that Samsung is poised to secure orders for Meta’s next-gen AI chips, manufactured on a 2-nanometer process. If so, this may mark Samsung’s first 2nm customer, intensifying the rivalry with TSMC in the 2nm race.

According to The Korea Times, the potential collaboration between Meta and Samsung was discussed during Meta CEO Zuckerberg’s recent visit to South Korea.

The report cites anonymous officials stating that during Zuckerberg’s meeting with South Korean President Yoon Suk Yeol, he disclosed Meta’s reliance on TSMC. However, the current situation is described as “volatile” due to TSMC’s tight production capacity, which could potentially affect Meta’s supply in the long run.

Nevertheless, neither Meta nor South Korean officials have confirmed these rumors.

Currently, Meta has entrusted TSMC with the production of two AI chips. As per the Economic Daily News citing sources, the biggest challenge for Samsung’s foundry business lies in yield rates.

Previously, poor yield rates prompted Apple, Qualcomm, and Google to switch their orders to TSMC. If Meta indeed turns to Samsung for the next-generation AI chips, the key to the success of their collaboration still lies in yield rates.

As per Samsung’s previous roadmap, the 2-nanometer SF2 process is set to debut in 2025. Compared to the second-generation 3GAP process at 3 nanometers, it offers a 25% improvement in power efficiency at the same frequency and complexity, as well as a 12% performance boost at the same power consumption and complexity, while reducing chip area by 5%.

As stated in Samsung’s Foundry Forum (SFF) plan, Samsung will begin mass production of the 2nm process (SF2) in 2025 for mobile applications, expand to high-performance computing (HPC) applications in 2026, and further extend to the automotive sector and the expected 1.4nm process by 2027.

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• [News] Samsung Secures 2-Nanometer Order from Japanese AI Startup Preferred Networks
• [News] Samsung’s Discount Strategy Challenges TSMC as the Battle for 2nm Orders Heats Up

(Photo credit: Samsung)

It was reported earlier that during Samsung Electronics’ fourth-quarter financial announcement in 2023, the company revealed that its foundry division had secured orders for 2-nanometer AI chips. However, at the time, Samsung did not disclose the name of the relevant customer. Now, according to a report from the Business Korea, the customer is the Japanese AI startup Preferred Networks.

The report indicates that Preferred Networks, which placed an order with Samsung’s foundry division for 2-nanometer AI chips, was founded in 2014 and is in the field of AI deep learning development.

The company has attracted significant investments from major Japanese industrial enterprises such as Toyota, NTT, and Fanuc. The order placed with Samsung’s foundry division for 2-nanometer AI chips also includes HBM and advanced packaging.

As per Samsung’s previous roadmap, the 2-nanometer SF2 process is set to debut in 2025. Compared to the second-generation 3GAP process at 3 nanometers, it offers a 25% improvement in power efficiency at the same frequency and complexity, as well as a 12% performance boost at the same power consumption and complexity, while reducing chip area by 5%.

As stated in Samsung’s Foundry Forum (SFF) plan, Samsung will begin mass production of the 2nm process (SF2) in 2025 for mobile applications, expand to high-performance computing (HPC) applications in 2026, and further extend to the automotive sector and the expected 1.4nm process by 2027.

According to previous reports, the leading foundry TSMC has already disclosed the test results of its 2-nanometer prototype process to major clients such as Apple and NVIDIA, with the goal of commencing mass production by 2025. Apple is set to become TSMC’s inaugural customer for the 2-nanometer process, positioning TSMC at the forefront of competition in the 2-nanometer advanced process technology.

However, according to a previous report from the Financial Times, Samsung is preparing to attract customers to place orders for its 2-nanometer process at lower prices. The move is expected to compete for a portion of Qualcomm’s flagship chip production, as Qualcomm, a major customer of TSMC, may consider shifting some of its flagship chip production to Samsung’s 2-nanometer process.

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• [News] Samsung’s Discount Strategy Challenges TSMC as the Battle for 2nm Orders Heats Up
• [News] Intense Competition in Advancing Processes at the 2nm by Samsung, Intel, and TSMC

(Photo credit: Samsung)

The competition for dominance in 2nm semiconductor technology has intensified at the beginning of 2024, marking a crucial battleground among global foundry companies.

As per a report from IJIWEI, major foundry enterprises such as Samsung Electronics, TSMC, and Intel are set to commence mass production adopting 2nm process starting this year. Consequently, the fierce competition for supremacy in 2nm technology is expected to escalate from 2025 onwards. Currently, the most advanced production technology globally is at the 3nm level.

• TSMC

TSMC’s 2nm products will be manufactured at the Fab 20 in the Hsinchu Science Park in northern Taiwan and at a plant in Kaohsiung.

The Fab 20 facility is expected to begin receiving related equipment for 2nm production as early as April, with plans to transition to GAA (Gate-All-Around) technology from FinFET for 2nm mass production by 2025.

During TSMC’s earnings call on January 18th, TSMC revealed that its capital expenditure for this year is expected to fall between USD 28 billion and 32 billion, with the majority (70% to 80%) allocated to advanced processes. This figure is similar to that of 2023 (USD 30.4 billion), indicating stable investment to ensure its leading position in 2nm technology.

• Intel

After announcing its re-entry into the foundry business, Intel is actively advancing its foundry construction efforts. The plan includes the introduction of the Intel 20A (equivalent to 2nm) process in the first half of 2024 and the Intel 18A (1.8nm) process in the second half of the year. It is understood that the Intel 18A process will commence test production as early as the first quarter of this year.

Intel’s 2nm roadmap is more ambitious than originally anticipated, being accelerated by over six months. In response to criticisms of its “overly ambitious” plans, Intel swiftly began procuring advanced Extreme Ultraviolet (EUV) equipment.

• Samsung Electronics

Samsung Electronics has devised a strategy to gain an advantage in the more advanced process war through its Gate-All-Around (GAA) technology. Currently, it is mass-producing the first-generation 3nm process based on GAA (SF3E) and plans to commence mass production of the second-generation 3nm process this year, significantly enhancing performance and power efficiency.

Regarding the 2nm process, per a report from Nikkei, Samsung plans to start mass production for mobile devices in 2025 (SF2) and gradually expand to high-performance computing (HPC) in 2026 and automotive processes in 2027.

Currently, Samsung Electronics is producing GAA products for the 3nm process at its Hwaseong plant and plans to manufacture products for both the 3nm and 2nm processes at its Pyeongtaek facility in the future.

• Rapidus

Rapidus, a chip manufacturing company supported by the Japanese government, is expected to trial-adopt 2nm process at its new plant by 2025 and begin mass production from 2027.

If Rapidus’ technology is validated, the global foundry market may expand beyond the Taiwan-Korea duopoly to include Taiwan, Korea, the United States, and Japan.

The technology competition to become a “game-changer” ultimately depends on the competition for customers. It’s rumored that TSMC holds a leading position in the 2nm field, with Apple speculated to be its first customer for the 2nm process. Graphics processing giant NVIDIA is also considered a major customer within TSMC’s client base.

According to TrendForce data as of the third quarter of 2023, TSMC’s revenue share accounted for a dominant 57.9%, with Samsung Electronics trailing at 12.4%, a gap of 45.5 percentage points.

However, Samsung Electronics is not sitting idly by. With continuous technological investment, Samsung’s foundry customer base grew to over 100 in 2022, a 2.4-fold increase from 2017. The company aims to expand this number to around 200 by 2028.

Particularly, Samsung’s early adoption of GAA technology is expected to give it an advantage in achieving early production volumes for advanced processes.

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• [News] Intense Competition with Samsung and Intel in Advanced Processes; TSMC Speeds Up 2nm Progress

(Photo credit: TSMC)

Previously, TSMC has indicated that TSMC’s 2nm process will be deployed as scheduled in the second half of 2025, indicating that before that, the most advanced chips in the market will be produced using TSMC’s 3nm process. Apple, which has consistently been the first to adopt TSMC’s latest process, is set to be the first to adopt TSMC’s latest 2nm process.

▲ TSMC’s Layout of Global Production Capacity Edited by TrendForce, November, 2023

According to a report from the media outlet wccftech, Apple’s iPhone, Mac, iPad, and other devices will be the first users of TSMC’s 2nm process. Apple will leverage TSMC’s 2nm process technology to enhance chip performance and reduce power consumption. This advancement is expected to result in longer battery life for future Apple products, such as the iPhone and MacBook.

Currently, Apple’s chips designed for products like MacBook, iPad, and iPad Pro are produced using TSMC’s 3nm process technology. In 2023, the company announced the inclusion of the M3 Pro and M3 Max chips in the new MacBook Pro models. 

Additionally, TSMC will utilize new technology based on the GAAFET (Gate-All-Around Field-Effect Transistor) transistors instead of the traditional FinFET. While this new architecture makes the manufacturing process more complex, it also brings advantages such as smaller transistor sizes and lower power consumption.

In terms of performance analysis, Apple’s current chips are transitioning from the 5nm process to the 3nm process. This transition has resulted in a 10% increase in CPU performance and a 20% increase in GPU performance.

For now, TSMC is actively planning the capacity for future 2nm process technology through the construction of two new factories. Additionally, TSMC will utilize new technology based on the GAAFET (Gate-All-Around Field-Effect Transistor) architecture instead of the traditional FinFET architecture.

While this new architecture makes the manufacturing process more complex, it also brings advantages such as smaller transistor sizes and lower power consumption.

The report further indicates that Apple is expected to adopt the 2nm process for chip production in the iPhone 17 by 2025. Additionally, the same technology will also be applicable to the production of Mac’s M-series chips. 

Furthermore, as TSMC is quietly developing 1.4nm process, it is expected to be unveiled in 2027. This development means that, like the 2nm process technology, Apple could potentially be the first company to receive the latest process technology from TSMC for chip production, whether it’s 1.4nm or 2nm.

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• [News] Samsung’s Discount Strategy Challenges TSMC as the Battle for 2nm Orders Heats Up
• [News] TSMC Responds to Rumors of New 1.4nm Fab

(Photo credit: NVIDIA)