While TSMC is making advancements on its 2nm at full throttle, an unexpected risk may be emerging, which might be more severe than most could imagine: power supply. Citing a report by S&P, a report by Wccftech highlights that compared with 2023, the foundry giant’s electricity consumption could nearly triple by 2030, accounting for about 24% of the island’s total electricity usage.

Another report by the Economic Daily News warns that the slow growth in Taiwan’s power generation may pose challenges to TSMC’s chip production, which requires high energy consumption.

Citing the data compiled by a S&P’s report titled “Power Is Increasingly A Credit Risk for TSMC,” Wccftech notes that in 2023, TSMC’s electricity consumption had reached nearly 250 GW, accounting 8% of Taiwan’s total electricity use and almost 16% of the industrial sector’s demand. However, by 2030, TSMC’s share of electricity consumption could soar significantly, contributing 23.7% of the island’s total power usage.

S&P’s calculation is based on the assumption that the TSMC’s wafer shipments will increase by 90% compared to 2023 levels, leading electricity consumption to soar to 794 GW in 2030, Wccftech notes.

It is worth noting that the S&P report, cited by Wccftech, also highlights that extreme ultraviolet (EUV) lithography systems, which are required for processes below 7nm, consume significantly more power than the older deep ultraviolet lithography systems (DUV).

The scenario would weigh heavily on semiconductor heavyweights as they are eagerly pursuing for more advanced nodes. TSMC’s move to 3nm chip production is fueling S&P’s projections of the company’s skyrocketing electricity consumption, Wccftech says.

To put things in context, the report also cites data from Taiwan’s state-owned electricity provider, TaiPower, to show that the island’s electricity reserve margin continues to fall short of the government’s 15% target. While the household electricity consumption continues to decline, TSMC’s power needs, in contrast, keeps growing.

Moreover, according to the Economic Daily News, which also cites S&P’s report, when the electricity reserve margin drops below 10%, the stability of the power supply can be affected.

Citing S&P’s report, the Economic Daily News states that the growth of Taiwan’s power supply is relatively limited. In addition, Taiwan’s policy of replacing cheaper coal and nuclear energy with natural gas and renewable energy will put more pressure on future electricity prices, which may also influence the stability of power supply.

Read more

• [News] TSMC Took Another Step in Advanced Process Expansion

(Photo credit: TSMC)

Though still be struggling with low yield rates in 3nm, Samsung is reportedly ramping up its efforts to prepare for the mass production of 2nm and 1.4nm to compete with its longtime rival, TSMC. Citing industrial sources on Oct. 3^rd, Business Korea reveals that the South Korean foundry giant is introducing equipment at the Hwaseong plant to establish a 2nm production line, while it also plans to set up a 1.4nm line in its Pyeongtaek 2 plant next year.

According to the report, this initiative is in line with Samsung’s goal to mass produce 2nm in 2025 and 1.4nm by 2027.

In terms of the capacity expansion of 2nm, Samsung aims to install a capacity of 7,000 wafers per month by the first quarter of next year in its S3 foundry line at Hwaseong, Business Korea states. It is worth noting that the existing 3nm line at S3 is expected to be fully converted to a 2nm line by the end of next year.

Then, starting in the second quarter of next year, Samsung plans to set up a 1.4nm production line at the S5 facility in its Pyeongtaek 2 plant, with a capacity of approximately 2,000 to 3,000 wafers per month, according to the report.

Unlike the aggressive expansion for its advanced nodes in South Korea, Samsung’s foundry project in Taylor, Texas, seems to be in stagnant. The company had reportedly planned to begin mass production of below-4nm nodes there by the end of 2024, but this has somehow been pushed back to 2026, which reflects the possible yield issues regarding 3nm node with GAA architecture Samsung has been eager to solve, the report suggests.

Due to a decline in client orders, Samsung’s management has decided to convert the foundry line at its Pyeongtaek 4 plant into DRAM facilities, the report points out. Additionally, the Pyeongtaek 3 plant, which features a 4nm line, has decreased its scale of operation for the same reason.

Analysts cited by the report estimate that Samsung Foundry might incur a deficit of several hundred billion won in the third quarter of this year, underscoring the financial pressures the company is experiencing.

As the delay of the 3nm Exynos seems to be irreversible, securing the success of 2nm has become a top priority for Samsung. Business Korea indicates that the testing of Samsung’s 2nm will be conducted on the next-generation Exynos chip, codenamed “Tethys.” Evaluations may also be said to extend to chips from Qualcomm, Japan’s Preferred Networks (PFN), and Ambarella.

Read more

• [News] Samsung Reportedly Suspends Construction and Contract Plans for Pyeongtaek P4 and Taylor Plant 2
• [News] Samsung Reportedly Buckling Under Pressure, with Plans to Cut Overseas Workforce by Up to 30%

(Photo credit: Samsung)

Samsung’s foundry business has been facing difficulties with its advanced chip processes, particularly with its 3-nanometer production. According to a report from The Korea Times, the yield for Samsung’s 3nm process remained in the single digits until Q1 this year, causing delays in supplying engineering samples for its Exynos 2500 chipsets.

The same report notes that local analysts estimate Samsung’s yield for its 3-nanometer process improved to about 20% in the second quarter. Despite this progress, the yield rate is still significantly below the 60% threshold generally needed for mass production, creating challenges for the company in securing foundry orders.

Reflecting this situation, Samsung appears to have shifted its strategy for its newest facility, the P4 fab in Pyeongtaek, Gyeonggi Province. Instead of initially installing equipment for NAND and then moving to foundry products, Samsung is now prioritizing advanced DRAM memory production, such as high-bandwidth memory (HBM) chips. Industry sources cited by The Korea Times suggest that this shift comes as a result of weak demand for its foundry services. There is growing speculation that Samsung might even dedicate the P4 fab entirely to memory chip production, driven by the steady demand for HBM and other advanced memory types used in AI servers.

These developments also cast uncertainty on Samsung’s investment in its Taylor, Texas plant. The company had originally planned to begin mass production of 4-nanometer chips there next year, but this has now been pushed back to 2026. Although the yield for the 4nm process is reportedly stable, Samsung continues to face challenges in securing orders from fabless companies.

This situation has led to speculation that Samsung may pivot to focusing on more advanced 2-nanometer chips instead of 4-nanometer ones to attract orders for next-generation products. However, reports indicate that the company is also struggling to achieve high yields for both its 2nm and 3nm processes.

Low yields have been a key factor behind Samsung’s ongoing struggles in its foundry business, according to industry insiders cited by The Korea Times. While the company has managed to stabilize yields for its 4nm process, more advanced nodes like the second-generation 3nm and 2nm processes remain problematic.

Adding to the challenges, a report from Business Korea on September 11th highlighted that continued yield issues with the 2nm process have prompted Samsung to withdraw personnel from its Taylor, Texas plant, marking another setback for its advanced wafer foundry ambitions.

Read more

• [News] Samsung’s 2nm Yield Rate at Most 20%, Withdraws Personnel from Texas Taylor Plant

(Photo credit: Samsung)

According to a report from The Chosun Daily, major tech companies like NVIDIA are considering using Intel’s foundry services (IFS) as an alternative due to TSMC’s packaging capacity shortages. While packaging is a core competency for semiconductor foundries, Samsung, which is facing difficulties in attracting customers, will need to exert maximum effort to secure orders.

It’s highlighted by the report that the demand for AI accelerators is growing rapidly, but TSMC’s AI chip production capacity is unable to keep up.

Furthermore, per The Chosun Daily citing sources, major clients like NVIDIA and Apple have secured TSMC’s 3nm advanced process capacity, pushing order backlogs into 2026.

Therefore, major tech companies seeking alternatives are turning to Intel’s IFS. Since Intel’s Foveros is said to be comparable to TSMC’s CoWoS-S, it has made Intel’s advanced packaging a viable option to ensure supply.

TSMC and Intel offer advanced packaging services to customers under the names CoWoS and Foveros, respectively. Both CoWoS and Foveros are advanced packaging technologies that connect two or more semiconductor chips on a wafer and then place them onto a packaging substrate.

Reportedly, in addition to NVIDIA and Microsoft, Amazon and Cisco are considering outsourcing to Intel Foundry to reduce their dependence on TSMC.

The report further emphasizes that this market trend is likely to cause anxiety for Samsung, which competes with TSMC and Intel in advanced processes.

Recently, Samsung’s former clients, Google and Qualcomm, have chosen TSMC, while Intel, seen as a latecomer, is catching up by securing advanced packaging orders from major tech companies, potentially narrowing the gap with Samsung.

Kim Hak-sung, head of Hanyang Institute of Smart Semiconductor, said that packaging is a technology that critically influences customer acquisition in the AI semiconductor era, where various types of chips are interconnected.

He noted that although there may not be a substantial technical capabilities difference between Samsung Electronics and Intel, as mass production experience allows the process to stabilize and become more appealing to customers.

Kim eventually addressed that to stay competitive, Samsung needs to focus on capturing the volumes that TSMC cannot accommodate, positioning itself ahead of Intel.

Read more

• [News] TSMC Reportedly to Raise 3nm & 5nm Prices Soon, Looking to Maintain Long-Term Profit Margins 
• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
  

(Photo credit: Samsung)

According to a report from wccftech, leading semiconductor foundry TSMC is preparing to increase the prices of its 3nm and 5nm processes. Reportedly, this move is said to maintain its long-term gross profit margin of 53% and secure its leadership position in the semiconductor foundry market.

The report notes that considering the high demand for AI, along with orders for consumer products from IC design companies like Apple and Qualcomm, TSMC’s production capacity remains tight.

Therefore, TSMC is reportedly planning to increase the prices of its advanced processes, such as 3nm and 5nm, by 8%, thereby ensuring stable long-term profit margins. Notably, a previous report from Commercial Times have cited sources, indicating that NVIDIA CEO Jensen Huang once agreed that TSMC’s pricing is too low and will support its price increase actions.

Although the price increase has been rumored for some time, the sources cited by wccftech indicate that TSMC may implement the hike soon.

Currently, TSMC’s 3nm and 5nm process utilization rates are at 100%, indicating complete market dominance in these processes. This already allows TSMC to profit significantly, and the price increase will further benefit their operations.

In addition to advanced processes, there are rumors that TSMC is also raising the price of CoWoS packaging due to the massive demand for AI chips from AMD and NVIDIA. Although specific figures have not been disclosed, TSMC’s rapid expansion of its CoWoS production lines makes the price increase likely.

It’s previously estimated by sources cited in MoneyDJ’s report that TSMC’s CoWoS capacity remains in short supply, at 35,000 to 40,000 wafers per month this year. With the additional outsourced capacity, next year’s production could reach over 65,000 wafers per month, or possibly higher.

Read more

• [News] CoWoS Booming, TSMC Price Hikes Reportedly Imminent
• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price

(Photo credit: TSMC)