While TSMC faces overwhelming demand for its 3nm technology, with orders from major clients like Apple and NVIDIA pouring in, Intel has now announced its progress on the 3nm technology. According to the latest report by Tom’s Hardware, Intel 3 has entered high-volume production at two sites, the Oregon and Ireland factories, with datacenter-related applications being the node’s primary focus.

However, the capacity seems to be mainly allocated to in-house chips for now. Citing Walid Hafez, Vice President of Foundry Technology Development at Intel, the report notes that Intel’s recently launched Xeon 6 “Sierra Forest” and “Granite Rapids” processors are being manufactured with the company’s 3nm node. Eventually, Intel will utilize this production node to produce datacenter-grade processors for its customers, the report states.

According to Tom’s Hardware, in addition to the standard Intel 3, Intel will also provide various versions for its 3nm node. The semiconductor giant plans to offer Intel 3T, which supports through silicon vias and can serve as a base die. Looking ahead, Intel aims to introduce the feature-enhanced Intel 3-E for chipsets and storage applications, as well as the performance-enhanced Intel 3-PT, designed for various workloads such as AI, HPC, and general-purpose PCs.

According to the report, the Intel 3 process offers both higher performance and increased transistor density, and it supports 1.2V for ultra-high-performance applications. In terms of performance, Intel claims that the new node will deliver an 18% improvement compared to Intel 4.

Regarding major competitors’ development on the 3nm node, TSMC is reported to receive strong demand from clients like Apple and NVIDIA, booking its capacity through 2026, and possibly leading to a price increase by over 5% in the node.

Like Intel, TSMC also offers various choices for its 3nm process. The members of TSMC’s 3nm family include N3, N3E, N3P, as well as N3X and N3A.

As the existing N3 technology continues to be upgraded, N3E, which began mass production in the fourth quarter of last year, targets applications such as AI accelerators, high-end smartphones, and data centers.

N3P is scheduled for mass production in the second half of this year and is expected to become mainstream for applications in mobile devices, consumer products, base stations, and networking through 2026. N3X and N3A are customized for high-performance computing and automotive clients.

On the other hand, Samsung’s second-generation 3nm production line in South Korea will reportedly commence operations in the latter half of this year  The first product to be manufactured on this line will reportedly be the application processor (AP) for the upcoming Galaxy Watch7, tentatively named “Exynos W1000,” which is expected to be unveiled in July.

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(Photo credit: Intel)

Taiwan’s semiconductor giant, TSMC, faces overwhelming demand for its 3nm technology, with major clients like Apple and NVIDIA fully allocate its production capacity.

According to a report from Commercial Times, orders are expected to be filled through 2026. Reportedly, TSMC is planning to raise its 3nm prices by over 5%, and advanced packaging prices are anticipated to increase by approximately 10% to 20% next year.

The members of TSMC’s 3nm family include N3, N3E, N3P, as well as N3X and N3A. As the existing N3 technology continues to be upgraded, N3E, which began mass production in the fourth quarter of last year, targets applications such as AI accelerators, high-end smartphones, and data centers.

N3P is scheduled for mass production in the second half of this year and is expected to become mainstream for applications in mobile devices, consumer products, base stations, and networking through 2026. N3X and N3A are customized for high-performance computing and automotive clients.

Source: TSMC

Per the industry sources cited by the same report, TSMC’s Zhunan advanced packaging plant (AP6), operational for a year now, has become Taiwan’s largest CoWoS base with the equipment moved into its AP6C plant. In the third quarter, CoWoS monthly production capacity is expected to double from 17,000 to 33,000 wafers.

Industry sources cited by the report further suggests that while AI accelerators do not use the most cutting-edge manufacturing processes, they rely heavily on advanced packaging technology. The ability of global semiconductor companies to secure more advanced packaging capacity from TSMC will determine their market penetration and control.

TSMC’s advanced packaging capacity is scarce, with primary customer NVIDIA having the highest demand, occupying about half of the capacity, followed closely by AMD. Broadcom, Amazon, and Marvell have also expressed strong interest in using advanced packaging processes. With gross margins close to 80%, NVIDIA is said to agree to price increases to secure more advanced packaging capacity, thereby distancing itself from competitors.

Previously, NVIDIA CEO Jensen Huang emphasized that TSMC is not just manufacturing wafers but also handling numerous supply chain issues. He also agreed that the current pricing is too low and would support TSMC’s price increase actions.

The industry sources cited by Commercial Times have indicated that TSMC plans to add CoWoS-related equipment by the third quarter and has requested equipment manufacturers to dispatch more engineers to fully staff its Longtan AP3, Zhunan AP6, and Central Taiwan Science Park AP5 plants.

In addition to Zhunan’s AP6C, the Central Taiwan Science Park plant, which originally only handled the latter stages of oS, will also gradually transition to CoW processes. Meanwhile, the Chiayi site is in the land preparation stage and is expected to progress faster than Tongluo.

Reportedly, industry sources further reveal that the prices for advanced process nodes such as 3nm and 5nm will also be adjusted. Particularly, strong demand for 3nm orders in the second half of the year is expected to drive utilization rates to near full capacity, extending through 2025. The 5nm process is experiencing similar demand dynamics, driven by AI needs.

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(Photo credit: TSMC)

With the United States expected to further restrict China from acquiring advanced GAA (Gate-All-Around) chip architecture capabilities, coupled with reports of poor yield rates in Samsung’s 3nm GAA generation, the semiconductor industry sources cited in a report from Commercial Times state that TSMC’s 3nm FinFET process is enjoying dominance. Reportedly, due to the high demand and limited supply capacity, upstream IC design companies are beginning to report price hikes.

Seven global tech giants, including NVIDIA, AMD, Intel, Qualcomm, MediaTek, Apple, and Google, are set to gradually adopt TSMC’s 3nm process. As per the sources cited in the report from Commercial Times, Qualcomm’s Snapdragon 8 Gen 4, built using TSMC’s N3E process, has seen a price increase of 25% compared to the previous generation, potentially triggering a subsequent trend of price hikes.

Samsung was the first to commence mass production of 3nm chips using the GAA process in June 2022. However, the first-generation N3 node, SF3E, did not achieve significant success and was initially limited to cryptocurrency applications. Subsequently, the yield rate for its own Exynos 2500 chip also fell short of expectations.

Additionally, Google’s Tensor processors, which are manufactured by Samsung, still use Samsung’s 4nm process in their fourth generation. However, it is said in the report that the fifth generation will switch to TSMC’s 3nm process.

In the second half of the year, numerous AI products will be launched in the consumer market. Among the three major players in the mobile chip market, Qualcomm’s Snapdragon 8 Gen 4, MediaTek’s Dimensity 9400, and Apple’s A18 and M4 series will all be built using TSMC’s N3 family. Moreover, Google’s Tensor G5 will also compete in the market.

It is rumored that Qualcomm’s Snapdragon 8 Gen 4 has already initiated the first wave of price increases. The industry sources cited in the report claim that the procurement cost of mobile chips was already high, with last year’s flagship 8 Gen 3 costing around USD 200. This year’s flagship chip might exceed USD 250. Whether competitors will follow suit remains to be seen.

However, industry sources cited by the report also point out that the price increase is within a reasonable range. Compared to the 5nm process, the cost per wafer for the 3nm process is about 25% higher. This increase does not yet take into account overall wafer quantities and design architecture factors.

TSMC President C.C. Wei has also revealed that TSMC products are highly power-efficient and have better yield rates. When considering the cost per chip, TSMC is the most cost-effective.

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• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price

(Photo credit: TSMC)

The continuous increase in silicon content driven by AI servers, high-performance computing (HPC) applications, and the AI integration of high-end smartphones has led to a surge in demand for semiconductors. According to a report from the Economic Daily News, major companies such as Apple, Qualcomm, NVIDIA, and AMD are reportedly securing substantial production capacity for TSMC’s 3nm process family. This has resulted in a queue of clients stretching all the way to 2026.

TSMC has a consistent policy of not commenting on individual client information. Regarding whether the high demand for production capacity will lead to price increases to reflect its value, TSMC emphasizes that its pricing strategy is always strategically oriented rather than opportunistically driven. TSMC will continue to work closely with clients to provide value.

As per sources cited by the same report, TSMC is not a company that raises prices arbitrarily. Reflecting value does not equate directly to price increases, even though the company holds a leading edge in advanced process technology. There are various ways for TSMC to demonstrate value to its customers.

The members of TSMC’s 3nm family include N3, N3E, N3P, as well as N3X and N3A. As the existing N3 technology continues to be upgraded, N3E, which began mass production in the fourth quarter of last year, targets applications such as AI accelerators, high-end smartphones, and data centers. N3P is scheduled for mass production in the second half of this year and is expected to become mainstream for applications in mobile devices, consumer products, base stations, and networking through 2026. N3X and N3A are customized for high-performance computing and automotive clients.

Source: TSMC

Industry sources cited by Economic Daily News in the report believe that with clients rushing to book production capacity, TSMC’s 3nm family will continue to experience tight supply over the next two years. This does not yet include Intel’s outsourcing demand for CPUs.

Due to the fact that TSMC’s 3nm family production capacity has already been fully allocated by customers for this year and next, the company’s plan to triple the relevant capacity this year compared to last year is still insufficient. To ensure an uninterrupted supply for the next two years, TSMC has implemented several measures to expand its production capacity.

Previously, during an earnings call, the company announced that due to robust demand, its strategy includes converting some 5nm equipment to support 3nm production. Industry sources cited by the report also reveal that TSMC’s total 3nm family capacity is continuously increasing, with monthly production capacity expected to reach between 120,000 and 180,000 wafers.

Meanwhile, the sources cited by the Economic Daily News indicate that the main sources of orders for TSMC’s 3nm family include major clients such as Apple, Qualcomm, NVIDIA, and AMD. Apple is expected to launch the iPhone 16 series as early as September, which is anticipated to be the first iPhone with AI capabilities, potentially sparking a new wave of upgrades among Apple fans.

Source: TSMC

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(Photo credit: TSMC)

According to a report on May 29th from The Korea Economic Daily, it has speculated that AMD is likely to become a customer of Samsung Electronics’ 3nm GAA process. Reportedly, during AMD CEO Lisa Su’s appearance at the 2024 ITF World, which was hosted by the Belgian microelectronics research center imec, Lisa Su revealed that AMD plans to use the 3nm GAA process for mass-producing next-generation chips.

As per the same report, Lisa Su stated that 3nm GAA transistors can enhance efficiency and performance, with improvements in packaging and interconnect technology. This will make AMD products more cost-effective and power-efficient. The report further addresses that Samsung is currently the only chip manufacturer with commercialized 3nm GAA process technology.

Samsung announced in June, 2022, that it has started initial production of its 3 nm process node applying Gate-All-Around (GAA) transistor architecture. It claims that compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.

An industry source cited by the report indicated that Su’s remarks could be interpreted as AMD planning to officially collaborate with Samsung on 3nm technology. Reports suggest that AMD is preparing to partner with Samsung, as TSMC’s 3nm production capacity has been fully booked by customers like Apple and Qualcomm.

The collaboration between the two companies could be traced back to April this year, as per a report from Korean media outlet viva100, Samsung was said to had signed a new USD 3 billion agreement with processor giant AMD to supply HBM3e 12-layer DRAM for use in the Instinct MI350 series AI chips. Reportedly, Samsung also agreed to purchase AMD GPUs in exchange for HBM products, although details regarding the specific products and quantities involved remain unclear.

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(Photo credit: AMD)