According to a report on May 29th from The Korea Economic Daily, it has speculated that AMD is likely to become a customer of Samsung Electronics’ 3nm GAA process. Reportedly, during AMD CEO Lisa Su’s appearance at the 2024 ITF World, which was hosted by the Belgian microelectronics research center imec, Lisa Su revealed that AMD plans to use the 3nm GAA process for mass-producing next-generation chips.

As per the same report, Lisa Su stated that 3nm GAA transistors can enhance efficiency and performance, with improvements in packaging and interconnect technology. This will make AMD products more cost-effective and power-efficient. The report further addresses that Samsung is currently the only chip manufacturer with commercialized 3nm GAA process technology.

Samsung announced in June, 2022, that it has started initial production of its 3 nm process node applying Gate-All-Around (GAA) transistor architecture. It claims that compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.

An industry source cited by the report indicated that Su’s remarks could be interpreted as AMD planning to officially collaborate with Samsung on 3nm technology. Reports suggest that AMD is preparing to partner with Samsung, as TSMC’s 3nm production capacity has been fully booked by customers like Apple and Qualcomm.

The collaboration between the two companies could be traced back to April this year, as per a report from Korean media outlet viva100, Samsung was said to had signed a new USD 3 billion agreement with processor giant AMD to supply HBM3e 12-layer DRAM for use in the Instinct MI350 series AI chips. Reportedly, Samsung also agreed to purchase AMD GPUs in exchange for HBM products, although details regarding the specific products and quantities involved remain unclear.

Read more

• [News] Samsung Reportedly Signs USD 3 Billion HBM3e Deal with AMD
• [News] AI Chip Alone Can’t Hold Up? AMD’s Fiscal Forecast This Quarter Reportedly Falls Short of Expectations

(Photo credit: AMD)

According to a report from TechNews, TSMC held a technology forum on May 23, where Senior Fab Director pointed out that benefiting from HPC and mobile phone demands, the 3nm production capacity this year has more than tripled compared to last year, but this is actually still not enough, so efforts are still being made to meet customer demand.

During the forum, TSMC also indicated that its compound annual growth rate (CAGR) in advanced processes below 7nm surpassed 25% from 2020 to 2024. Moreover, TSMC remains committed to investment, with capital expenditure in 2024 increasing by 10% compared to the preceding four years.

Due to the booming demand for AI and HPC, TSMC is actively expanding its capacity for advanced processes. Huang stated that TSMC’s capacity for SoIC and CoWoS is experiencing CAGRs exceeding 100% and 60%, respectively, from 2022 to 2026.

The topic of TSMC’s manufacturing has always been a focus of the industry. In the past, it was presented by Executive Vice President and Co-Chief Operating Officer Y.P. Chyn, Vice President of Fab Operations I Dr. Y.L. Wang, and TSMC Vice President of Advanced Technology and Mask Engineering Dr. T.S. Chang. This time, it is presented for the first time by the key driver of the most advanced process and plant-level executives in Taiwan.

He mentioned that the share of TSMC’s special processes in maturity has also steadily increased, from 61% in 2020 to the target of 67% in 2024.

Huang further pointed out that TSMC averaged the construction of five fabs per year  between 2022 and 2023, increasing to seven this year. Among them are three fabs, two packaging plants, and two overseas facilities.

Fab 20 in Hsinchu and Fab 22 in Kaohsiung are both 2nm fabs, progressing smoothly and expected to commence production next year.

Taichung AP5 is expanding its capacity to meet the needs for CoWoS production, while the recently announced advanced packaging investment in Chiayi is for CoWoS and SOIC production.

In terms of global deployment, three fabs are planned in Arizona, USA. The first fab is already had its first tool-in, set to commence 4nm production next year, while the second fab is scheduled for 2028 production, and the third fab is expected to begin production by the end of the 2020s. In Japan, Kumamoto Fab 1 is slated for production in the fourth quarter of this year, with Fab 2 set for production in 2027.

In Europe, the Dresden fab will offer 16nm technology, with construction beginning in the fourth quarter of this year and production slated for 2027, mainly to meet European customer needs. Additionally, Nanjing Fab 16 in China continues to expand its 28nm capacity.

When discussing the application of EUV technology, he mentioned that TSMC’s EUV machine count has grown tenfold since 2019, now accounting for 65% of the global total. Both wafer output and efficiency have significantly increased along with learning.

Read more

• [News] TSMC’s Nanjing Plant Reportedly Pushes for Indefinite Exemption From US Before the May 31 Deadline
• [News] TSMC More Ambitious on CoWoS Capacity Expansion, Targeting 60% CAGR by 2026

(Photo credit: TSMC)

With the skyrocketing demand for AI, cloud service providers (CSPs) are hastening the development of in-house chips. Apple, making a surprising move, is actively developing a data center-grade chip codenamed “Project ACDC,” signaling its foray into the realm of AI accelerators for servers.

As per a report from global media The Wall Street Journal, Apple is developing an AI accelerator chip for data center servers under the project name “Project ACDC.” Sources familiar with the matter revealed that Apple is closely collaborating with TSMC, but the timing of the new chip’s release remains uncertain.

Industry sources cited by the same report from Commercial Times disclosed that Apple’s AI accelerator chip will be developed using TSMC’s 3-nanometer process. Servers equipped with this chip are expected to debut next year, further enhancing the performance of its data centers and future cloud-based AI tools.

Industry sources cited in Commercial Times‘ report reveal that cloud service providers (CSPs) frequently choose TSMC’s 5 and 7-nanometer processes for their in-house chip development, capitalizing on TSMC’s mature advanced processes to enhance profit margins. Additionally, the same report also highlights that major industry players including Microsoft, AWS, Google, Meta, and Apple rely on TSMC’s advanced processes and packaging, which significantly contributes to the company’s performance.

Apple has consistently been an early adopter of TSMC’s most advanced processes, relying on their stability and technological leadership. Apple’s adoption of the 3-nanometer process and CoWoS advanced packaging next year is deemed the most reasonable solution, which will also help boost TSMC’s 3-nanometer production capacity utilization.

Generative AI models are rapidly evolving, enabling businesses and developers to address complex problems and discover new opportunities. However, large-scale models with billions or even trillions of parameters pose more stringent requirements for training, tuning, and inference.

Per Commercial Times citing industry sources, it has noted that Apple’s entry into the in-house chip arena comes as no surprise, given that giants like Google and Microsoft have long been deploying in-house chips and have successively launched iterative products.

In April, Google unveiled its next-generation AI accelerator, TPU v5p, aimed at accelerating cloud-based tasks and enhancing the efficiency of online services such as search, YouTube, Gmail, Google Maps, and Google Play Store. It also aims to improve execution efficiency by integrating cloud computing with Android devices, thereby enhancing user experience.

At the end of last year, AWS introduced two in-house chips, Graviton4 and Trainium2, to strengthen energy efficiency and computational performance to meet various innovative applications of generative AI.

Microsoft also introduced the Maia chip, designed for processing OpenAI models, Bing, GitHub Copilot, ChatGPT, and other AI services.

Meta, on the other hand, completed its second-generation in-house chip, MTIA, designed for tasks related to AI recommendation systems, such as content ranking and recommendations on Facebook and Instagram.

Read more

• [News] Breaking Away from NVIDIA Dependency, Microsoft Reportedly Developing In-House AI Server High-Speed Network Card
• [Insights] AI Market: A Battleground for Tech Giants as Six Major Companies Develop AI Chips

(Photo credit: Apple)

In a bid to seize the AI PC market opportunity, Apple is set to debut its new iPad Pro on the 7th, featuring its in-house M4 chip. With the momentum of the M4 chip’s strong debut, Apple reportedly plans to revamp its entire Mac lineup. The initial batch of M4 Macs is estimated to hit the market gradually from late this year to early next year.

It’s reported by a report from Commercial Times that Apple’s M4 chip adopts TSMC’s N3E process, aligning with Apple’s plans for a major performance upgrade for Mac, which is expected to boost TSMC’s operations.

Notably, per Wccftech’s previous report, it is rumored that the N3E process is also used for producing products like the A18 Pro, the upcoming Qualcomm Snapdragon 8 Gen 4, and the MediaTek Dimensity 9400, among other major clients’ products.

Apple held an online launch event in Taiwan on May 7th at 10 p.m. Per industry sources cited by the same report, besides introducing accessories like iPad Pro, iPad Air, and Apple Pencil, the event will mark the debut of the M4 self-developed chip, unveiling the computational capabilities of Apple’s first AI tablet.

With major computer brands and chip manufacturers competing to release AI PCs, such as Qualcomm’s Snapdragon X Elite and X Plus, and Intel introducing Core Ultra into various laptop brands, it is imperative for Apple to upgrade the performance of its products. Therefore, the strategy of highlighting AI performance through the M4 chip comes as no surprise.

According to a report by Mark Gurman from Bloomberg, the M4 chip will be integrated across Apple’s entire Mac product line. The first batch of M4 Macs is said to be expected to debut as early as the end of this year, including new iMac models, standard 14-inch MacBook Pro, high-end 14-inch and 16-inch MacBook Pro, and Mac mini. New products for 2025 will also be released gradually, such as updates to the 13-inch and 15-inch MacBook Air in the spring, updates to the Mac Studio in mid-year, and finally updates to the Mac Pro.

The report from Commercial Times has claimed that the M4 chip will come in three versions: Donan, Brava, and Hidra. The Donan variant is intended for entry-level MacBook Pro, MacBook Air, and low-end Mac mini models. The Brava version is expected to be used in high-end MacBook Pro and Mac mini models, while the Hidra version will be integrated into desktop Mac Pro computers.

Apple’s plan to introduce the M4 chip into its Mac series is expected to boost the revenue of TSMC’s 3-nanometer family. The report has indicated that the M4 chip will still be manufactured using TSMC’s 3-nanometer process, but with enhancements to the neural processing engine (NPU), providing AI capabilities to Apple’s product line. Additionally, industry sources cited by the same report have revealed that the M4 will utilize TSMC’s N3E process, an improvement over the previous N3B process used in the M3 series chips.

Meanwhile, TSMC continues to advance its existing advanced process node optimization versions. Among them, the N3E variant of the 3-nanometer family, which entered mass production in the fourth quarter of last year, will be followed by N3P and N3X. Currently, N3E is highly likely to be featured in the new generation iPad Pro.

Source: TSMC

Read more

• [News] Apple Rumored to Develop In-House AI Processor for Mass Production in the Second Half of 2025
• [News] Apple Reportedly Releases Supply Chain List, Nanya Technology, Lotes, and Novatek Not Included

(Photo credit: Apple)

The semiconductor battleground of the Angstrom Era has commenced earlier than expected, with TSMC advancing its plant expansions in Taiwan. As per Commercial Times citing sources, TSMC is poised to increase its 2024 capital expenditure from the initial estimate of USD 28-32 billion to USD 30-34 billion, marking a hike of over 7%.

TSMC’s continuous plant expansion includes the initiation of the first 2-nanometer plant in Hsinchu’s Baoshan facility in April, the addition of another 2-nanometer plant in Kaohsiung, and the commencement of construction for two advanced packaging plants in Chiayi. Furthermore, there are market rumors speculating that TSMC plans to build two more A14 plants in Kaohsiung.

According to industry sources cited by the report, TSMC’s earnings call on April 18th will mark a significant milestone as the company transitions to the next generation of manufacturing processes. Expectations are high for surprises in capital expenditure, second-quarter operating prospects, and the nomination list for new directors.

During TSMC’s January earnings call, they disclosed a capital expenditure estimate of approximately USD 28-32 billion for this year. However, with NVIDIA’s recent unveiling of the Blackwell architecture, advanced packaging has become almost indispensable for next-generation chips. Major customers for advanced packaging, including NVIDIA, Broadcom, Marvell, and AMD, are all closely linked to AI.

Per the same report citing sources, it’s revealed by Commercial Times citing sources near TSMC’s clients that the current waiting time remains as long as six months, as capacity ramp-up continues to chase demand. It is widely expected that TSMC will increase its capital expenditure, with the lower bound potentially surpassing USD 28 billion to over USD 30 billion.

From an operational standpoint, TSMC is expected to benefit this year from the surge in demand for artificial intelligence. Analysts predict that AI clients will support TSMC’s second-quarter revenue momentum, with the potential to deliver low single-digit quarterly growth.

Per the report citing sources, the positive outlook for TSMC’s second quarter can be attributed to several factors. These include stable demand for TSMC’s 4nm and 5nm processes with support from NVIDIA’s GPUs. Additionally, it is speculated that the 3nm process will benefit from cryptocurrency clients and early orders for Apple’s AI chips, boosting capacity utilization. Furthermore, there is an upward trend in the mature 16nm and 28nm processes.

Per the industry sources cited by the report, TSMC’s CoWoS capacity is fully booked until the first half of next year. This will drive up the revenue contribution from TSMC’s 3nm process. Furthermore, the outsourcing orders for Intel CPUs this year will further boost revenue growth.

Additionally, on June 4th, TSMC will hold elections for ten directors, including six independent directors. The list of director candidates is about to be announced, attracting significant attention to the new team lineup. With the current Chairman, Mark Liu, announcing his succession, and independent director K.C. Chen planning to retire, significant changes in the TSMC board of directors’ composition are anticipated.

Read more

• [News] Three Major Giants Vying for TSMC’s 3-Nanometer Production Capacity
• [News] Blackwell Enters the Scene – A Closer Look at TSMC’s CoWoS Branch

(Photo credit: TSMC)