Equipment is playing an indispensable role during the wafer manufacturing process. In response to market needs, the global EUV lithography supplier, ASML, has recently taken significant steps.

ASML’s Bold Move: Annual Investment of EUR 100 Million in Berlin Plant

As reported by the German media “Handelsblatt,” the Netherlands-based company ASML plans to invest EUR 100 million (USD 109 million) in 2023, with a similar annual investment in the subsequent years. This investment aims to enhance the production and development capabilities of ASML’s manufacturing plant located in Berlin, Germany.

Reports indicate that ASML’s Berlin plant primarily produced core components of EUV equipment, including wafer clamps, wafer tables, reticle chucks and mirror blocks. ASML acquired this facility, known as “Berliner Glas,” in 2020.

Foundries Actively Pursue EUV equipment

The EUV equipment plays a crucial role in manufacturing, utilizing specific wavelength light for radiation to precisely imprint images on wafers. Currently, the EUV equipment market is highly concentrated, with only a few global companies mastering this technology. Among them, Dutch company ASML stands out as the world’s largest and most advanced EUV company. Additionally, companies like Nikon, Canon, and Shanghai Micro Electronics Equipment (SMEE) are strategically positioning themselves in the EUV sector.

EUV technology, used for exposing semiconductor process, is indispensable due to its high cost, complex processes, and limited supply. ASML is the sole global supplier of EUV. For advanced processes below 7nm, EUV serves as an essential device. Developed over more than 20 years, EUV technology has become the cornerstone of advanced processes, enabling the continuation of Moore’s Law for at least another decade.

As a crucial EUV equipment supplier, ASML is working on a new generation of NA-EUV equipment, where “NA” represents numerical aperture. A higher NA value means a higher achievable resolution, allowing for more transistors on the chip. It is expected that by the year-end, ASML will unveil the world’s first high-NA EUV and deliver it to Intel.

Currently, both TSMC and Samsung utilize EUV equipment for manufacturing, covering TSMC’s 7nm, 5nm, and 3nm processes and Samsung’s EUV Line (7nm, 5nm, and 4nm) located in Hwaseong, Korea, along with the 3nm GAA process.

TSMC’s 2nm process will continue to leverage EUV technology. In a previous announcement in September, TSMC disclosed the acquisition of Intel’s subsidiary IMS for up to US 432.8 million, focusing on the research and production of electron beam lithography machines. Industry experts believe that TSMC’s move ensures the technical development of critical equipment and meets the supply demand for the commercialization of 2nm.

Following 2nm chips. Samsung plans to achieve mass production of 2nm processes in the mobile field by 2025, expanding to HPC and automotive electronics in 2026 and 2027, respectively. According to the report in September, Samsung is gearing up to secure the yield of the next-generation EUV equipment, High-NA, with the prototype expected to launch later this year and official supply next year.

After announcing its return to the foundry business, Intel revealed in October that it has commenced mass production of Intel 4 process nodes using EUV technology. Currently, both Intel 7 and Intel 4 have achieved mass production, and Intel 3 is progressing according to plan, with the goal of completion by the end of 2023.

(Image: ASML)

According to TechNews’ report, Gitae Jeong, Vice President of Samsung Electronics, recently revealed in an interview that the company is set to introduce the SF1.4 (1.4nm) process, expected to enter mass production in 2027.

This announcement intensifies the competition in advanced semiconductor manufacturing, particularly in the development of 2.5D/3D integrated heterogeneous structure packaging among the three major semiconductor foundry giants.

• TSMC: N3P Process Superior to Intel 18A, N2 to Lead Industry’s Advanced Processes

Previously, the semiconductor industry reported challenges with both TSMC and Samsung achieving yields above 60% for their 3nm processes due to undisclosed issues. TSMC’s yield was reported to be only 55%, below the normal yield rate.

However, TSMC’s President, C.C. Wei, expressed optimism, stating that current N3 demand is better than three months ago, contributing to a healthy growth outlook for TSMC in 2024.

Wei also anticipates that TSMC’s 3nm process will contribute a mid-single-digit percentage (4%-6%) to the company’s annual wafer revenue in 2023.

Regarding competition with rival Intel’s 18A process, Wei believes that TSMC’s N3P process offers better performance, power, and area (PPA), alongside improved cost efficiency and technical maturity. Furthermore, TSMC’s upcoming N2 process is expected to be the industry’s most advanced when introduced.

• Intel: Striving for the Fourth Customer for 18A Process Outsourcing Orders

Intel’s CEO, Pat Gelsinger, has revealed that the 18A process has secured orders from three customers and aims to acquire a fourth customer by the end of the year. The advanced 18A process is scheduled to begin production at the end of 2024, with one customer already having made an advance payment. External expectations suggest that the customer could possibly be NVIDIA or Qualcomm.

Intel has stated that Intel 4 and Intel 3 processes are similar, as are Intel 20A and Intel 18A processes. Consequently, Intel’s primary focus will be on offering Intel 3 and Intel 18A to semiconductor foundry customers. Meanwhile, Intel 4 and Intel 20A processes are more likely to be used internally. However, Intel is open to accommodating customer requests if they express interest in adopting these later processes.

• Samsung: Commencing Mass Production of SF2 in 2025, Prioritizing Internal Use

Due to challenges with the three-nanometer (3nm) manufacturing process, there have been reports that Samsung plans to shift directly to the more advanced two-nanometer (2nm) process.

According to Samsung’s Foundry Forum (SFF) plan, they will begin mass production of the 2nm process (SF2) in 2025 for mobile applications, expand to high-performance computing (HPC) applications in 2026, and further extend to the automotive sector and the expected 1.4nm process by 2027.

Similar to Intel, Samsung intends to prioritize the production of its own products using the 2nm process. The 2nm process products will initially be utilized for Samsung’s in-house products rather than external customer products.

• Summary

While TSMC’s N3 series currently enjoys broad support, including N3E, N3X, and N3P process series, the move to 2nm introduces new variables as it adopts a completely new GAAFET architecture. Regardless, whether it’s TSMC’s N2, Intel’s 18A, or Samsung’s SF2, each of them possesses its competitive strengths. The industry is also eagerly anticipating the future developments in advanced semiconductor processes.

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• [News] Progress and Adoption of Advanced Processes by Samsung, Intel, and TSMC

According to a report by Taiwan’s Economic Daily, TSMC is set to hold its Q3 earnings conference on October 19th. The market is eagerly anticipating insights from the company’s top executives on six key areas: the latest semiconductor market outlook, Q3 financial forecasts, the status of 3-nanometer chip orders, progress in advanced packaging expansion, capital expenditure updates, and the latest developments in the AI market.

During the conference, TSMC will also unveil its financial results for the previous quarter. Analysts are expecting TSMC’s Q3 consolidated revenue, when measured in USD, to grow by nearly 10%, with a chance of gross margin exceeding the company’s estimated median of 52.5%. This suggests that Q3 profits are likely to surpass those of Q2.

TSMC has already announced its combined revenue for July and August, which totaled NT$366.3 billion. Based on TSMC’s financial forecasts, Q3 consolidated revenue is expected to reach between $16.7 billion and $17.5 billion USD. Using an exchange rate of 30.8 NT dollars per USD, this translates to an expected consolidated revenue in NT dollars ranging from NT$514.4 billion to NT$539 billion.

In the first half of the year, TSMC’s capital expenditure was $9.94 billion in Q1 and $8.17 billion in Q2, totaling $18.11 billion. Securities analysts previously estimated that TSMC’s annual capital expenditure for this year could range from $32 billion to $36 billion USD, with the possibility of a decrease next year.

Some industry experts believe that as advanced manufacturing processes have advanced to 2 nanometers, the customer base for the latest processes has started to decrease. Looking at the 3-nanometer process that is already in mass production, only Apple is currently leading the adoption, while others like NVIDIA, Qualcomm, and MediaTek are expected to transition to the 3-nanometer process next year. As a result, TSMC is shifting its focus to expanding production in the more cost-effective advanced packaging sector, which is one of the key reasons for the decrease in TSMC’s capital expenditure.

Furthermore, TSMC is currently estimating that it will be the first to introduce an enhanced version of the 3-nanometer process next year, with expectations to transition to the 2-nanometer process by 2025, using a new Gate-All-Around (GAA) transistor architecture to replace the FinFET transistor architecture used for nearly a decade. This represents a significant step into a new generation of semiconductor technology. Additionally, capacity for advanced packaging is expected to double next year.

(Photo credit: TSMC)

According to a report from Taiwan’s Economic Daily, TSMC’s 3-nanometer technology has attracted another heavyweight client. Following Apple and MediaTek, it is rumored that Qualcomm will also commission TSMC to produce its next-generation 5G flagship chip using the 3-nanometer process. The chip is expected to be unveiled in late October, making Qualcomm the third client for TSMC’s 3-nanometer technology.

In response to these rumors, Qualcomm has not provided any comments, while TSMC has chosen to remain silent. Industry experts speculate that TSMC’s 3-nanometer technology will likely attract additional orders from major players such as NVIDIA and AMD in the future. With various leading-edge fabs continuously seeking TSMC’s services, it appears that TSMC’s 3-nanometer technology remains the top choice for international giants.

Last year, Qualcomm unveiled its annual 5G flagship chip, the “Snapdragon 8 Gen 2,” manufactured using TSMC’s 4-nanometer process. The previous-generation Snapdragon “8 Gen 1” was produced using Samsung’s 4-nanometer process, but it encountered issues related to heat dissipation. Consequently, Qualcomm released an upgraded version, the “Snapdragon 8+ Gen 1,” using TSMC’s 4-nanometer process.

Qualcomm has traditionally adopted a multi-supplier strategy for semiconductor manufacturing. It is rumored in the industry that Qualcomm has privately informed its smartphone brand customers about the upcoming next-generation 5G flagship chip, the “Snapdragon 8 Gen 3,” expected to be announced in late October. This chip will be available in two process versions: TSMC’s 4-nanometer (N4P) and 3-nanometer (N3E).

(Photo credit: TSMC)

According to Taiwan’s Money DJ, the AI wave is showing no signs of slowing down. Led by NVIDIA, major players including AMD, Intel, and international chip giants are aggressively entering the AI arena, driving increasing demand for advanced packaging and advanced processes. Industry reports suggest that TSMC is reallocating several thousand personnel from its Hsinchu 12B plant to support its Longtan and Tainan 18B facilities in a bid to address the current urgent demands.

TSMC typically follows a process of initial research and development (R&D) stages for advancing its processes before handing them over to the mini-line teams and then proceeding to full-scale production. As a result, the 2nm process is slated for trial production in the second quarter of 2024, leaving a gap of approximately six months. It is rumored that TSMC is mobilizing staff from its Hsinchu 12B plant to provide support for the CoWoS-focused Longtan facility and the Tainan 18B plant, which is responsible for mass-producing the 3nm process, to address the immediate needs.

Equipment suppliers estimate that TSMC’s CoWoS production capacity is set to reach 12,000 to 14,000 wafers per month by the end of this year, with a projected doubling of production by 2024. By the end of that year, it is expected to reach at least 26,000 wafers per month, potentially even surpassing 30,000 wafers. Meanwhile, for the 3nm family, in addition to Apple and MediaTek, AMD, NVIDIA, Qualcomm, and even Intel are confirmed to adopt the N3 family of processes.

(Photo credit: TSMC)