Samsung Electronics announced that it has begun mass producing PM9E1, a PCle 5.0 SSD with the industry’s highest performance and largest capacity.

According to Samsung’s press release, the PM9E1, which is built on its in-house 5nm-based controller and eighth-generation V-NAND (V8) technology, will provide powerful performance and enhanced power efficiency, making it an optimal solution for on-device AI PCs.

Key attributes in SSDs, including performance, storage capacity, power efficiency and security, have all been improved compared to its predecessor (PM9A1a), Samsung notes.

According to Samsung, thanks to the eight-channel PCIe 5.0 interface, the sequential read and write speeds of the new SSD have more than doubled compared to the previous generation, reaching up to 14.5 gigabytes-per-second (GB/s) and 13GB/s, respectively.

This powerful performance enables faster data transfer even with data-intensive AI applications, allowing a 14GB large language model (LLM) to be transferred from the SSD to DRAM in less than a second, Samsung states.

The PM9E1 offers a range of storage options, including 512GB, 1 terabyte (TB), 2TB and the industry’s largest capacity of 4TB. The 4TB option is especially an optimum solution for PC users in need of high-capacity storage for large-sized files such as AI-generated contents, data-heavy programs and high-resolution videos, as well as tasks that require intensive workloads such as gaming.

Additionally, the significantly improved power efficiency of over 50% allows for longer battery life which is ideal for on-device AI applications, according to Samsung.

For stronger security measures, Samsung has applied Security Protocol and Data Model (SPDM) v1.2 to the product. The SPDM specification provides ‘Secure Channel,’ ‘Device Authentication’ and ‘Firmware Tampering Attestation’ technologies that can help prevent supply chain attacks involving forgery or manipulation of stored data in the product during production or distribution processes.

Starting with PM9E1, Samsung plans to expand its advanced SSD offerings to global PC makers and expects to launch PCIe 5.0-based consumer products in the future to solidify its leadership in the on-device AI market.

(Photo credit: Samsung)

ByteDance, the parent company of TikTok, is said to be collaborating with TSMC, eyeing for the mass production of two self-developed AI chips by 2026, according to reports by Economic Daily News and The Information.

ByteDance’s AI chips are expected to be made with TSMC’s 5nm node, which would be one generation behind the foundry giant’s most advanced process, the reports suggest, making the move comply with the U.S. export regulations to China. The chips are similar to NVIDIA’s next-generation flagship AI chip, Blackwell, which are manufactured with TSMC’s 4NP node.

Citing sources familiar with the matter, the reports note that the tech giant in China aims to reduce its reliance on NVIDIA for AI model development. Though the chips are still in the design phase and the plan is subject to change, ByteDance’s self-designed chips could save billions of dollars compared to purchasing NVIDIA’s products, according to the reports.

The Information estimates that ByteDance’s spending on developing generative AI models has been increasing, and it is rumored that the company has ordered over 200,000 NVIDIA H20 chips this year, costing it over USD 2 billion, with some orders still pending delivery.

In response to US export bans, NVIDIA launched AI chip H20, L20 and L2, specially designed for the Chinese market earlier this year. According to a previous report by Wccftech, H20 GPU has 41% fewer Cores and 28% lower performance versus H100. Still, the product is reportedly seeing strong demand for AI servers among Chinese Cloud Service Providers (CSPs) and enterprises, including Huawei and Tencent.

However, due to its lower computing power, Chinese companies need to purchase more H20 chips to build clusters with equivalent computing capacity, which raises costs, Economic Daily News notes.

According to TSMC’s financial report in the second quarter, North American clients contributed 65% of its total revenue. While China, the second-largest market, contributed 16% of its quarterly revenue, with a significant jump from 9% in the first quarter and 12% during the same period last year.

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• [News] China Plans to Set at Least 50 AI Standards by 2026, from Language Models to Semiconductors
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(Photo credit: ByteDance)

According to a report from wccftech, leading semiconductor foundry TSMC is preparing to increase the prices of its 3nm and 5nm processes. Reportedly, this move is said to maintain its long-term gross profit margin of 53% and secure its leadership position in the semiconductor foundry market.

The report notes that considering the high demand for AI, along with orders for consumer products from IC design companies like Apple and Qualcomm, TSMC’s production capacity remains tight.

Therefore, TSMC is reportedly planning to increase the prices of its advanced processes, such as 3nm and 5nm, by 8%, thereby ensuring stable long-term profit margins. Notably, a previous report from Commercial Times have cited sources, indicating that NVIDIA CEO Jensen Huang once agreed that TSMC’s pricing is too low and will support its price increase actions.

Although the price increase has been rumored for some time, the sources cited by wccftech indicate that TSMC may implement the hike soon.

Currently, TSMC’s 3nm and 5nm process utilization rates are at 100%, indicating complete market dominance in these processes. This already allows TSMC to profit significantly, and the price increase will further benefit their operations.

In addition to advanced processes, there are rumors that TSMC is also raising the price of CoWoS packaging due to the massive demand for AI chips from AMD and NVIDIA. Although specific figures have not been disclosed, TSMC’s rapid expansion of its CoWoS production lines makes the price increase likely.

It’s previously estimated by sources cited in MoneyDJ’s report that TSMC’s CoWoS capacity remains in short supply, at 35,000 to 40,000 wafers per month this year. With the additional outsourced capacity, next year’s production could reach over 65,000 wafers per month, or possibly higher.

Read more

• [News] CoWoS Booming, TSMC Price Hikes Reportedly Imminent
• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price

(Photo credit: TSMC)

After TSMC released its Q3 guidance at the earnings call last week, eyeing for at least a 7.5% revenue growth, it is now said that the foundry giant has got another major boost for the following quarters. According to a report from Technews, citing Chinese media outlet ijiwei, the company is said to receive an increase in orders for Super Hot Run (SHR) from Chinese clients, and they are willing to pay up to 40% extra.

Sources cited by the reports indicated these rush orders may come from Chinese tech heavyweights, including Bitmain, Alibaba’s T-Head, and Sanechips, which are urgently stockpiling chips due to escalating tensions between the U.S. and China.

In fact, according to information from TSMC’s previous earnings conference, sales generated from orders by TSMC’s Chinese clients in the second quarter of 2024 increased from 9% of total wafer revenue in the previous quarter to 16%.

The reports stated that Chinese chip manufacturers are accelerating their pace for placing orders in response to the uncertainties arising from the upcoming U.S. presidential election and its impact on U.S.-China relations. This move is expected to provide support for TSMC’s revenue and gross margins afterwards, which may help its performance in the third quarter and the full year to exceed forecasts.

TSMC raised its projected revenue growth for 2024 to over 25% last week, thanks to the robust demand for high-end smartphones and artificial intelligence (AI) devices, which is expected to boost the use of advanced 3nm and 5nm chips.

Previous reports have indicated that TSMC is facing overwhelming demand for its 3nm technology, with major clients like Apple and NVIDIA eagerly booking for more capacity, while orders are expected to be filled through 2026. Now it seems that the demand from China has also been heating up.

Reportedly, TSMC is planning to raise its 3nm prices by over 5%, and advanced packaging prices are anticipated to increase by approximately 10% to 20% next year.

To meet this robust demand, TSMC plans to increase monthly production capacity to 130,000 wafers for its 3nm process and 160,000 to 170,000 wafers for its 4/5nm processes.

Read more

• [News] TSMC Projects 7.5% Q3 Revenue Growth, Adjusts Full-Year CAPEX Range
• [News] Chinese Firms Stockpile Chips Amid Geopolitics; TSMC Sees Rush Orders

(Photo credit: TSMC)

Chinese tech giant Huawei, which plans to launch its Mate 70 Series in the fourth quarter, is reportedly to feature the latest Kirin 9100 processor in these models. Though there were rumors indicating that the chip will be manufactured with SMIC’s 5nm node, according to a report by Wccftech, the next Kirin SoC for the Mate 70 Series will still be limited to SMIC’s 7nm process.

Kirin 9100’s predecessors, the Kirin 9000S and the Kirin 9010, have been mass-produced using SMIC’s 7nm (N+2) technology, the report notes. As market speculations previously indicated that Huawei might use 5nm in its next Kirin SoC, there seems to be a twist in Huawei’s plans.

According to Wccftech, the next Kirin SoC for the Mate 70 series will likely be mass-produced using SMIC’s N+3 process, which offers higher density compared to the N+2 variant. The move means that instead of transitioning to SMIC’s 5nm, Huawei’s latest Kirin SoC may choose to stay with 7nm.

It is worth noting that even under the U.S. export control, SMIC is said to successfully produce 5nm chips using DUV lithography instead of EUV, which is typically required for 5nm production. However, as the high cost and low yield of DUV make it a challenging feat for most manufacturers, Huawei’s decision may be practical.

As previously reported by the Financial Times, industry sources have indicated that SMIC’s prices for 5nm and 7nm processes are 40% to 50% higher than TSMC’s, while the yield less than one-third of TSMC’s. Later, it was estimated that SMIC’s 5nm chip prices would be up to 50 percent more expensive than TSMC’s on the same lithography, meaning that Huawei would face a tough time selling its Mate 70 series to consumers with a decent margin if it attempts to absorb a majority of those component costs.

Therefore, Wccftech now states that the Kirin 9100 might be fabricated using the 7nm process. By employing the N+3 node, it could achieve a higher density than the Kirin 9010 and the Kirin 9000S, which are manufactured by the N+2 node. This improvement means that the Kirin 9100 will have a higher transistor count, leading to better performance per watt and improved power efficiency.

Alongside the new chipset for the Mate 70 family, Huawei is rumored to be testing the same N+3 technology for its ARM-based hardware, the report notes.

Read more

• [News] Huawei Reportedly to Launch Kirin 9100 with Superior Performance to Snapdragon 8 Gen 2
• [News] SMIC Reportedly to Manufacture 5nm Chips for Huawei Without EUV Machinery

(Photo credit: Hisilison)