Amkor and TSMC announced today that the two companies have signed a memorandum of understanding to collaborate and bring advanced packaging and test capabilities to Arizona, further expanding the region’s semiconductor ecosystem.

Amkor and TSMC have been closely collaborating to deliver high volume, leading-edge technologies for advanced packaging and testing of semiconductors to support critical markets such as high-performance computing and communications. Under the agreement, TSMC will contract turnkey advanced packaging and test services from Amkor in their planned facility in Peoria, Arizona. TSMC will leverage these services to support its customers, particularly those using TSMC’s advanced wafer fabrication facilities in Phoenix. The close collaboration and proximity of TSMC’s front-end fab and Amkor’s back-end facility will accelerate overall product cycle times.

The companies will jointly define the specific packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS) that will be employed to address common customers’ needs.

The agreement underscores the shared commitment to supporting customer requirements for geographic flexibility in front-end and back-end manufacturing, as well as fostering the development of a vibrant and comprehensive semiconductor manufacturing ecosystem in the United States. The companies’ shared vision is to enable seamless technology alignment for customers across a global manufacturing network.

“Amkor is proud to collaborate with TSMC to provide seamless integration of silicon manufacturing and packaging processes through an efficient turnkey advanced packaging and test business model in the United States,” said Giel Rutten, Amkor’s president and chief executive officer.

“Our customers are increasingly depending on advanced packaging technologies for their breakthroughs in advanced mobile applications, artificial intelligence and high-performance computing, and TSMC is pleased to work side by side with a trusted longtime strategic partner in Amkor to support them with a more diverse manufacturing footprint,” said Dr. Kevin Zhang, TSMC’s Senior Vice President of Business Development and Global Sales, and Deputy Co-COO.“We look forward to close collaboration with Amkor at their Peoria facility to maximize the value of our fabs in Phoenix and provide more comprehensive services to our customers in the
United States.”

(Photo credit: Amkor)

Driven by the massive demand for AI chips, advanced packaging is in short supply, and the development of three major advanced packaging technologies CoWoS, SoIC, and FOPLP is booming. In addition, two major billion-dollar projects in China have made recent progress, further advancing the region’s advanced packaging and testing industry.

According to estimates from TrendForce, revenue from 2.5D packaging services offered by foundries is expected to grow by over 120% annually by 2025. Although this segment will account for less than 5% of overall foundry revenue, its importance is steadily increasing.

HT-Tech and Tong Fu Advance Billion-Dollar Advanced Packaging Projects

On September 22, the second phase of the HT-Tech Nanjing Integrated Circuit Advanced Packaging and Testing Industrial Base project broke ground in the Pukou District of Nanjing.

The first phase of this project began production in July 2020, achieving a production value of 2.9 billion yuan in 2023. HT-Tech Group has decided to invest another 10 billion yuan to launch the second phase, aiming to build 200,000 square meters of factories and supporting facilities, introduce high-end production equipment, and create an internationally advanced integrated circuit packaging and testing production line. The products will be widely used in memory, RF, computing power, AI, and other fields.

In addition, two sub-projects of Tongfu’s advanced packaging base have also made progress. Construction of the Tongfu Tongda Advanced Packaging Base project has officially begun, and on the same day, the first piece of equipment for the second phase of Tongfu Tongke’s Memory project was installed.

The total investment in the Tongfu Tongda Advanced Packaging Base project is 7.5 billion yuan, covering 217 acres. The project is expected to be fully operational by April 2029, focusing on communications, memory, computing power, and other application areas, with a particular emphasis on multi-layer stacking, flip-chip, wafer-level, and panel-level packaging, all key products supported by national policy.

The second phase of the Tongfu Tongke Memory project adds 8,000 square meters of cleanroom space, and once operational, will provide 150,000 wafers per month. Additionally, 160 million yuan will be invested in equipment, primarily critical for the mass production of high-end products such as embedded FCCSP and uPOP, better meeting the domestic demand for high-end memory products in mobile phones, solid-state drives, servers, and more.

Progress in Advanced Packaging by TSMC, Amkor, and ASE

After purchasing the fourth factory of Innolux in Southern Taiwan Science Park (STSP) in mid-August, TSMC has swiftly begun construction, aiming to have the first phase of the new factory and equipment ready before the Chinese New Year in 2025. TSMC has integrated the new facility into its CoWoS production plan, striving to double total capacity by 2025.

TSMC expects CoWoS capacity to continue expanding rapidly through 2026, with an annual compound growth rate of over 50% from 2022 to 2026.

In terms of expanding CoWoS capacity, TSMC is also strengthening its cooperation with OSAT (Outsourced Semiconductor Assembly and Test). It is reported that TSMC has outsourced the critical CoW process in the front-end and the WoS process in the back-end to SPIL (a subsidiary of ASE Technology Holding) and Amkor.

At Amkor, the company has reportedly completed investments to expand the 2.5D advanced packaging capacity at its K5 factory in Songdo, Incheon, South Korea, tripling its capacity compared to the second quarter of last year.

At ASE, plans are underway for the Central Taiwan Science Park’s main plant and its second factory. Additionally, ASE’s wholly-owned subsidiary SPIL recently repurchased the Tanzi Factory. Furthermore, existing factories, such as the one in Zhongshan, are being reallocated. Once the cleanrooms are complete, equipment installation will begin, increasing capacity by at least 20%.
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(Photo credit: TSMC)

Jun He, Vice President of Advanced Packaging Technology and Service at TSMC, stated that 3D IC is a crucial method for integrating AI chip memory with logic chips.

According to a report from TechNews, regarding the development of 2.5D CoWoS advanced packaging, which integrates eight chiplets, TSMC will use the A16 advanced process to manufacture the chiplets, and integrated them with 12 HBM4, which is expected to be launched in 2027.

Reportedly, in his speech at the Semicon Taiwan 2024 “3D IC / CoWoS for AI Summit,”  He noted that the global semiconductor market is projected to become a trillion-dollar industry by 2030, with HPC and AI being the key drivers, accounting for 40% of the market, which also make AI chips crucial drivers for 3D IC packaging.

The reasons customers choose to manufacture AI chips with 3D IC platform for multi-chiplet design would be related to their lower costs and reduced design transition burdens.

Jun He explained that by converting a traditional SoC+HBM design to a chiplet and HBM architecture, the new logic chip would be the only component that needed to be designed from scratch, while other components such as I/O and SoC can use existing process technologies. This approach reduces mass production costs by up to 76%.

Although the new architecture might increase production costs by 2%, the total cost of ownership (TCO) is improved by 22% due to these efficiencies, He noted.

However, 3D IC still faces challenges, particularly in increasing production capacity. Jun He emphasized that the key to enhancing 3D IC capacity lies in the size of the chips and the complexity of the manufacturing process.

Regarding chip size, larger chips can accommodate more chiplets, improving performance. However, this also increases the complexity of the process, which can be three times more challenging. Additionally, there are risks associated with chip misalignment, breakage, and failure during extraction.

To address these risk challenges, Jun He identified three key factors: tool automation and standardization, process control and quality, and the support of the 3DFabric manufacturing platform.

For tool automation and standardization, TSMC’s differentiated capabilities with its tool suppliers are crucial. With 64 suppliers now involved, TSMC has gained the ability to lead in advanced packaging tools.

In terms of process control and quality, TSMC utilizes high-resolution PnP tools and AI-driven quality control to ensure comprehensive and robust quality management. Finally, the 3DFabric manufacturing platform integrates 1,500 types of materials within the supply chain to achieve optimization.

Read more

• [News] TSMC Plans Rapid CoWoS Expansion Through 2026 in Response to Client Demand
• [News] TSMC Rumored to Build New CoWoS Plant in Southern Taiwan

(Photo credit: TSMC)

With advanced packaging capacity at TSMC being tight, the expansion of CoWoS has garnered significant attention. According to a report from Economic Daily News, Jun He, Vice President of Advanced Packaging Technology and Service at TSMC, noted at SEMICON Taiwan 2024 that the foundry giant is rapidly expanding its advanced packaging capacity to meet customer demands.

The company expects CoWoS capacity to grow at a compound annual growth rate of over 50% from 2022 to 2026, with high-speed expansion continuing at least until 2026.

During Jun He’s keynote at the “3D IC/CoWoS for AI Summit – HIGS Series Event” on September 4, He joked that due to severe supply shortages, he refrained from including numbers in his presentation, as customer complaints about insufficient capacity were frequent.

In response to strong customer demand, Jun He revealed that TSMC will continue to rapidly expand its advanced packaging capacity through 2026, with increased construction speeds. For CoWoS capacity, the time to build an advanced packaging plant has been reduced from three to five years to within two years, or even a year and a half.

He noted that the strong demand for advanced packaging is driven by the cost reduction benefits of chiplet design. The successful development of chiplets relies on advanced packaging, prompting TSMC to actively promote the 3DFabric Alliance to accelerate innovation and development within the 3D IC ecosystem.

Mike Hung, Senior Vice President of ASE echoed Jun He’s views, noting that the industry has learned valuable lessons from the 2.5D packaging sector since its mass production in 2013. ASE has been partnering with TSMC to boost their CoWoS capacities.

He added that further standardization of equipment or materials would be advantageous for accelerating industry innovation.

Take panel-level packaging as an example, he noted that while the technology could help  increased efficiency thanks to the transition from round to square substrates, it also presents challenges in areas like equipment and materials.

Jun He added that advancing packaging requires efforts from partners in advanced packaging materials and HBM to drive progress collectively.

On the other hand, DJ Lee, Director and COO of PCB leader ZDT Group, suggested that as the industry progresses, packaging substrates will trend towards higher layers, larger areas, flatness, and precise designs. To meet the semiconductor-level requirements, substrate manufacturers will need to enhance their smart manufacturing capabilities.

Read more

• [News] TSMC Rumored to Build New CoWoS Plant in Southern Taiwan
• [News] TSMC Halts Chia-Yi Plant Construction Due to Relic Found, Quickly Initiates Preparation for 2nd Plant

(Photo credit: TSMC)

Amid the AI boom driving a surge in demand for advanced packaging, Samsung Electronics announced in March its ambition to achieve record-high revenue for the business this year, aiming to surpass the USD 100 million mark. The company, which is eager to catch up with TSMC not only on the foundry but also the advanced packaging business, was said to hire former TSMC deputy director Vic Lin as Vice President of the Advanced Packaging Business Unit in its semiconductor department. However, according to a report by ijiwei, the business unit has been disbanded recently, and rumor has it that Chinese semiconductor companies are attempting to recruit Lin.

It is worth noting that before joining TSMC, Lin worked at Micron Technology. Afterwards, during his 19-year tenure at TSMC from 1999 to 2017, Lin was responsible for the application of the semiconductor giant’s over 450 U.S. patents, the report notes. His major accomplishments included securing a major collaboration deal with Apple, as well as laying a solid foundation for TSMC’s expertise in 3D packaging technology.

Nowadays, the advanced packaging business has emerged as one of TSMC’s major growth momentum, with primary customer NVIDIA having the highest demand, occupying about half of the capacity, followed closely by AMD. As the demands for AI and HPC processors keep booming, TSMC revealed plans earlier to further expand its chip-on-wafer-on-substrate (CoWoS) capacity at a compound annual rate (CAGR) of over 60% until at least 2026, according to a report by AnandTech.

After leaving TSMC, Lin became the CEO of Skytech, where his extensive work experience helped him accumulate substantial expertise in packaging equipment manufacturing.

In 2022, Samsung established an Advanced Packaging Task Force, which was later transformed to its Advanced Packaging Business Team in 2023, of which Lin was said to join the team as Vice President, ijiwei notes.

However, industry insiders have revealed that the team was recently disbanded, and its members have returned to Samsung’s memory department and others, the report suggests. Additionally, Lin’s two-year contract with Samsung is said to be expire soon, and it seems unlikely that Samsung will renew it.

Being regarded as a “semiconductor packaging expert,” Lin’s next move is being closely watched. Certain Chinese semiconductor companies are rumored to get in contact with Lin, but it is expected that he will prioritize opportunities to collaborate with semiconductor companies in Taiwan, the report indicates.

The report notes that Samsung has confirmed that the team had been disbanded due to an internal organizational restructuring but declined to comment on personnel matters.

Earlier in May, as part of the restructuring process, the company has disbanded its Robot Business Team as well, which was responsible for developing its first wearable robot, “Bot Fit.”

Read more

• [News] Samsung to Intensify Efforts for Capturing Intel’s Advanced Packaging Orders Shifting from TSMC
• [News] Samsung Reportedly Commits to Advanced Packaging, Targets Over USD100 Million in Related Revenue This Year

(Photo credit: Samsung)