TSMC is significantly expanding its production, continuously increasing its facilities. On August 15, as per a report from Liberty Times Net, the company announced that it had signed a contract with panel manufacturer Innolux to purchase its plant and associated facilities located in the Southern Taiwan Science Park.

The building’s total area exceeds 96,000 square meters, with a transaction value of NTD 17.14 billion, which is much lower than the rumored market price of over NTD 20 billion. TSMC announced that the facility will be used for operations and production.

Innolux recently announced the sale of 4th Plant in Tainan (5.5-generation LCD panel plant). A previous report from Economic Daily News once cited rumors, claiming that both Micron and TSMC have been actively exploring the acquisition.

Moreover, it was also reported that TSMC offered a price 20% higher than the base price, with plans to use the facility to expand its advanced process or advanced packaging capacity.

According to Liberty Times Net citing sources at the Southern Taiwan Science Park, TSMC’s original plant is located in the northwest part of the park, while the newly acquired Innolux plant is situated in the southwest, so they are not adjacent.

TSMC had previously purchased a plant from Hannstar and demolished and rebuilt it, as the planning of panel plants differs from that of fabs. TSMC also acquired a plant from E-Ton Solar Tech in the Southern Taiwan Science Park, which is currently being used as an intelligent warehouse.

Based on Innolux’s post-capital-reduction share capital of NTD 79.8 billion, the sale is expected to contribute around NTD 1.84 per share in earnings.

Read more

• [News] Innolux’s 4th Plant in Tainan Reportedly to be Secured by TSMC
• [News] Innolux Confirms Sale of Tainan Plant 4, with Micron & TSMC Reportedly in the Bidding Stage

(Photo credit: Innolux)

Amid the advancement of emerging applications such as Artificial Intelligence (AI), High-Performance Computing (HPC), data center, and autonomous vehicle, fan-out panel-level packaging (FOPLP) technology has successfully garnered industry attention due to its advantages in significantly improving computing power, reducing latency, and increasing bandwidth. As a result, more manufacturers are entering this field.

Recently, semiconductor equipment manufacturer ACM Research Shanghai introduced the Ultra ECP ap-p panel-level electroplating equipment for FOPLP.

Prior to this, ACM has launched the Ultra C vac-p negative pressure cleaning equipment designed for fan-out panel-level packaging applications, signaling that ACM has successfully entered the high-growth FOPLP market.

It is worth mentioning that since the second quarter of this year, chip manufacturers like AMD have actively approached TSMC and professional OSAT (Outsourced Semiconductor Assembly and Test) companies to promote chip packaging using FOPLP technology, further increasing industry focus on FOPLP.

In fact, advanced packaging has an increasing demand for low-latency, high-bandwidth, and cost-effective semiconductor chips, and FOPLP offers high bandwidth and high-density chip interconnects, making it a technology with higher potential.

FOPLP is a process performed on larger square substrates, allowing multiple chips, passive components, and interconnects to be integrated into a single package on a panel, offering greater flexibility, scalability, and cost effectiveness.

By redistributing chips on larger rectangular panels, FOPLP largely reduces the costs of packaging large GPU and high-density, high-bandwidth memory (HBM).

It is reported that the utilization rate of traditional silicon wafers is less than 85%, while that of panels exceeds 95%. The effective area of a 600×600 mm panel is 5.7 times that of a 300 mm traditional silicon wafer, with overall panel cost expected to decrease by 66%.

The increase in area utilization leads to higher capacity, greater flexibility in AI chip design, and significant cost reduction.

Currently, major players in the FOPLP advanced packaging field include Powertech Technology, ASE Group, SPIL, TSMC, Innolux, JSnepes, and Samsung Electro-Mechanics.

TrendForce points out that FOPLP technology presents advantages and disadvantages, facing both opportunities and challenges. Its main strengths are lower unit cost and larger package size, but as its technology and equipment systems are still developing, the commercialization process is highly uncertain.

It is estimated that the mass production timeline for FOPLP in consumer IC and AI GPU may fall between the second half of 2024 to 2026, and 2027-2028, respectively.

Read more

• [News] Innolux Targets to Begin FOPLP Mass Production by Year-End
• [News] TSMC Reportedly Forms a Team on FOPLP Development, with Mini Line on the Road 

(Photo credit: ACMR)

According to a report from The Chosun Daily, major tech companies like NVIDIA are considering using Intel’s foundry services (IFS) as an alternative due to TSMC’s packaging capacity shortages. While packaging is a core competency for semiconductor foundries, Samsung, which is facing difficulties in attracting customers, will need to exert maximum effort to secure orders.

It’s highlighted by the report that the demand for AI accelerators is growing rapidly, but TSMC’s AI chip production capacity is unable to keep up.

Furthermore, per The Chosun Daily citing sources, major clients like NVIDIA and Apple have secured TSMC’s 3nm advanced process capacity, pushing order backlogs into 2026.

Therefore, major tech companies seeking alternatives are turning to Intel’s IFS. Since Intel’s Foveros is said to be comparable to TSMC’s CoWoS-S, it has made Intel’s advanced packaging a viable option to ensure supply.

TSMC and Intel offer advanced packaging services to customers under the names CoWoS and Foveros, respectively. Both CoWoS and Foveros are advanced packaging technologies that connect two or more semiconductor chips on a wafer and then place them onto a packaging substrate.

Reportedly, in addition to NVIDIA and Microsoft, Amazon and Cisco are considering outsourcing to Intel Foundry to reduce their dependence on TSMC.

The report further emphasizes that this market trend is likely to cause anxiety for Samsung, which competes with TSMC and Intel in advanced processes.

Recently, Samsung’s former clients, Google and Qualcomm, have chosen TSMC, while Intel, seen as a latecomer, is catching up by securing advanced packaging orders from major tech companies, potentially narrowing the gap with Samsung.

Kim Hak-sung, head of Hanyang Institute of Smart Semiconductor, said that packaging is a technology that critically influences customer acquisition in the AI semiconductor era, where various types of chips are interconnected.

He noted that although there may not be a substantial technical capabilities difference between Samsung Electronics and Intel, as mass production experience allows the process to stabilize and become more appealing to customers.

Kim eventually addressed that to stay competitive, Samsung needs to focus on capturing the volumes that TSMC cannot accommodate, positioning itself ahead of Intel.

Read more

• [News] TSMC Reportedly to Raise 3nm & 5nm Prices Soon, Looking to Maintain Long-Term Profit Margins 
• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
  

(Photo credit: Samsung)

As the demand for AI GPUs increases, TSMC’s advanced packaging capacity for CoWoS is struggling to keep up. Recently, according to a report from Commercial Times, NVIDIA has reportedly turned to Intel for advanced packaging solutions.

According to industry sources cited by the same report, TSMC’s CoWoS-S and Intel’s Foveros packaging technologies are similar, allowing clients to turn to Intel and secures the capacity needed quickly.

Despite its current struggling on transformation, Intel has been gradually developing its ‘s foundry services. In addition to clients like Qualcomm and Microsoft, Intel’s advanced packaging has also attracted interest from companies like Cisco and AWS.

Under the IDM 2.0 strategy, Intel has opened up its wafer outsourcing and foundry services to customers, establishing an the independent IFS foundry service. Earlier this year, Intel secured a major USD 15 billon foundry order from Microsoft for the first system-level AI foundry service, which is expected to use the Intel 18A process.

The report from Commercial Times further suggested that Microsoft’s move is anticipated to reduce its heavy reliance on TSMC. The report also indicates that chip customers, including NVIDIA, have engaged with Intel. Intel’s flexible foundry strategy, which can provide advanced packaging, software, and chiplet services tailored to customer needs, has been well-received by chipmakers.

Sources cited by the same report reveal that the U.S. has begun allocating specialized funds to increase investments in the advanced packaging sector as well. This move could highlight the importance of advanced packaging as the next key area for global competition in production capacity.

In November last year, the U.S. Department of Commerce’s National Institute of Standards and Technology (NIST) released a report titled “National Advanced Packaging Manufacturing Program,” highlighting that advanced packaging technology is one of the key technologies in semiconductor manufacturing.

Additionally, the U.S. Department of Commerce plans to invest approximately USD 3 billion to advance the National Advanced Packaging Manufacturing Program. Intel, alongside Amkor, is another giant in local advanced packaging in the U.S.

The main focus of advanced packaging is on interconnect density, power efficiency, and scaling. From Foveros to hybrid bonding technology, Intel is gradually scaling down bumping pitch sizes, which allows for higher current loads and better thermal performance.

Furthermore, in May last year, Intel’s advanced packaging technology roadmap outlined plans to transition from traditional substrates to more advanced glass substrates.

Read more

• [News] Intel’s Earnings Fall Short, Cutting Over 15% of Workforce
• [News] Intel Hires Micron Executive to Lead Its Foundry Business

(Photo credit: Intel)

According to a report from Commercial Times, after suffering a multi-billion-dollar loss in its foundry business, Intel has recruited Naga Chandrasekaran, a veteran responsible for process technology development at Micron, as its Chief Operating Officer.

Intel is reportedly facing setbacks in developing chip manufacturing. After experiencing a staggering USD 7 billion loss in its foundry business in 2023, the company incurred an additional USD 2.5 billion loss in the first quarter of this year.

Thus,to drive the growth of its foundry business, Intel has recruited Naga Chandrasekaran from Micron, who will oversee all of Intel’s manufacturing operations and report directly to CEO Pat Gelsinger.

Chandrasekaran’s appointment will take effect on August 12. He will oversee Intel Foundry’s global manufacturing operations and strategic planning, including assembly and test manufacturing, wafer fabrication, and supply chain management. Essentially, Chandrasekaran will be responsible for all of Intel’s manufacturing activities.

In the announcement of the employment, Intel CEO Pat Gelsinger noted, “Naga is a highly accomplished executive whose deep semiconductor manufacturing and technology development expertise will be a tremendous addition to our team.”

“As we continue to build a globally resilient semiconductor supply chain and create the world’s first systems foundry for the AI era, Naga’s leadership will help us to accelerate our progress and capitalize on the significant long-term growth opportunities ahead,”  Gelsinger said.

As per a report from tom’s hardware, Chandrasekaran has spent over 20 years at Micron, holding various management positions. Most recently, he led global technology development and engineering focused on scaling memory devices, advanced packaging, and emerging technology solutions. His extensive background encompasses process and equipment development, device technology, and mask technology.

He will replace Keyvan Esfarjani, who is set to retire at the end of the year. Esfarjani, who has served at Intel for nearly 30 years, will remain with the company to assist with the transition. He has made significant contributions to Intel’s global supply chain resilience and manufacturing operations.

On the other hand, in an attempt to narrow down the gap with TSMC, Intel is also said to be recruiting the foundry giant’s senior engineers for its foundry division, according to a report by Commercial Times.

Read more

• [News] TSMC and Intel Boost Their 2025 Capital Spending to Lead in the AI Era
• [News] New Battleground for TSMC, Samsung & Intel in Panel-Level Packaging

(Photo credit: Intel)