Recently, TSMC updated the progress of the expansion of its sub-2nm advanced process. On September 11, Hsu Mao-hsin, Director-General of Taiwan’s Central Taiwan Science Park Administration, announced the expansion of the Taichung Phase 2 park.

Currently, 95% of the land required for TSMC’s plant construction has been secured through agreed purchase prices. The full transaction is expected to be completed by the end of this year, with the land ready for TSMC by the first quarter of next year.

The Phase 2 park covers 89 hectares, of which the Hsingnong Golf Course occupies 67 hectares, representing about 76.8% of the total area and making it the largest landholder. The budget for land acquisition is approximately TWD 23.7 billion.

Currently, there are 111 landowners and structures in the park, with 70% of the owners agreeing to the acquisition, covering 95% of the total area.

In addition to supporting TSMC’s new plant, the rest of around 3 hectares are available for related industries to apply for residency. Several companies in semiconductor supply chain and precision machinery industry have already expressed interest in moving in, and the Central Taiwan Science Park Administration is encouraging IC design companies to join.

Presently, TSMC has concentrated most of its advanced process manufacturing facilities in Taiwan. Aside from three 2nm wafer fabs in its Kaohsiung Nanzi Park, there is also space available to accommodate sub-2nm technology fabs. Industry insiders revealed that Kaohsiung is already preparing for the deployment of the A14 (14 angstrom) process. The first 2nm fab in Nanzi is expected to start mass production in 2025.

Although 2nm product is still absent from the market, their output value is expected to surpass that of 3nm. Insiders indicated that future applications will include HPC (high-performance computing) and smartphone technology sectors.

Read more

• [News] Google’s Tensor G5 Reportedly Manufactured with TSMC’s 3nm and InFO-POP Packaging
• [News] TSMC Strengthens Its Advanced Process with Next-Generation EUV Equipment Reportedly Arriving This Month

(Photo credit: TSMC)

According to sources cited in a report from Commercial Times, in response to the global increase in chip orders and rapid AI development, TSMC is actively seeking available land to keep its most advanced process technologies in Taiwan.

Currently, TSMC has already planned three 2nm fabs at the Nanzih Technology Industrial Park in Kaohsiung, southern Taiwan.

Regarding the need for additional land to accommodate facilities for more advanced nodes beyond 2nm, the report notes that the Kaohsiung City Government has been proactively preparing by evaluating land availability, as well as water and electricity supply, for TSMC’s next-generation advanced technology production, specifically targeting the A14 (14 angstrom) process.

Yet, regarding the matter, TSMC has remained discreet and declined to comment on market rumors regarding the progress of expansion.

Reportedly, the Nanzih Park site has the capacity to accommodate up to five fabs for TSMC, and there are rumors that its fourth and fifth fabs are likely to focus on A14 process, although TSMC has yet to confirm this.

TSMC’s first 2nm process fab in Nanzih is expected to begin mass production in 2025. Per sources cited by the report, the node will be used in high-performance computing (HPC), smartphones, electric vehicles, and autonomous driving applications.

Earlier, concerns were raised about the progress of TSMC’s CoWoS advanced packaging plant due to the discovery of cultural heritage sites at the Chiayi Science Park.

However, sources cited by Commercial Times have pointed out that while there have been some delays due to cultural heritage issues, TSMC’s adjustment plan has been approved. The company will adjust its working procedures in order to proceed with construction according to the original schedule, with no changes to the completion timeline.

Read more

• [News] Samsung Expected to Unveil its 1nm Plan in June, Advancing it to 2026
• [News] Decipher TSMC’s Calm Take on High-NA EUV Lithography Machines: Who May Have the Last Laugh in the Angstrom Era?

(Photo credit: TSMC)

AI industry has been driving semiconductor industry to advance forward. Benefited from the surge in AI-driven demand for advanced process chip, foundry industry is experiencing a gradual turnaround, while demands for consumer chip and automotive chip have not yet fully recovered, and competition remains fierce in the mature process chip sector, representing a stark contrast within the wafer foundry industry.

• Financial Results Indicate Strong AI Development but Weak Automotive Terminal Demands

Recently, several major foundries released their Q2 financial reports and shared outlook on future market conditions.

For the second quarter ending June 30, TSMC reported consolidated revenue of approximately USD 20.82 billion, up 32.8% YoY and 10.3% QoQ, which was attributed to strong demand for its 3nm and 5nm technologies.

As per the financial report, revenue from advanced technologies (7nm and below) accounted for 67% of TSMC’s total wafer revenue in 2Q24. In terms of application areas, HPC has replaced mobile business as the core driver of the company’s growth, contributing 52% of revenue.

Additionally, although TSMC’s automotive electronics revenue grew 5% QoQ, the company warned of a potential downturn in the automotive market this year.

UMC reported Q2 revenue of TWD 56.8 billion, up 4% QoQ. UMC expected customer inventories in the communications, consumer electronics, and computer sectors to return to seasonal levels as usual in the second half of this year, and to reach healthy levels by the end of the year.

However, demand in the automotive end market remains weak, which may extend the period of inventory adjustment, with healthy levels anticipated only by the first quarter of next year.

On August 6, GlobalFoundries released its latest financial report.

In the second quarter of this year, the company achieved revenue of USD 1.63 billion, a year-on-year decrease of 12% and a quarter-on-quarter increase of 5%. Net profit was USD 155 million, a year-on-year decrease of 35% and a quarter-on-quarter increase of 16%.

Industry sources cited by the report from WeChat account DRAMeXchange believe that during the pandemic, customers in sectors such as IoT, mobile device, and data center accumulated high inventory, which impacted GlobalFoundries’ revenue.

Moreover, the company is experiencing a cyclical downturn due to soft demands in the automotive, industrial, and other sectors.

• Advanced Processes Continue to Thrive while Mature Processes Face Intense Competition

The adoption of AI generative models keeps on the rise, driving high demand for AI chip. In this context, advanced processes have been well-received, leading to price increase and production expansion.

TrendForce’s survey in June showed that TSMC is seeing full capacity utilization in its 5/4nm and 3nm nodes due to strong demand from AI applications, new PC platforms, HPC applications, and high-end smartphones.

Its capacity utilization is expected to exceed 100% in the second half of the year, with visibility extending into 2025. Given cost pressures from overseas expansion and rising electricity prices, TSMC plans to raise prices for its advanced processes, which are experiencing strong demand.

TSMC is seeing full capacity utilization in its 5/4nm and 3nm nodes due to strong demand from AI applications, new PC platforms, HPC applications, and high-end smartphones. Its capacity utilization is expected to exceed 100% in the second half of the year, with visibility extending into 2025.

Given cost pressures from overseas expansion and rising electricity prices, TSMC plans to raise prices for its advanced processes, which are experiencing strong demand.

As per other sources cited by the same report, TSMC informed customers of a price increase for 5/3nm process products in 2024 at the beginning of this year.

In late July, TSMC notified several customers that due to rising costs, prices for 5/3nm process products will increase again starting January 2025, and the increase will range from 3-8%, depending on the tape-out plan, product, and partnership.

Meanwhile, the surge in demand for advanced packaging driven by AI will also lead to higher CoWoS prices.

To seize the significant opportunities brought by AI, many companies are actively investing in advanced processes. Currently, the 3nm process is the most advanced in the industry.

Meanwhile, TSMC, Samsung, Intel, and Rapidus are vigorously promoting the construction of 2nm fabs. Previously, TSMC and Samsung intended to produce 2nm chip at scale in 2025, while Rapidus planed to start trial production in 2025.

Following 2nm, 1nm chip will be the next goal for these fabs. According to their plans, the industry is likely to see the mass production of 1nm chip from 2027 to 2030.

Unlike the rising prices and volume in advanced process chip, mature process chip faces some uncertainty due to weaker-than-expected recovery in end-user demand, and sees more intense competition among manufacturers.

TrendForce’s survey reveals that the capacity utilization rates of PSMC and Vanguard is expected to improve more than anticipated in the second half of the year. However, overall demand for mature processes remains weak, with average capacity utilization still around 70–80%—indicating no significant shortages.

TrendForce further pointed out that in 2024, concerns over global inflation and weak recovery in end-demand may result in inconsistent momentum in replenishing inventory. Many foundries might offer price incentives to attract customers and boost capacity utilization, leading to a decline in overall ASP.

Furthermore, a significant amount of new capacity is expected to come online in 2025, including TSMC JASM, PSMC P5, SMIC’s new Beijing/Shanghai plants, HHGrace Fab9, HLMC Fab10, and Nexchip N1A3.

This increase in mature process capacity could intensify competition and impact future pricing negotiations.

Read more

• [News] Intel and NVIDIA’s New Platform Orders Rolling Out, TSMC Unaffected by Market Turbulence
• Foundry Market Shows Mixed Conditions with Price Adjustments for Specific Chinese Processes and Anticipated Price Increases for Taiwanese Advanced Processes, Says TrendForce

(Photo credit: TSMC)

With the U.S.-China tech war heating up as the U.S. election approaches, industry sources cited by the Economic Daily News report that Chinese IC design companies are rushing to place more orders with TSMC for chip production using advanced processes before the U.S. potentially imposes stricter control policies. At the same time, they are initiating a backup plan by shifting orders to Samsung for chips manufactured with advanced nodes to avoid potential future U.S. bans on Chinese companies using Taiwanese foundries.

As a result, Samsung is becoming a beneficiary of the escalating U.S.-China tech conflict, sparking a new round of competition for orders with TSMC. As of the deadline for this report, TSMC has not responded to these rumors.

Per TSMC’s second-quarter financial report, the revenue proportion from China increased significantly from 9% in the first quarter to 16% in the second quarter. This surpasses other Asia-Pacific regions, making China the second-largest source of revenue after North America, which accounts for 65%.

The same report cites sources indicating that the increase in TSMC’s revenue share from China last quarter is likely due to Chinese IC design companies sensing potential future U.S. pressure that could prevent them from placing orders with TSMC.

As a result, these companies have been placing larger orders in advance to stockpile chips, similar to the situation previously seen when Huawei’s HiSilicon placed massive orders with TSMC to stockpile chips just before being blacklisted by the U.S.

It is understood that although the related Chinese IC companies may not using the most advanced processes, they are employing relatively advanced processes, which have been developed over several years, and applied in areas such as ADAS, mobile phones, and high-speed computing. Recently, these customers have continued to place orders with TSMC and have also begun evaluating backup plan, which involves switching orders to Samsung.

Sources cited by the report also pointed out that while Chinese IC design houses would like to diversify risks regarding the relatively advanced nodes by placing orders with companies other than TSMC, they may not be allowed to collaborate with Intel. This is why Samsung may emerge as an option.

Read more

• [News] TSMC Reportedly Received Urgent Orders from Chinese Clients, as They Offered to Pay up to 40% Extra
• [News] TSMC Projects 7.5% Q3 Revenue Growth, Adjusts Full-Year CAPEX Range

(Photo credit: TSMC)

TSMC unveiled its angstrom-class A16 advanced process during the Company’s 2024 North America Technology Symposium on April 25, set to be mass-produced in 2026. Not only is this earlier than competitors like Intel’s 14A and Samsung’s SF14, both slated for 2027 production, but TSMC also emphasized that the A16 does not require the use of High-NA EUV, making it more cost-competitive.

TSMC’s A16 to Lead Competitors in Production Time and Cost

According to TSMC, the A16 advanced process, combining Super PowerRail and nanosheet transistors, is set for mass production in 2026. Super PowerRail relocates power networks to the backside of wafers, freeing up more space on the frontside for signal networks, enhancing logic density and performance. This is ideal for High-Performance Computing (HPC) products with complex signal routing and dense power networks.

Compared to TSMC’s N2P process, the A16 offers an 8% to 10% speed increase at the same Vdd (operating voltage), a 15% to 20% reduction in power consumption at the same speed, and a density increase of up to 1.1 times, supporting data center products.

Photo credit: TSMC

Additionally, as AI chip companies are eager to optimize designs to leverage the full potential of TSMC’s processes, as per a report from Reuters, TSMC doesn’t believe that ASML’s latest High-NA EUV is necessary for producing A16 process chips.

Furthermore, TSMC showcased the Super Power Rail architecture, slated to be operational in 2026, which delivers power from the backside of the chip, aiding in the accelerated operation of AI chips.

Intel 14A Extends ‘5 Nodes in 4 Years’ Strategy

In February, Intel unveiled its 14A process, which would be after its “5 Nodes in 4 Years” strategy. After integrating High-NA EUV production, Intel 14A is expected to improve energy efficiency by 15% and increase transistor density by 20% compared to Intel 18A.

The enhanced version, Intel 14A-E, will further boost energy efficiency by 5% based on Intel 14A. According to the plan, Intel 14A is set for mass production as early as 2026, while Intel 14A-E is slated for 2027.

Photo credit: Intel

Intel recently announced the completion of the industry’s first commercial High-NA EUV lithography tool assembly. The ASML TWINSCAN EXE:5000 High-NA EUV lithography tool is undergoing multiple calibrations and is scheduled to be operational in 2027 for Intel’s 14A process.

Intel emphasizes that when the High-NA EUV lithography tool is combined with its other leading process technologies, it reduces print size by 1.7 times compared to existing EUV machines. This reduction in 2D dimensions increases density by 2.9 times, aiding Intel in advancing its process roadmap.

Samsung SF1.4 Enhances Performance and Power Efficiency with Nanosheet Addition

Photo credit: Samsung

Compared to TSMC and Intel, Samsung’s progress in the angstrom era seems somewhat lagging. Two years ago at the Samsung Foundry Forum 2022, Samsung unveiled its advanced process roadmap, with the angstrom-level SF1.4 (1.4 nanometers) set for mass production in 2027.

Last October, Samsung’s Vice President of Foundry, Jeong Gi-Tae, reportedly told the Korean media outlet The Elec that Samsung has announced its upcoming SF1.4 (1.4-nanometer class) process technology, which would increase the number of nanosheets from 3 to 4. This move is expected to bring significant benefits in chip performance and power consumption

Samsung announced the mass production of SF3E (3nm GAA) in June 2022, introducing a new Gate-All-Around (GAA) architecture. This year, they unveiled the second-generation 3nm process, SF3 (3nm GAP), utilizing the second-generation Multi-Bridge Channel Field Effect Transistor (MBCFET) to optimize performance based on the SF3E foundation.

Additionally, they introduced the performance-enhanced SF3P (3GAP+), suitable for manufacturing high-performance chips. By 2025, Samsung plans to scale up production of the SF2 (2nm) process, followed by mass production of the SF1.4 (1.4nm) process in 2027.

Reportedly, Samsung aims to increase the number of nanosheets per transistor to enhance drive current and improve performance. More nanosheets allow higher current to pass through the transistor, enhancing switching capability and operational speed.

Moreover, more nanosheets offer better control over current, helping to reduce leakage and lower power consumption. Improving current control means transistors generate less heat.

Read more

• [News] The Imminent Arrival of 2-Nanometer Advanced Process
• [News] Intense Competition with Samsung and Intel in Advanced Processes; TSMC Speeds Up 2nm Progress