According to a report by Taiwan’s Commercial Times, Wistron AI server orders are surging. Following their successful acquisition of orders for NVIDIA’s next-generation DGX/HGX H100 series AI server GPU baseboards, there are industry sources suggesting that Wistron has secured orders for AMD’s next-generation MI300 series AI server baseboards. The earliest shipments are expected before the end of the year, making Wistron the first company to win orders from both major AI server providers. Wistron has refrained from commenting on specific products and individual customers.

The global AI server market is experiencing rapid growth. Industry estimates global production capacity to reach 500,000 units next year, with a market value exceeding a trillion NT dollars. NVIDIA still holds the dominant position in the AI chip market with a market share of over 90%. However, with the launch of AMD’s new products, they are poised to capture nearly 10% of the market share.

There have been recent reports of production yield issues with AMD’s MI300 series, potentially delaying the originally planned fourth-quarter shipments. Nevertheless, supply chain sources reveal that Wistron has secured exclusive large orders for MI300 series GPU baseboards and will begin supplying AMD in the fourth quarter. Meanwhile, in NVIDIA’s L10, Wistron has recently received an urgent order from a non-U.S. CSP (Cloud Service Provider) for at least 3,000 AI servers, expected to be delivered in February of next year.

Supply chain analysts note that while time is tight, Wistron is not billing its customers using the NRE (Non-Recurring Engineering), indicating their confidence in order visibility and customer demand growth. They aim to boost revenue and profit contributions through a “quantity-based” approach.

On another front, Wistron is currently accelerating shipments for not only NVIDIA DGX/HGX architecture’s H100-GPU baseboards but also exclusive supply orders for NVIDIA DGX architecture and AI server front-end L6 mainboard (SMT PCBA) orders for both NVIDIA and AMD architectures under the Dell brand. These orders have been steadily increasing Wistron’s shipment momentum since the third quarter.

(Photo credit: NVIDIA)

According to Liberty Times Net, Inventec, a prominent player in the realm of digital technology, is making significant strides in research and development across various domains, including artificial intelligence, automotive electronics, 5G, and the metaverse. The company has recently introduced a new all-aluminum liquid-cooled module for its general-purpose graphics processing units (GPGPU) powered by NVIDIA’s A100 chips. Additionally, this innovative technology is being applied to AI server products featuring AMD’s 4th Gen EPYC dual processors, marking a significant step towards the AI revolution.

Inventec has announced that their Rhyperior general-purpose graphics processors previously offered two cooling solutions: air cooling and air cooling with liquid cooling. The new all-aluminum liquid-cooled module not only reduces material costs by more than 30% compared to traditional copper cooling plates but also comes with 8 graphics processors (GPUs) and includes 6 NVIDIA NVSwitch nodes. This open-loop cooling system eliminates the need for external refrigeration units and reduces fan power consumption by approximately 50%.

Moreover, Inventec’s AI server product, the K885G6, equipped with AMD’s 4th Gen EPYC dual processors, has demonstrated a significant reduction in data center air conditioning energy consumption of approximately 40% after implementing this new cooling solution. The use of water as a coolant, rather than environmentally damaging and costlier chemical fluids, further enhances the product’s appeal, as it can support a variety of hardware configurations to meet the diverse needs of AI customers.

Inventec’s new facility in Mexico has commenced mass production, with plans to begin supplying high-end NVIDIA AI chips, specifically the H100 motherboards, in September. They are poised to increase production further in the fourth quarter. Additionally, in the coming year, the company is set to release more Application-Specific Integrated Circuit (ASIC) products, alongside new offerings from NVIDIA and AMD. Orders for server system assembly from U.S. customers (L11 assembly line) are steadily growing. The management team anticipates showcasing their innovations at the Taiwan Excellence Exhibition in Dongguan, China, starting on October 7th, as they continue to deepen their collaboration with international customers.

(Source: https://ec.ltn.com.tw/article/breakingnews/4412765)

Semiconductor process technology is nearing the boundaries of known physics. In order to continually enhance processor performance, the integration of small chips (chiplets) and heterogeneous Integration has become a prevailing trend. It is also regarded as a primary solution for extending Moore’s Law. Major industry players such as TSMC, Intel, Samsung, and others are vigorously developing these related technologies.

What are SoC, SiP, and Chiplet?

To understand Chiplet technology, we must first clarify two commonly used terms: SoC and SiP. SoC (System on Chip) involves redesigning multiple different chips to utilize the same manufacturing process and integrating them onto a single chip. On the other hand, SiP (System in Package) connects multiple chips with different manufacturing processes using heterogeneous integration techniques and integrates them within a single packaging form.

Chiplet technology employs advanced packaging techniques to create a SiP composed of multiple small chips. It integrates small chips with different functions onto a single substrate through advanced packaging techniques. While Chiplets and SiPs may seem similar, Chiplets are essentially chips themselves, whereas SiP refers to the packaging form. They have differences in functionality and purpose.

Chiplets: Today’s Semiconductor Development Trend

The design concept of Chiplet technology offers several advantages over SoC, notably in significantly improving chip manufacturing yield. As chip sizes increase to enhance performance, chip yield decreases due to the larger surface area. Chiplet technology can integrate various smaller chips with relatively high manufacturing yields, thus enhancing chip performance and yield.

Furthermore, Chiplet technology contributes to reduced design complexity and costs. Through heterogeneous integration, Chiplets can combine various types of small chips, reducing integration challenges in the initial design phase and facilitating design and testing. Additionally, since different Chiplets can be independently optimized, the final integrated product often achieves better overall performance.

Chiplets have the potential to lower wafer manufacturing costs. Apart from CPUs and GPUs, other units within chips can perform well without relying on advanced processes. Chiplets enable different functional small chips to use the most suitable manufacturing process, contributing to cost reduction.

With the evolution of semiconductor processes, chip design has become more challenging and complex, leading to rising design costs. In this context, Chiplet technology, which simplifies design and manufacturing processes, effectively enhances chip performance, and extends Moore’s Law, holds significant promise.

Applications and Development of Chiplets

In recent years, global semiconductor giants like AMD, TSMC, Intel, NVIDIA, and others have recognized the market potential in this field, intensively investing in Chiplet technology. For example, AMD’s recent products have benefited from the ‘SiP + Chiplet’ manufacturing approach. Moreover, Apple’s M1 Ultra chip achieved high performance through a customed UltraFusion packaging architecture. In academia, institutions like the University of California, Georgia Tech, and European research organizations have begun researching interconnect interfaces, packaging, and applications related to Chiplet technology.

In conclusion, due to Chiplet technology’s ability to lower design costs, reduce development time, enhance design flexibility and yield, while expanding chip functionality, it is an indispensable solution in the ongoing development of high-performance chips.

This article is from TechNews, a collaborative media partner of TrendForce.

According to the Korea Economic Daily. Samsung Electronics’ HBM3 and packaging services have passed AMD’s quality tests. The upcoming Instinct MI300 series AI chips from AMD are planned to incorporate Samsung’s HBM3 and packaging services. These chips, which combine central processing units (CPUs), graphics processing units (GPUs), and HBM3, are expected to be released in the fourth quarter of this year.

Samsung is noted as the sole provider capable of offering advanced packaging solutions and HBM products simultaneously. Originally considering TSMC’s advanced packaging services, AMD had to alter its plans due to capacity constraints.

The surge in demand for high-performance GPUs within the AI landscape benefits not only GPU manufacturers like NVIDIA and AMD, but also propels the development of HBM and advanced packaging.

In the backdrop of the AI trend, AIGC model training and inference require the deployment of AI servers. These servers typically require mid-to-high-end GPUs, with HBM penetration nearing 100% among these GPUs.

Presently, Samsung, SK Hynix, and Micron are the primary HBM manufacturers. According to the latest research by TrendForce, driven by the expansion efforts of these original manufacturers, the estimated annual growth rate of HBM supply in 2024 is projected to reach 105%.

In terms of competitive dynamics, SK Hynix leads with its HBM3 products, serving as the primary supplier for NVIDIA’s Server GPUs. Samsung, on the other hand, focuses on fulfilling orders from other cloud service providers. With added orders from customers, the gap in market share between Samsung and SK Hynix is expected to narrow significantly this year. The estimated HBM market share for both companies is about 95% for 2023 to 2024. However, variations in customer composition might lead to sequential variations in bit shipments.

In the realm of advanced packaging capacity, TSMC’s CoWoS packaging technology dominates as the main choice for AI server chip suppliers. Amidst strong demand for high-end AI chips and HBM, TrendForce estimates that TSMC’s CoWoS monthly capacity could reach 12K by the end of 2023.

With strong demand driven by NVIDIA’s A100 and H100 AI Server requirements, demand for CoWoS capacity is expected to rise by nearly 50% compared to the beginning of the year. Coupled with the growth in high-end AI chip demand from companies like AMD and Google, the latter half of the year could experience tighter CoWoS capacity. This robust demand is expected to continue into 2024, potentially leading to a 30-40% increase in advanced packaging capacity, contingent on equipment readiness.

(Photo credit: Samsung)

Intel Corporation today announced that it has mutually agreed with Tower Semiconductor to terminate its previously disclosed agreement  to acquire Tower due to the inability to obtain in a timely manner the regulatory approvals required under the merger agreement, dated Feb. 15, 2022. In accordance with the terms of the merger agreement and in connection with its termination, Intel will pay a termination fee of $353 million to Tower.

In response to this development, TrendForce provides the following analysis:

As previously mentioned by TrendForce, Intel’s active entry into the semiconductor foundry market has presented challenges. These include:

Diversification of Manufacturing Expertise: Intel, historically focused on manufacturing CPUs, GPUs, FPGAs, and peripheral I/O chips, lacks the specialized fabrication processes possessed by other foundries. The success of acquiring Tower to expand its product line and market presence remains crucial.

Operational Segmentation: Apart from financial divisions, the division of physical facilities and actual production capacity must be strategically managed. Successfully emulating models like AMD/GlobalFoundries or Samsung LSI/Samsung Foundry, where there is a clear distinction between foundry and client, is essential. Simultaneously, Intel faces challenges in preventing orders from its significant client, the Intel Design Department, from flowing outward.

The official termination of the Tower acquisition plan introduces greater uncertainties and challenges for Intel in the competitive foundry market. In an industry marked by heightened competition, having dominance in specialized process technologies and diversified production lines is pivotal for sustaining profitability amid industry downturns. Without the assistance of Tower’s established specialized processes, Intel’s strategic approach and technology development in the foundry business will be worth monitoring.

(Photo credit: Intel)