Recent comments from former U.S. President Donald Trump on protection fees have hit semiconductor stocks hard and brought TSMC back into the spotlight for investors.

As per a report from Barron’s, it’s suggested that America’s stance towards Taiwan is not the best diplomatic strategy. The following key figures highlight TSMC’s importance to both the U.S. and the global economy.

• 700 Billion

After Bloomberg published an exclusive interview with Trump, the Nasdaq Composite Index plummeted 2.8% on July 17th. Large semiconductor stocks, including TSMC and the seven major U.S. tech giants, collectively lost about USD 700 billion in market value overnight.

The report from Barron’s suggested that this phenomenon indicates that the market views TSMC not just as a foundry but also as a crucial supplier of key components for America’s largest and most important enterprises.

• 92%

According to the Semiconductor Industry Association, TSMC manufactures 92% of the world’s advanced semiconductors, while South Korea produces the remaining 8%.

Barron’s noted that though the U.S. aims to increase domestic production of advanced chips, targeting 20% of advanced chips to be produced locally by 2030,. However this will take some time to achieve.

• 33%

TSMC taks pride in itself that it is the world’s first dedicated semiconductor foundry. Namely, all chips produced by TSMC are supplied to semiconductor companies that do not manufacture their own chips. For companies like NVIDIA, AMD, Broadcom, Qualcomm, and others, TSMC is a major supplier.

Barron’s noted that approximately one-third of their chip manufacturing expenses go to TSMC. This has further underscored the significance of the company.

• 45%

NVIDIA and other companies purchase chips from TSMC and then resell them to other companies. According to Barron’s, Microsoft, Meta, Alphabet, Amazon, and Tesla contribute about 45% of NVIDIA’s sales. Although Apple currently doesn’t purchase many chips from NVIDIA, about 27% of Qualcomm’s sales and 17% of Broadcom’s sales come from Apple.

In theory, without TSMC, there would be no iPhone, AI servers, or other electronic products people rely on. For this reason, Tae Kim, a technology journalist at Barron’s, refers to the true risk of disruptions in TSMC’s operations as a “Global Depression.”

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• [News] TSMC Dominates High-End Packaging Market, Potentially Impacting Opportunities for OSAT
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(Photo credit: TSMC)

Recently, Intel, AMD, Samsung, LG Innotek, and SKC’s US subsidiary Absolics have all highly focused on glass substrate technology for advanced packaging. Due to its excellent performance, glass substrate technology has become a rising star in the field of advanced packaging.

In September 2023, Intel announced the so-called “next-generation advanced packaging glass substrate technology,” claiming it could revolutionize the entire chip packaging field. Glass substrate refers to the replacement of organic materials in organic packaging with glass, rather than replacing the entire substrate. Therefore, Intel will not mount chips on pure glass; instead, the core material of the substrate will be made of glass.

Intel stated that glass substrates could lay the foundation for achieving an astounding one trillion transistors on a single package within the next decade. Based on its promising prospect, rumors surface recently that Intel plans to mass-produce glass substrates as early as 2026. Intel has invested approximately a decade in glass substrate technology and currently has a fully integrated glass research line in Arizona, USA. The company stated that the production line costs over USD 1 billion and requires collaboration with equipment and material partners to establish a complete ecosystem. Currently, only a few companies in the industry can afford such an investment, and Intel seems to be the only company so far to successfully develop glass substrate.

Apart from Intel, SKC’s US subsidiary Absolics, AMD, and Samsung also see the broad development prospect of glass substrate.

In 2022, SKC’s US subsidiary Absolics invested around KRW 300 billion to establish the first factory dedicated to producing glass substrate in Covington, Georgia, USA. Recently, the company announced that the factory has been completed and has begun mass production of prototype products. Industry analysts believe this marks a critical moment for the global glass substrate market.

Samsung has formed an alliance composed of Samsung Electro-Mechanics, Samsung Electronics, and Samsung Display to develop glass substrate, aiming to start large-scale mass production in 2026 and commercialize the technology faster than Intel. It’s reported that Samsung Electro-Mechanics plans to install all necessary equipment on a pilot production line by September this year and commence operations in the fourth quarter.

AMD plans to launch glass substrate between 2025 and 2026 and to collaborate with global component companies to maintain its leading position. According to Korean media reports, AMD is conducting performance evaluation tests on glass substrate samples from several major global semiconductor substrate companies, intending to introduce this advanced substrate technology into semiconductor manufacturing.

Currently, with the emergence of new companies like SCHMID and the participation of laser equipment suppliers, display manufacturers, and chemical suppliers, the industry is gradually forming some new supply chains around glass core substrate, and create a diversified ecosystem.

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• [News] Samsung Bullish on Glass Substrate Applications, Setting Up Production Line for Mass Production Starting in 2026

(Photo credit: Intel)

According to a report from Notebookcheck citing market rumors, it’s suggested that the AMD Zen 6 architecture, codenamed Morpheus, will utilize 2nm and 3nm processes. The Zen 6 series includes three versions: Standard, Dense Classic, and Client Dense. Later rumors also indicate the architecture will feature three core configurations: 8-core (Zen 6), 16-core (Zen 6c), and 32-core (Zen 6c Extended).

The same report further indicates that, in the consumer market, the Zen 6 series will include high-end laptop versions like Medusa Point, platform versions for AM5 like Medusa Ridge, and versions suitable for both gaming laptops and desktops like Medusa Halo. AMD plans to launch the Zen 6 architecture in the second quarter of 2025, with production starting by the end of 2025, though mass production might be delayed to 2026.

AMD unveiled Strix Point at COMPUTEX 2024, featuring a combination of the Zen 5 series and RDNA 3.5 architecture. Strix Point’s launch was delayed by two quarters due to issues related to AMD’s plans for 3nm production, which were eventually canceled.

AMD also had plans for Strix Halo, rumored to use TSMC’s N3E process for producing IOD (input/output die) chips similar to Medusa Halo. Strix Halo’s launch was also delayed, possibly due to issues with the IOD chip.

Compared to the Zen 5 series architecture, the Zen 6 series is expected to feature a nearly redesigned memory controller and a new scheduling program. The Zen 6 architecture represents a significant overhaul similar to the Zen 2 architecture, with substantial changes. AMD is said to be looking to finalize the Zen 6 series design by the third quarter and commence production in 2025.

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• [News] A Quick Overview at TSMC’s Latest Collaboration with Intel, NVIDIA and AMD at COMPUTEX 2024
• [News] TSMC’s Advanced Packaging Capacity Fully Booked by NVIDIA and AMD Through Next Year

(Photo credit: AMD)

According to a report from Economic Daily News, TSMC’s advanced packaging platform SoIC is said to have secured another heavyweight customer, with Apple expected to adopt the technology in 2025. If confirmed, Apple will join AMD as a major client expanding its use of TSMC’s SoIC .

TSMC has categorized advanced packaging under its 3D Fabric system integration platform, which comprises three main parts: the SoIC series for 3D silicon stacking technology, and the CoWoS and InFo families for back-end advanced packaging.

Reportedly, it is said that the CoWoS family has been facing capacity constraints recently. To address this, TSMC is not only expanding its own production but also collaborating with testing service providers to increase output.

On the other hand, TSMC’s SoIC platform, which is part of front-end packaging, has fewer bottlenecks and began small-scale production in 2022. TSMC has long-term plans to expand SoIC capacity by more than 20 times by 2026 to meet growing customer demand.

In recent years, NVIDIA and AMD have been aggressively targeting the AI market, setting high growth targets for 2024. Both companies have sought collaboration with TSMC and several Taiwanese supply chain partners. The key advantage is Taiwan’s comprehensive supply chain, which can accelerate innovation. As TSMC’s advanced packaging capacity ramps up, industry analysts are optimistic that this will facilitate the smooth procurement and delivery of critical components.

In the highly anticipated SoIC area, AMD’s MI300 series is a recent story of deepened collaboration with TSMC. According to information from AMD and TSMC’s technology forum, the MI300 series not only uses TSMC’s 5nm process but also integrates multiple technologies from TSMC’s 3DFabric platform. This includes stacking the 5nm GPU and CPU on a base chip using SoIC-X technology and further integrating them into CoWoS packaging.

Beyond AMD’s adoption, the same report has cited rumors that Apple might adopt this technology in 2025.

Although TSMC consistently refrains from commenting on individual client details, industry speculation has long suggested that Apple intends to incorporate related technology into the next-generation M-series chips, and possibly even the A-series processors. This could significantly increase transistor density, driving the next wave of innovation in the mobile device and AI PC markets.

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• [News] TSMC Reportedly Secures 4 Major Clients for SoIC, Including Apple, NVIDIA and Broadcom
• [News] TSMC’s SoIC Demand Heats Up, Reports Suggest Significant Capacity Expansion

(Photo credit: TSMC)

According to a report from Commercial Times, the construction at TSMC’s advanced packaging plant (P1) in the Chia-Yi Science Park has been halted due to the discovery of suspected historical artifacts. In response, TSMC has promptly initiated preparations for its second plant (P2). TSMC stated that they will comply with regulations from the relevant authorities regarding the suspected archaeological site found on the Chia-Yi facility grounds.

The total developed area of the Chia-Yi Science Park is approximately 88 hectares, with TSMC’s two advanced packaging plants occupying 20 hectares. This is nearly 40% larger than the 14.3 hectares of the Zhunan packaging and testing plant. The planned area for the P1 plant is about 12 hectares, initially slated for completion by the end of 2026 and mass production by 2028. The discovery of the archaeological site has led to the early initiation of the P2 plant, raising concerns about potential impacts on the advanced packaging capacity plans.

The Southern Taiwan Science Park Administration and the Cultural and Tourism Bureau of Chiayi County both stated on June 17 that, in accordance with the Cultural Heritage Preservation Act, they submitted the case to the Chiayi County Cultural and Tourism Bureau for cultural heritage review on June 7. The review committee has principally agreed to proceed with the rescue excavation, which will be carried out in accordance with relevant regulations.

The Chia-Yi Science Park is a key hub for developing the Great Southern Technology Corridor. Besides providing backend CoWoS (Chip-on-Wafer-on-Substrate) packaging for TSMC’s 2nm process from its Kaohsiung plant, the Chia-Yi facility will further integrate advanced 3D packaging technology, SoIC (System-on-Integrated-Chips), highlighting its strategic importance.

As AI chips continue to evolve, the competition in advanced packaging remains fierce, with many clients eagerly anticipating developments.

TSMC’s advanced packaging capacity is scarce, with primary customer NVIDIA having the highest demand, occupying about half of the capacity, followed closely by AMD. Broadcom, Amazon, and Marvell have also expressed strong interest in using advanced packaging processes.

Per a report from global media outlet Wccftech, NVIDIA’s Rubin GPU is expected to adopt a 4x reticle design and utilize TSMC’s CoWoS-L packaging technology, along with the N3 process. Moreover, NVIDIA will use next-generation HBM4 DRAM to power its Rubin GPU.

Industry sources cited in Commercial Time’s report have indicated that by the end of next year, TSMC’s monthly CoWoS capacity will be increased to 60,000 wafers. With growing orders and a steep learning curve, the annual capacity is expected to surpass 600,000 wafers next year. As the semiconductor industry advances into the Angstrom Era, the gap in TSMC’s advanced packaging capacity will gradually widen. Whether the Chia-Yi plant can be completed by 2026 remains a critical focal point.

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(Photo credit: TSMC)