With Trump’s inauguration in January, “Made in America” is expected to dominate, driving an urgent push for semiconductor packaging and equipment companies to relocate to North America. Coupled with TSMC’s Arizona plant set to start mass production early next year, the Commercial Times reports that industry insiders foresee a surge in investments across the North American semiconductor supply chain.

TSMC’s Arizona fab is in the final stages of preparing for 4nm production, with a projected monthly capacity of 20,000 to 30,000 wafers. The company previously signed an MOU with Amkor Technology, a partnership widely seen as supporting advanced and back-end packaging efforts.

On November 8, however, leading packaging and testing company ASE also announced plans to set up a facility in Mexico, aiming to offer advanced packaging services for TSMC’s U.S.-produced chips.

Industry sources cited by Commercial Times speculate that ASE’s Mexico plant, once complete, could compete with Amkor for TSMC’s packaging and testing orders from the Arizona fab. Following the packaging process, the chips could be delivered directly to U.S.-based OEM/ODM partners, including Foxconn, Wistron, and Inventec, for final product assembly, completing the “Made in America” manufacturing chain.

The report also highlights TSMC’s stronghold on advanced packaging technologies such as 3D Fabric and SoIC, required for 2nm production, as well as SoW (system-on-wafer) technology. To meet customer demands, TSMC may need to establish in-house advanced packaging capabilities in the U.S. for even more advanced processes.

TSMC’s advanced packaging line is already highly automated, with optimized production flows reduced from over 300 steps to just over 200, and its gross margin is approaching the company average. The Commercial Times quotes industry experts who suggest that setting up advanced packaging capacity in the U.S. should be straightforward for TSMC, given its extensive experience in wafer fab construction, making it a matter of time.

(Photo credit: TSMC)

Driven by booming demand for AI chips, TSMC’s advanced CoWoS (Chip on Wafer on Substrate) packaging faces a significant supply shortage. In response, TSMC is expanding its production capacity and is considering price increases to maintain supply chain stability.

According to a recent report from Morgan Stanley cited by Commercial Times, TSMC has received approval from NVIDIA to raise prices next year, with CoWoS packaging expected to increase by 10% to 20%, depending on capacity expansion.

At TSMC’s Q3 earnings call, Chairman C.C. Wei highlighted that customer demand for CoWoS far outstrips supply. Despite TSMC’s plan to more than double CoWoS capacity in 2024 compared to 2023, supply constraints persist.

To meet demand, TSMC is collaborating closely with packaging and testing firms to expand CoWoS capacity. Industry sources quoted by CNA reveal that ASE Group and SPIL are working with TSMC on the back-end CoWoS-S oS (on-Substrate) process. By 2025, ASE may handle 40-50% of TSMC’s outsourced CoWoS-S oS packaging.

ASE announced investments in advanced packaging, covering CoWoS front-end (Chip on Wafer) and oS processes, along with advanced testing.

SPIL, a subsidiary of ASE, recently invested NT$419 million in land at Central Taiwan Science Park’s Erlin Park, boosting CoWoS capacity. Additionally, SPIL has allocated NT$3.702 billion to acquire property from Ming Hwei Energy in Douliu, Yunlin, for further expansion.

ASE also announced in early October that its new Kaohsiung K28 facility, slated for completion in 2026, will expand CoWoS capacity.

In early October, TSMC announced a partnership with Amkor in Arizona to expand InFO and CoWoS packaging capabilities. Industry sources cited by CNA suggest that Apple, a user of TSMC’s U.S.-based 4nm process for application processors, may leverage Amkor’s CoWoS capacity. Other U.S.-based AI clients utilizing TSMC’s advanced nodes for ASICs and GPUs are also expected to consider Amkor’s CoWoS packaging in the future.

(Photo credit: TSMC)

Recently, Samsung Electro-Mechanics announced that by 2026, the sales share of its high-end Flip Chip Ball Grid Array (FCBGA) substrates for server and artificial intelligence will exceed 50%.

FCBGA is an integrated circuit (IC) packaging technology，which involves flipping the chip and connecting it to the packaging substrate, then using spherical solder bumps to attach the package to the substrate.

It is mainly used in the packaging of high-density, high-speed, multi-functional large-scale IC chips, offering advantages such as high integration, small size, high performance, and low power consumption.

After a prolonged period of inventory cutting, the balance between semiconductor supply and demand sides has improved, with market demand gradually recovering.

The strong demand in fields such as high-speed network, server, smart driving, and optical module has continuously energized the development of high-multilayer high-speed boards and advanced HDI boards, which in turn is gradually boosting the prosperity of the packaging substrate industry.

As one of the main packaging methods for core electronic components like PC central processing unit, memory, and graphics processor, FCBGA boasts significant market potential in the development of 5G communications, artificial intelligence, virtual reality, and other fields.

Globally, IDM companies such as Micron, Infineon, and NXP have conducted extensive research and development in the FCBGA packaging field, while specialized packaging and testing companies like ASE Group, JCET, and Amkor have also developed various FCBGA technologies.

It is reported that numerous major international semiconductor companies, including Intel, Qualcomm, NVIDIA, AMD, and Samsung, are utilizing FCBGA technology.

Intel is one of the pioneers of FCBGA technology, first applying it to processors in 1997, while Apple is a loyal adopter of FCBGA technology, having used it in its processors from an early stage.

Data indicates that the global FCBGA packaging technology market will continue to grow rapidly in the coming years, with the market size expected to exceed USD 20 billion by 2026.

In face of such a highly potential opportunities, an increasingly more companies are channeling more efforts in developing FCBGA packaging technology, continuously facilitating its innovation and upgrade, and Chinese companies are also a part of this competition.

Currently, main companies engaging in FCBGA packaging substrates business in China include Fastprint, SCC, and FHEC (Forehope-elec), etc, which have disclosed their current progresses referring to FCBGA research and development.

Besides, Strongteam, a real estate company attempting to enter the semiconductor field, has set its sight on the FCBGA sector.

Fastprint disclosed that its low-layer FCBGA packaging substrates are currently in the small-batch delivery stage, with primary applications in the automotive and AI sectors.

SCC stated that it already has the capability of mass producing FCBGA packaging substrates with 16 layers and less, and the capability of sample manufacturing products with more than 16 layers.

The production line validation, sample delivery, and certification processes for various product levels have proceeded smoothly on track. Strongteam is actively transitioning into the semiconductor field and plans to invest in high-end FCBGA IC substrate enterprises.

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(Photo credit: Samsung)

Per a report by the Vietnam News Agency, Vietnamese Prime Minister Phạm Minh Chính recently signed Government Decree No. 791/QĐ-TTg on the establishment of the National Steering Committee for Semiconductor Industry Development.

The main tasks and functions of the steering committee include assisting the Prime Minister and the government in researching, guiding, and coordinating the resolution of important and cross-departmental matters related to promoting the development of Vietnam’s semiconductor industry; researching, consulting, and advising on directions and solutions to promote the industry’s growth; and guiding the coordination among various departments, government agencies, relevant organizations, and entities to vigorously advance the development of Vietnam’s semiconductor industry.

Semiconductor industry is one of the strategically important global industries, and it undoubtedly represents a significant development opportunity for Vietnam.

It is reported that the semiconductor, as one of Vietnam’s nine national-level products, has been included in the country’s key development priorities for the next 30 to 50 years.

According to its National Semiconductor Industry Strategy, Vietnam aims to become a global center for semiconductor chip design, packaging, and testing by 2030.

To achieve this goal, the Vietnamese government has introduced a series of preferential policies and incentives to encourage foreign enterprises to invest in the country.

Moreover, the government has established the National Innovation Center (NIC) to create a high-tech ecosystem and beef up the training of professionals to meet the needs of developing semiconductor industry.

Currently, Vietnam has drawn in investment from foreign enterprises such as Intel, ASE Group, Samsung Electronics, Amkor, Qualcomm, ONSemi, Renesas, Texas Instruments, NXP, Marvell, Synopsys, Hana, and Anpei. In fact, with global capital investment, Vietnam’s semiconductor industry ecosystem is gradually taking shape in recent years.

Vietnam’s Minister of Planning and Investment Nguyễn Chí Dũng stated that Vietnam boasts some conditions and factors conducive to the development of semiconductor industry, involving a stable political system, a favorable geographical location, and attractive investment incentive policies.

The Vietnamese government has been committed to developing semiconductor industry and hopes to attract more and more large enterprises to invest in Vietnam.

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• [News] Nvidia CEO Visits Vietnam, Plans to Establish Chip R&D Base

(Photo credit: Intel)

TSMC continues to showcase its drive in the advanced packaging market. According to a report from MoneyDJ, TSMC has forecasted that CoWoS will remain in high demand through 2025, with potential for capacity to double in two consecutive years. TSMC is also entering the FOPLP (Fan-Out Panel-Level Packaging) space, a technology that OSATs and panel manufacturers have been developing for years, with a goal to launch it in three years.

TSMC’s stronghold on advanced packaging technologies has raised market concerns that OSATs may see their opportunities diminished as TSMC consolidates its market position.

During its earnings call, TSMC introduced “Foundry 2.0,” a new definition for the semiconductor manufacturing industry. This expanded definition now includes not only foundry services but also packaging, testing, photomask production, and other integrated component manufacturing, excluding memory production. TSMC further stated that this new definition will better reflect the company’s growing market opportunities and that the company will focus solely on cutting-edge back-end technologies.

Under this new definition, TSMC estimates the Foundry 2.0 industry will be nearly USD 250 billion in 2023, up from the previous estimate of USD 115 billion. With this new scope, the industry is expected to grow by 10% annually in 2024. Additionally, TSMC’s market share in Foundry 2.0 (logic semiconductor manufacturing) for 2023 is revised to 28%, with expectations for continued growth in 2024.

The sources cited by the report has pointed out that, observing TSMC’s process advancements, the 3nm process began mass production in 2022, with the 2nm process set for 2025, indicating a lengthening of the development cycle to three years.

Regarding the aforementioned nodes, advanced packaging may help enhance performance, reduce costs, and has the advantage of binding high-end products from top-tier clients. Additionally, the investment required for advanced packaging is significantly smaller compared to frontend technologies, making it a crucial area of focus.

The report continues to note that TSMC currently retains the majority of major CoWoS orders and collaborates with OSATs in the WoS segment. However, TSMC has reportedly yet finalized its CoW segment outsourcing orders.

Meanwhile, AMD and NVIDIA have reportedly turned to Amkor and ASE’s subsidiary, Siliconware, for CoWoS-related products, focusing on cost-sensitive high-performance products. Amkor is expected to supply about 70,000 to 80,000 units annually this year, while Siliconware can provide about 50,000 to 60,000 units.

Additionally, OSATs have been confined to mature IC FOPLP technologies for the past 7-8 years, whereas TSMC has announced it will launch its own FOPLP technology in three years.

TSMC’s planned FOPLP is a rectangular CoWoS-L concept, offering advantages in low unit cost and large-size packaging. However, it faces physical limitations such as issues in coating, spinning, and warping. TSMC, backed by a substantial equipment and materials supply chain, is well-positioned to address these challenges.

As for opportunities for other OSATs, the advanced packaging market is actually vast and can be broadly categorized into flip-chip, fan-out, fan-in, 2.5D/3D, and embedded die packaging.

These technologies can be integrated, and OSATs are not limited to TSMC’s top-tier Info, CoWoS, or SoIC technologies. OSATs can offer more cost-effective advanced packaging solutions compared to fabs, providing competitive alternatives in terms of cost and performance.

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• [News] TSMC Pushes for FOPLP Mass Production by 2027, Reportedly Eyeing on Innolux’s Plant
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(Photo credit: TSMC)