On November 30th, Apple revealed an extension of its partnership with Amkor in the advanced packaging sector within the United States. Apple proudly proclaimed its role as the inaugural and principal client for Amkor’s recently established facility in Peoria, Arizona. In this collaboration, Amkor will handle the packaging of Apple chips manufactured at the nearby TSMC’s wafer fab. Worth noting, Apple is also TSMC’s leading customer at the Arizona fab.

Jeff Williams, Apple’s CEO, emphasized Apple’s unwavering commitment to American manufacturing, stating that they will continue expanding investments in the U.S. Apple silicon’s groundbreaking performance capabilities have enabled users to accomplish unprecedented tasks. The announcement highlights the anticipation of Apple silicon being manufactured and packaged in Arizona.

According to the press release, Apple and Amkor have been collaborating for over a decade, packaging chips extensively used in all Apple products. Concerning the new factory, Amkor will invest approximately $2 billion, and upon completion, it will employ over 2,000 people.

Apple also underscores that the investment in advanced manufacturing is part of the company’s commitment in 2021 to invest USD 430 billion in the U.S. economy over five years. Currently, Apple is working towards achieving this goal through direct spending with American suppliers, data center investments, U.S. capital expenditures, and other domestic expenditures.

On the other hand, Amkor outlined plans to establish a state-of-the-art manufacturing campus featuring an expansive 500,000 square feet of cleanroom space. The primary objective of the initial phase is to initiate production within the next two to three years.

Amkor aims to provide cutting-edge technology catering to high-volume semiconductor advanced packaging and testing, specifically supporting crucial markets such as high-performance computing, automotive, and communications. The newly proposed production facility will be strategically located within a semiconductor hub, surrounded by front-end wafer fabs, IDM, and existing or expanding suppliers in the field, including TSMC, Intel, Applied Materials, ASML, and others.

“Amkor has been a strategic OSAT partner to TSMC for many years,” said Dr. C.C. Wei, CEO of TSMC. “TSMC applauds Amkor for investing in the future of the semiconductor industry with us in Arizona. We share Amkor’s excitement for its significant investment and the value this facility will bring to TSMC, our customers, and the ecosystem.”

Giel Rutten, CEO from Amkor, indicated the incorporation of this new U.S. facility with Amkor’s advanced facilities across Asia and Europe serves to strengthen global extension and fosters both global and regional supply chains. Amkor’s investment is positioned to bolster them in advanced packaging and testing, concurrently reaffirming the commitment to expanding chip manufacturing in the United States.

According from the financial reports, Amkor’s two largest clients are Apple and Qualcomm. Apple accounted for 20.6% and Qualcomm 10.1%. of Amkor’s USD 7.1 billion in revenue last year.
(Image: Amkor)

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On October 11th, Amkor announced the official opening of its factory located in the Yen Phong 2C Industrial Park in Bac Ninh Province, Vietnam. The new facility, occupying 57 acres, is set to become Amkor’s largest, with an investment of approximately $1.6 billion by 2035. The factory primarily focuses on providing advanced system-level packaging and testing solutions to meet the semiconductor industry’s demand for advanced packaging. However, the company has not disclosed the factory’s current production and capacity.

Multiple Players Pursue CoWoS

The ongoing AI trend continues to drive demand for Chip-on-Wafer-on-Substrate (CoWoS) technology, benefiting TSMC, which holds a significant share of CoWoS production orders. However, companies like ASE Group, Amkor, and UMC are also positioning themselves in the CoWoS packaging manufacturing space. Industry experts believe that given the current high demand for TSMC’s CoWoS production, part of this demand may potentially shift to Amkor’s factories.

Furthermore, the popular Nvidia AI chips, which are in high demand globally, utilize 2.5D packaging technology, a responsibility currently held by TSMC. Recently, Nvidia hinted at the mass production of new AI chips like the GH200 and general server chip L40S, with reports suggesting that L40S will not require 2.5D packaging. Instead, it will be shared among several backend packaging companies, including ASE, Amkor, and SPIL.

Industry source has noted the strong demand for CoWoS in the AI sector, and with TSMC’s CoWoS production capacity already unable to meet demand for several quarters, some demand may potentially shift to Amkor or Samaung’s facilities.

Amkor has announced plans to expand its advanced packaging CoWoS-like capacity. According to industry insiders, Amkor’s monthly production capacity for 2.5D advanced packaging is expected to reach approximately 3,000 wafers in early 2023, with estimates of reaching 5,000 wafers by the end of 2023 and aiming for a significant increase to 7,000 units by the end of 2024.

Additionally, ASE Group has announced its presence in advanced CoWoS-related packaging. With their fan-out chip-on-substrate (FOCoS-Bridge) packaging technology, ASE has been chosen by major chip design house to handle their backend packaging after CoW.

In mid-September, South Korean media reported that Samsung is set to introduce its FO-PLP 2.5D advanced packaging technology to catch up with TSMC in the field of advanced packaging for AI chips. Samsung’s Advanced Packaging (AVP) team began developing FO-PLP advanced packaging for 2.5D chip packaging, allowing the integration of System-on-Chip (SoC) and High Bandwidth Memory (HBM) into an interposer to create a complete chip.

It’s worth mentioning that Samsung’s FO-PLP 2.5D packaging is rectangular, while TSMC’s CoWoS 2.5D uses a circular substrate. Samsung’s FO-PLP 2.5D packaging avoids edge substrate losses and boasts higher production efficiency. However, due to the need to transplant chips from wafers onto rectangular substrates, the process is more complex.

CoWoS Demand Continues

CoWoS technology is a form of 2.5D and 3D packaging, where chips are stacked and then packaged onto a substrate, resulting in a 2.5D or 3D structure. This technology reduces chip space, while also decreasing power consumption and costs. CoWoS packaging is applied in high-performance computing, artificial intelligence, data centers, 5G, the Internet of Things, automotive electronics, and other fields.

TrendForce research indicates a growing demand for advanced packaging technologies for AI and HPC chips. Currently, TSMC’s CoWoS is the primary choice for AI server chip production. CoWoS packaging mainly consists of CoW (Chip on Wafer), integrating various logic ICs (such as CPUs, GPUs, ASICs, etc.) and HBM memory, while oS (On Substrate) integrates CoW elements using Solder bump interconnects and packages them on a substrate. These CoWoS packages become the primary computing units on server motherboards, together with other components like networks, storage, power supply units (PSUs), and other I/O units, forming complete AI server systems.

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(Photo credit: Amkor)

As AI demand continues to surge, TSMC (Taiwan Semiconductor Manufacturing Company) has initiated an extensive expansion plan for its CoWoS (Chip-on-Wafer-on-Substrate) production. Within the industry, reports suggest that TSMC, a leading semiconductor foundry, placed a significant wave of orders with Taiwanese equipment manufacturers last week, creating a notable impact.

Additionally, outsourced semiconductor assembly and testing (OSAT) giants, which were originally inquiring about orders, have also significantly increased their orders for advanced packaging. This wave of orders is estimated to be fulfilled between March and April of the upcoming year.

The growth in demand for advanced semiconductor processes due to AI applications necessitates advanced packaging technologies to keep pace. With packaging technologies advancing from 2D and 2.5D to the more advanced 3D IC (Integrated Circuit) configurations, the number of IC stacking layers is increasing, leading to a greater demand for advanced packaging equipment. Considering the current emphasis on CoWoS technology, the industry estimates that production capacity will reach 12,000 to 14,000 wafers in 2023 and double to over 30,000 wafers in 2024.

According to a report by Taiwan’s Money DJ, information from equipment industry sources reveals that TSMC recommenced orders for CoWoS equipment in April 2023, with a second wave of orders in June. Subsequently, sporadic additional orders were placed, and last week witnessed a new significant wave of orders, surprising many.

An anonymous executive from a Taiwanese equipment company expressed that they initially believed TSMC’s orders for CoWoS equipment had concluded, making the recent wave of orders even more unexpected. Furthermore, the increase in orders for advanced packaging equipment by semiconductor testing and packaging facilities is also seen as encouraging.

Market experts believe that semiconductor testing and packaging facilities and semiconductor foundries have different positions and advantages in the advanced packaging market. Their cooperative relationships outweigh their competition. Major OSAT players like ASE, Amkor, and JCET have long possessed advanced packaging technology and are positioned to become an alternative choice for major foundries due to their technical upgrades and competitive pricing. In other words, top-tier orders from customers will be firmly in TSMC’s grasp, while other opportunities will likely be pursued by SATS companies.

Regarding the supply of CoWoS equipment, suppliers like Scientech have received over 30 orders for wet etching processing equipment, while Grand Process Technology and others have shipped nearly 20 units. Meanwhile, G2C+ Alliance members such as GMM and C Sun have reportedly received over 40 orders from the TSMC’s Longtan factory.

(Photo credit: TSMC)

According to a report from Taiwan’s TechNews, NVIDIA has delivered impressive results in its latest financial report, coupled with an optimistic outlook for its financial projections. This demonstrates that the demand for AI remains robust for the coming quarters. Currently, NVIDIA’s H100 and A100 chips both utilize TSMC’s CoWoS advanced packaging technology, making TSMC’s production capacity a crucial factor.

Examining the core GPU market, NVIDIA holds a dominant market share of 90%, while AMD accounts for about 10%. While other companies might adopt Google’s TPU or develop customized chips, they currently lack significant operational cost advantages.

In the short term, the shortage of CoWoS has led to tight chip supplies. However, according to a recent report by Morgan Stanley Securities, NVIDIA believes that TSMC’s CoWoS capacity won’t restrict shipments of the next quarter’s H100 GPUs. The company anticipates an increase in supply for each quarter next year. Simultaneously, TSMC is raising CoWoS prices by 20% for rush orders, indicating that the anticipated CoWoS bottleneck might alleviate.

According to industry sources, NVIDIA is actively diversifying its CoWoS supply chain away from TSMC. UMC, ASE, Amkor, and SPIL are significant players in this effort. Currently, UMC is expanding its interposer production capacity, aiming to double its capacity to relieve the tight CoWoS supply situation.

According to Morgan Stanley Securities, TSMC’s monthly CoWoS capacity this year is around 11,000 wafers, projected to reach 25,000 wafers by the end of next year. Non-TSMC CoWoS supply chain’s monthly capacity can reach 3,000 wafers, with a planned increase to 5,000 wafers by the end of next year.

(Photo credit: TSMC)

According to the news from Liberty Times Net, NVIDIA’s Q2 financials and Q3 forecasts have astounded the market, driven by substantial growth in their AI-centric data center operations. NVIDIA addresses CoWoS packaging supply issues by collaborating with other suppliers, boosting future capacity, and meeting demand. This move is echoed in South Korea’s pursuit of advanced packaging strategies.

South Korea’s Swift Pursuit on Advanced Packaging

The semiconductor industry highlights that the rapid development of generative AI has outpaced expectations, causing a shortage of advanced packaging production capacity. Faced with this supply-demand gap, TSMC has outsourced some of its capacity, with Silicon Interposer production being shared by facilities under the United Microelectronics Corporation and Siliconware Precision Industries. UMC has also strategically partnered with Siliconware Precision Industries, and Amkor’s Korean facilities have joined the ranks of suppliers to augment production capacity.

Due to equipment limitations, TSMC’s monthly CoWoS advanced packaging capacity is expected to increase from 10,000 units to a maximum of 12,000 units by the end of this year. Meanwhile, other suppliers could potentially raise their CoWoS monthly capacity to 3,000 units. TSMC aims to boost its capacity to 25,000 units by the end of next year, while other suppliers might elevate theirs to 5,000 units.

According to the source South Korean media, Samsung entered the scene, competing for advanced packaging orders against NVIDIA. South Korea initiated a strategic research project to rapidly narrow the gap in packaging technology within 5~7 years, targeting giants like TSMC, Amkor, and China’s JCET.

(Source: https://ec.ltn.com.tw/article/paper/1601162)