With silicon photonics emerging as a key enabler in the AI era, semiconductor giants have been accelerating their deployment in the technology. Now TSMC announces its latest breakthrough. According to a press release, by collaborating with EDA solution provider Ansys, the foundry leader has achieved over 10X speed-up of photonics simulation, powered by NVIDIA’s GPUs running on the Azure AI infrastructure of Microsoft.

Silicon PIC is a type of optical communications that enables data to travel farther and faster, which can be integrated to hyperscale data centers and IoT applications.

However, combining photonic and electronic circuits is a painstaking task requiring precise multiphysics design and fabrication. A minor misstep can create continuity challenges within chips, which can result in additional cost and timeline setbacks up to several months.

Therefore, to address challenges and harness the ultra-bandwidth potential of silicon PICs, TSMC partnered with Ansys to accelerate Lumerical FDTD simulations by leveraging Azure virtual machines powered by NVIDIA GPUs.

The press release notes that these Azure NC A100v4 VMs could facilitate the simulations, optimizing resources to achieve a cost-effective balance between performance and expense. Together, the companies achieved over 10X speed-up of Ansys Lumerical FDTD photonics simulation.

Moreover, running Lumerical FDTD simulations in the cloud allows designers to quickly identify optimal chip designs while addressing the multiphysics challenges of integrating photonic and electronic circuits, according to the press release.

It is worth noting that silicon photonics has been one of TSMC’s major focus in recent years. A previous report by Nikkei notes that TSMC aims to ready next-gen silicon photonics for AI in 5 years.

At the launch event of the Silicon Photonics Industry Alliance (SiPhIA) in early September, K.C. Hsu, Vice President of Integrated Interconnect & Packaging at TSMC, stated that with the massive computing demands and the large-scale data transmission in the AI era, silicon photonics plays an increasingly vital role, according to a report by the Economic Daily News.

Citing internal TSMC data, Hsu noted that by 2030, AI cloud services are expected to consume 3.5% of the world’s energy. However, with the assistance of silicon photonics and the co-packaged optics (CPO) technology, which is an advanced heterogeneous integration of optics and silicon on a single packaged substrate, the energy consumption per unit can be further reduced, according to the report.

Earlier in April, TSMC has announced that the company is developing Compact Universal Photonic Engine (COUPE) technology, which uses SoIC-X chip stacking technology to stack an electrical die on top of a photonic die, offering the lowest impedance at the die-to-die interface and higher energy efficiency than conventional stacking methods.

According to its press release, TSMC plans to qualify COUPE for small form factor pluggables in 2025, followed by integration into CoWoS packaging as co-packaged optics (CPO) in 2026, bringing optical connections directly into the package.

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(Photo credit: Ansys)