With the increasing demand for massive computing in fields such as AI, communication, and autonomous vehicles, the evolution of integrated circuits (ICs) has reached a physical limit under the premise of Moore’s Law. How can this limit be surpassed? The answer lies in the realm of optics. Currently, many domestic and international companies are actively embracing “Silicon Photonics” technology. When electronics meet photons, it not only addresses the signal transmission loss issue but is also considered a key technology that could usher in a new era, potentially revolutionizing the future world.

Integrated circuits (ICs) cram millions of transistors onto a single chip, performing various complex calculations. Silicon Photonics, on the other hand, represents integrated “light” paths, where light-conductive pathways are consolidated. In simple terms, it is a technology that converts “electronic signals” into “optical signals” on a silicon platform, facilitating the transmission of both electrical and optical signals.

As technology rapidly advances and computer processing speeds increase, communication between chips has become a critical factor in computing performance. For instance, when ChatGPT was first launched, there were issues with lag and interruptions during the question and answer process, which were related to data transmission problems. Therefore, as AI technology continues to evolve, maintaining computational speed is a crucial aspect of embracing the AI era.

Silicon Photonics has the potential to enhance the speed of optoelectronic transmission, addressing the signal loss and heat issues associated with copper wiring in current computer components. Consequently, semiconductor giants such as TSMC and Intel have already invested in related research and development efforts. In this context, we interviewed Dr. Fang Yen Hsiang, director of the Opto-Electronics Micro Device & System Application Division and Electronic and Optoelectronic System Research Laboratories at the Industrial Technology Research Institute (ITRI), to gain insights into this critical technology.

What Is the Relationship Between Silicon Photonics and Optical Transceivers?

An optical transceiver module comprises various components, including optical receivers, amplifiers, modulators, and more. In the past, these components were individually scattered on a PCB (printed circuit board). However, to reduce power consumption, increase data transmission speed, and minimize transmission loss and signal delay, these components have been integrated into a single silicon chip. Fang emphasizes that this integration is the core of Silicon Photonics.

Integrated Circuits’ Next Step: The Three Stages of Silicon Photonics

• Silicon Photonics Stage 1: Upgrading from Traditional Pluggable Modules

Silicon Photonics has been quietly developing for over 20 years. The traditional Silicon Photonics pluggable optical transceiver modules look very much like USB interfaces and connect to two optical fibers—one for incoming and one for outgoing light. However, the electrical transmission path in pluggable modules had a long distance before reaching the switch inside the server. This resulted in significant signal loss at high speeds. To minimize this loss, Silicon Photonics components have been moved closer to the server’s switch, shortening the electrical transmission path. Consequently, the original pluggable modules now only contain optical fibers.

This approach aligns with the actively developing “Co-Packaged Optics” (CPO) technology in the industry. The main idea is to assemble electronic integrated circuits (EIC) and photonic integrated circuits (PIC) onto the same substrate, creating a co-packaged board that integrates chips and modules. This co-packaging, known as CPO light engines (depicted in figure “d” below), replaces optical transceivers and brings optical engines closer to CPU/GPU chips (depicted in figure “d” as chips). This reduces transmission paths, minimizes transmission loss, and reduces signal delay.

According to ITRI, this technology reduces costs, increases data transmission by over 8 times, provides more than 30 times the computing power, and saves 50% in power consumption. However, the integration of chipsets is still a work in progress, and refining CPO technology will be the next important step in the development of Silicon Photonics.

• Solving the CPO Bottleneck and Beyond – Silicon Photonics Stage 2: Addressing CPU/GPU Transmission Issues

Currently, Silicon Photonics primarily addresses the signal delay challenges of plug-in modules. As technology progresses, the next stage will involve solving the electrical signal transmission issues between CPUs and GPUs. Academics point out that chip-to-chip communication is primarily based on electrical signals. Therefore, the next step is to enable internal chip-to-chip communication between GPUs and CPUs using optical waveguides, converting all electrical signals into optical signals to accelerate AI computations and address the current computational bottleneck.

• Silicon Photonics Ultimate Stage 3: The Arrival of the All-Optical Network (AON) Era

As technology advances even further, we will usher in the era of the “All-Optical Network” (AON). This means that all chip-to-chip communication will rely on optical signals, including random storage, transmission, switching, and processing, all of which will be transmitted as optical signals. Japan has already been actively implementing Silicon Photonics in preparation for the full transition to all-optical networks in this context.

Where Does Silicon Photonics Currently Face Technological Challenges?

Currently, Silicon Photonics faces several challenges related to component integration. First and foremost is the issue of communication. Dr. Fang Yen Hsiang provides an example: semiconductor manufacturers understand electronic processes, but because the performance of photonic components is sensitive to factors such as temperature and path length, and because linewidth and spacing have a significant impact on optical signal transmission, a communication platform is needed. This platform would provide design specifications, materials, parameters, and other information to facilitate communication between electronic and photonic manufacturers.

Furthermore, Silicon Photonics is currently being applied in niche markets, and various packaging processes and material standards are still being established. Most of the wafer foundries that provide Silicon Photonics chip fabrication belong to the realm of customized services and may not be suitable for use by other customers. The lack of a unified platform could hinder the development of Silicon Photonics technology.

In addition to the lack of a common platform, high manufacturing costs, integrated light sources, component performance, material compatibility, thermal effects, and reliability are also challenges in Silicon Photonics manufacturing processes. With ongoing technological progress and innovation, it is expected that these bottlenecks will be overcome in the coming years to a decade.

This article is from TechNews, a collaborative media partner of TrendForce.

(Photo credit: Google)

According to the news from ChinaTimes, Qualcomm announced on the 11th that it has reached a three-year agreement with Apple to supply 5G communication chips for Apple’s smartphones from 2024 to 2026. This also implies that Apple’s efforts to develop its own 5G modem chips may fall through, and the contract manufacturer TSMC stands to benefit the most.

Qualcomm did not disclose the value of this deal but mentioned that the terms of the agreement are similar to previous ones. Previous supply agreements have been highly profitable for Qualcomm but costly for Apple. According to UBS estimates from last month, Qualcomm’s sales of modem chips to Apple in the previous fiscal year amounted to $7.26 billion, accounting for approximately 16% of the company’s revenue.

This also highlights that Apple’s progress in developing modem chips may not be as expected, leading to a delay in their use in their flagship smartphones. Currently, Apple’s iPhones use 5G modem chips from Qualcomm.

Only a few companies worldwide have the capability to produce communication chips, including Qualcomm, MediaTek, and Samsung. In 2019, Apple acquired Intel’s smartphone modem business for $1 billion, along with 2,200 employees and a series of patents. Intel faced difficulties in developing 5G modem chips, resulting in annual losses of around $1 billion.

The market expects Apple to gradually reduce its reliance on third-party chip suppliers. Qualcomm originally estimated that by 2023, their 5G chips would make up only 20% of iPhones. However, Qualcomm’s CFO stated in November of the previous year that “most” of Apple’s phones in 2023 would contain their chips.

(Source: https://www.chinatimes.com/newspapers/20230912000097-260202?chdtv)

The Chinese supply chain, led by Luxshare Precision, has secured Apple AirPods and iPhone assembly orders, while another ODM manufacturer Wingtec Technology, is gradually taking a slice of Taiwan-based orders. This development is poised to impact orders from Apple’s notebook computer between Taiwanese and Chinese factories, creating a ripple effect within the whole supply chain.

TrendForce’s Perspective:

• Taiwanese Manufacturers Face Reallocated Apple Notebook Orders as Chinese Suppliers Strengthen Their Position

Regarding Apple, MacBook assembly was primarily handled by Taiwanese manufacturers Quanta and Foxconn until 2022. With Chinese firm Wingtec progressing from small-scale trial production to mass production of M1 MacBook Air, according to reports in Chinese media, Wingtec’s Yunnan Kunming factory has also received 3C quality certification for M2 chips. This confirms that Wingtec Technology will take on a portion of the future MacBook Air orders. As Foxconn secures the production of larger MacBook Pro models, this shift will primarily affect Quanta’s share in producing Apple computers. Wingtec is set to become the first Chinese factory to manufacture complete Apple MacBook Air units. If Wingtec consistently meets Apple’s product quality requirements and secures additional orders, the fourth quarter of 2023 will become a battleground for Taiwanese manufacturers defending their orders for Apple notebook computers.

• The Taiwanese factories are accelerating the relocation of Apple notebook order production bases to Southeast Asia.

Given the slower recovery of the COVID-19 situation in China, rising labor costs, production capacity constraints, and restricted order volumes approved by customers, various electronic contract manufacturers have shifted their production focus to Southeast Asian countries, including Thailand, Malaysia, and Vietnam. Configuring production capacities for new and existing models, operating new factories, and rapidly transitioning supply chains are challenges of Taiwanese factories.

As Apple’s revenue from notebook computer products gradually contracts, the company is actively pressuring contract manufacturers to lower their product quotes. Additionally, China faces difficulties in recruiting workers, with local manufacturing labor transitioning into service-oriented roles such as live streaming, food delivery, and ride-hailing. This labor shortage has prompted Apple to actively demand that Taiwanese contract manufacturers accelerate the adoption of automation equipment to streamline factory operations, increase production output, and reduce labor costs. In light of the pressure from Apple’s orders and the emergence of the Chinese notebook computer supply chain, Taiwanese factories need to undergo further transformation to maintain their alignment with Apple and offer greater productivity and price advantages.

(Photo credit: Apple)

Apple is slated to unveil four new iPhone models in mid-September: the iPhone 15, iPhone 15 Plus, iPhone 15 Pro, and iPhone 15 Pro Max. TrendForce predicts a production figure of approximately 80 million units for the iPhone 15 series. This represents a 6% YoY growth, bouncing back from last year’s Foxconn-related production hiccups. The Pro series, armed with smoother production cycles and the Pro Max’s exclusive periscope lens, is poised to be a consumer magnet and potentially propel the Pro series to constitute over 60% of Apple’s new device production. However, with overall gloomy market sentiment and Huawei’s comeback in full swing, Apple’s total iPhone sales for the year may take a hit, expected to hover between 220 to 225 million units for a 5% YoY decline.

In regard to specifications for the iPhone 15 series, several noteworthy hardware upgrades have been made. Compliance with EU regulations has led Apple to jump on the USB Type-C bandwagon this year. The iPhone 15 and iPhone 15 Plus will come with significant camera upgrades, sporting a 48MP main sensor to align with the Pro series. Furthermore, they will also be featuring Apple’s Dynamic Island. On the other hand, the Pro series promises cutting-edge processor upgrades, increased Dram capacity, and introduces a titanium-aluminum alloy frame. The Pro Max also intends to elevate mobile photography to the next level with its exclusive periscope lens.

Advances in technology, while exciting, can also ratchet up the intricacies of mass production. Reports of component snags and assembly issues have surfaced as production of the new iPhone models revs up in the third quarter. The iPhone 15 and iPhone 15 Plus, in particular, have been grappling with lower-than-expected yield rates for their new 48MP cameras. Meanwhile, the Pro series is confronting challenges with panel and titanium alloy frame assembly. However, evidence suggests that the Pro series is likely to overcome its obstacles more swiftly than its non-Pro counterparts.

iPhone 15 Pro Max may see a price increase to reflect cost differences

In light of the global economic downturn, Apple is contemplating a cautious pricing strategy to preserve its sales volumes. While the iPhone 15 and iPhone 15 Plus boast 48MP main cameras, they’ll inherit the A16 processor from the iPhone 14 Pro series, with no other significant upgrades. Hence, their starting prices are projected to be aggressively competitive. The iPhone 15 Pro may sport several enhancements that inflate costs, yet these are anticipated to be offset by cost reductions in other components.

Overall, TrendForce predicts a stable pricing landscape for the iPhone 15, iPhone 15 Plus, and iPhone 15 Pro, largely mirroring last year’s figures. The Pro Max, however, is a different story. Equipped with an exclusive high-cost periscope lens, it’s expected to command a premium—likely a bump of up to US$100—to reflect its increased production costs. Should this price adjustment materialize, it would mark the first such move since the era of the iPhone X.

Semiconductor process technology is nearing the boundaries of known physics. In order to continually enhance processor performance, the integration of small chips (chiplets) and heterogeneous Integration has become a prevailing trend. It is also regarded as a primary solution for extending Moore’s Law. Major industry players such as TSMC, Intel, Samsung, and others are vigorously developing these related technologies.

What are SoC, SiP, and Chiplet?

To understand Chiplet technology, we must first clarify two commonly used terms: SoC and SiP. SoC (System on Chip) involves redesigning multiple different chips to utilize the same manufacturing process and integrating them onto a single chip. On the other hand, SiP (System in Package) connects multiple chips with different manufacturing processes using heterogeneous integration techniques and integrates them within a single packaging form.

Chiplet technology employs advanced packaging techniques to create a SiP composed of multiple small chips. It integrates small chips with different functions onto a single substrate through advanced packaging techniques. While Chiplets and SiPs may seem similar, Chiplets are essentially chips themselves, whereas SiP refers to the packaging form. They have differences in functionality and purpose.

Chiplets: Today’s Semiconductor Development Trend

The design concept of Chiplet technology offers several advantages over SoC, notably in significantly improving chip manufacturing yield. As chip sizes increase to enhance performance, chip yield decreases due to the larger surface area. Chiplet technology can integrate various smaller chips with relatively high manufacturing yields, thus enhancing chip performance and yield.

Furthermore, Chiplet technology contributes to reduced design complexity and costs. Through heterogeneous integration, Chiplets can combine various types of small chips, reducing integration challenges in the initial design phase and facilitating design and testing. Additionally, since different Chiplets can be independently optimized, the final integrated product often achieves better overall performance.

Chiplets have the potential to lower wafer manufacturing costs. Apart from CPUs and GPUs, other units within chips can perform well without relying on advanced processes. Chiplets enable different functional small chips to use the most suitable manufacturing process, contributing to cost reduction.

With the evolution of semiconductor processes, chip design has become more challenging and complex, leading to rising design costs. In this context, Chiplet technology, which simplifies design and manufacturing processes, effectively enhances chip performance, and extends Moore’s Law, holds significant promise.

Applications and Development of Chiplets

In recent years, global semiconductor giants like AMD, TSMC, Intel, NVIDIA, and others have recognized the market potential in this field, intensively investing in Chiplet technology. For example, AMD’s recent products have benefited from the ‘SiP + Chiplet’ manufacturing approach. Moreover, Apple’s M1 Ultra chip achieved high performance through a customed UltraFusion packaging architecture. In academia, institutions like the University of California, Georgia Tech, and European research organizations have begun researching interconnect interfaces, packaging, and applications related to Chiplet technology.

In conclusion, due to Chiplet technology’s ability to lower design costs, reduce development time, enhance design flexibility and yield, while expanding chip functionality, it is an indispensable solution in the ongoing development of high-performance chips.

This article is from TechNews, a collaborative media partner of TrendForce.