As AI demand continues to surge, TSMC (Taiwan Semiconductor Manufacturing Company) has initiated an extensive expansion plan for its CoWoS (Chip-on-Wafer-on-Substrate) production. Within the industry, reports suggest that TSMC, a leading semiconductor foundry, placed a significant wave of orders with Taiwanese equipment manufacturers last week, creating a notable impact.

Additionally, outsourced semiconductor assembly and testing (OSAT) giants, which were originally inquiring about orders, have also significantly increased their orders for advanced packaging. This wave of orders is estimated to be fulfilled between March and April of the upcoming year.

The growth in demand for advanced semiconductor processes due to AI applications necessitates advanced packaging technologies to keep pace. With packaging technologies advancing from 2D and 2.5D to the more advanced 3D IC (Integrated Circuit) configurations, the number of IC stacking layers is increasing, leading to a greater demand for advanced packaging equipment. Considering the current emphasis on CoWoS technology, the industry estimates that production capacity will reach 12,000 to 14,000 wafers in 2023 and double to over 30,000 wafers in 2024.

According to a report by Taiwan’s Money DJ, information from equipment industry sources reveals that TSMC recommenced orders for CoWoS equipment in April 2023, with a second wave of orders in June. Subsequently, sporadic additional orders were placed, and last week witnessed a new significant wave of orders, surprising many.

An anonymous executive from a Taiwanese equipment company expressed that they initially believed TSMC’s orders for CoWoS equipment had concluded, making the recent wave of orders even more unexpected. Furthermore, the increase in orders for advanced packaging equipment by semiconductor testing and packaging facilities is also seen as encouraging.

Market experts believe that semiconductor testing and packaging facilities and semiconductor foundries have different positions and advantages in the advanced packaging market. Their cooperative relationships outweigh their competition. Major OSAT players like ASE, Amkor, and JCET have long possessed advanced packaging technology and are positioned to become an alternative choice for major foundries due to their technical upgrades and competitive pricing. In other words, top-tier orders from customers will be firmly in TSMC’s grasp, while other opportunities will likely be pursued by SATS companies.

Regarding the supply of CoWoS equipment, suppliers like Scientech have received over 30 orders for wet etching processing equipment, while Grand Process Technology and others have shipped nearly 20 units. Meanwhile, G2C+ Alliance members such as GMM and C Sun have reportedly received over 40 orders from the TSMC’s Longtan factory.

(Photo credit: TSMC)

Advanced Semiconductor Engineering, Inc. (ASE) has unveiled its Integrated Design Ecosystem™ (IDE) – a collaborative design toolkit, meticulously tailored to enhance advanced package architecture on the VIPack™ platform. This innovation streamlines the transition from single-die SoC to multi-die disaggregated IP blocks, encompassing chiplets and memory integration through 2.5D or advanced fanout structures.

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According to a report by Taiwan’s Economic Daily, TSMC is aggressively expanding its advanced packaging capacity. Recently, they placed an additional 30% order for equipment with manufacturers, leading to a doubling of order volumes for companies in the interposer supply chain, such as UMC and ASE Group. Moreover, there are rumors of price increases on the horizon.

TSMC, responding to the robust production demands from major clients like NVIDIA, AMD, and Amazon, has not only expanded its CoWoS capacity as originally planned but has also added another 30% in new equipment. This move implies that once TSMC’s new advanced packaging capacity comes online next year, it will represent at least a doubling of the current production capacity.

Given the substantial demand for TSMC’s advanced packaging orders, coupled with the necessity of interposer in CoWoS for stacking logic computing ICs and high-bandwidth memory, there is an expectation of significant growth in interposer orders, likely exceeding a twofold increase compared to this year. Notably, semiconductor giants like UMC and ASE Group have already secured significant orders from TSMC for interposer layers and are currently in the mass production and delivery stages.

It is understood that UMC, after venturing into the advanced packaging market in recent years, has introduced packaging solutions applicable to IoT, automotive chips, and more, spanning from wafer bumping and wire bonding packaging to advanced 2.5D, 3DIC, and wafer-level fan-out packaging solutions. The most notable among them is the 2.5D silicon interposer layer solution, which, through collaboration with UMC and other specialized packaging facilities, has proven pivotal in securing major orders in the interposer layer market, particularly from NVIDIA.

Industry sources suggest that UMC has increased prices for super hot run interposer layer orders and initiated capacity expansion plans to meet customer demands, while ASE Group is also contemplating adjustments to its advanced packaging quotations.

(Photo credit: UMC)

According to a report by Taiwan’s Central News Agency, Tien Wu, CEO of the semiconductor packaging and testing giant ASE Group, believes that the semiconductor industry is experiencing ongoing inventory adjustments, with uncertainties remaining in the global economy. However, he maintains a positive long-term outlook, asserting that semiconductor demand remains robust. Wu also revealed that ASE Group is expanding its operations in Penang, Malaysia, with expectations of doubling its revenue to $750 million within 2 to 3 years.

The 2023 Semicon Taiwan is set to begin on the 6th, and when discussing the economic outlook for the second half of the year, Wu noted that the semiconductor industry is well-aware of the current inventory corrections and the lingering global economic uncertainties. Nevertheless, he maintains relative optimism about the industry’s long-term development.

Regarding the company’s involvement in advanced packaging, such as Chip-on-Wafer-on-Substrate (CoWoS), Wu mentioned that ASE Group offers corresponding services in this field. When asked about the contribution of artificial intelligence (AI) applications and advanced packaging to the company’s portfolio, he stated that it’s currently challenging to evaluate. However, he emphasized that AI is a significant focus for ASE Group.

In response to inquiries about whether customers have requested ASE Group to shift a portion of its production capacity outside of Taiwan (Taiwan+1) to mitigate risks, Wu clarified that there have been no specific requests from customers regarding proportional capacity transfers or deadlines for such transfers. Production capacity adjustments are primarily made flexibly, contingent on the readiness of the local supply chain. He emphasized that customer discussions regarding capacity adjustments are rational and logical.

Wu stressed that customer demands are being met in accordance with logic and regulatory considerations. In response to urgent service needs, ASE Group is expanding its operations in locations outside Taiwan. However, this does not signify a complete relocation of Taiwanese production capacity, nor does it indicate that customers have mandated such a shift.

He disclosed that ASE Group’s expansion is taking place in Penang, Malaysia, with the first five-story building expected to be completed by July next year. Plans are in place for a second building by 2025. Currently, ASE Group’s Penang facility generates approximately $350 million in annual revenue. It is projected that within 2 to 3 years, the facility’s revenue will double to $750 million.

In addition to its California presence, Wu highlighted that the ASE Group subsidiary, ISE Labs, has expanded its capacity in San Jose to meet customer demands. He emphasized that ASE Group continues to expand its operations in Taiwan as well, including locations in Zhongli, Kaohsiung, Taichung’s Tanzi.

(Photo credit: ASE)

TSMC’s CoWoS advanced packaging capacity shortage is causing limitations in NVIDIA’s AI chip output. Reports are emerging that NVIDIA is willing to pay a premium for alternative manufacturing capacity outside of TSMC, setting off a surge in massive overflow orders. UMC, the supplier of interposer materials for CoWoS, has reportedly raised prices for super hot runs and initiated plans to double its production capacity to meet client demand. ASE, an advanced packaging provider, is also seeing movement in its pricing.

In response to this, both UMC and ASE declined to comment on pricing and market rumors. In addressing the CoWoS advanced packaging capacity issue, NVIDIA previously confirmed during its financial report conference that it had certified other CoWoS packaging suppliers for capacity support and would collaborate with them to increase production, with industry speculation pointing towards ASE and other professional packaging factories.

TSMC’s CEO, C.C. Wei, openly stated that their advanced packaging capacity is at full utilization, and as the company actively expands its capacity, they will also outsource to professional packaging and testing factories.

It’s understood that the overflow effect from the inadequate CoWoS advanced packaging capacity at TSMC is gradually spreading. As the semiconductor industry as a whole adjusts its inventory, advanced packaging has become a market favorite.

Industry insiders point out that the interposer, acting as a communication medium within small chips, is a critical material in advanced packaging. With a broad uptick in demand for advanced packaging, the market for interposer materials is growing in parallel. Faced with high demand and limited supply, UMC has raised prices for super-hot-run interposer components.

UMC revealed that it has a comprehensive solution in the interposer field, including carriers, customed ASICs, and memory, with cooperation from multiple factories forming a substantial advantage. If other competitors are entering this space now, they might not have the quick responsiveness or abundant peripheral resources that UMC does.

UMC emphasized that compared to competitors, its competitive advantage in the interposer field lies in its open architecture. Currently, UMC’s interposer production primarily takes place in its Singapore plant, with a current capacity of about 3,000 units, with a target of doubling to six or seven thousand to meet customer demand.

Industry analysts attribute TSMC’s tight CoWoS advanced packaging capacity to a sudden surge in NVIDIA’s orders. TSMC’s CoWoS packaging had primarily catered to long-term partners, with production schedules already set, making it unable to provide NVIDIA with additional capacity. Moreover, even with tight capacity, TSMC won’t arbitrarily raise prices, as it would disrupt existing client production schedules. Therefore, NVIDIA’s move to secure additional capacity support through a premium likely involves temporary outsourced partners.

(Photo credit: NVIDIA)