News
According to a report by 36Kr, China’s EV maker, XPeng Motors, has successfully completed the tape-out process for its self-developed intelligent driving chip.
Sources cited by the report further reveal that XPeng’s intelligent driving chip is specifically designed to meet AI demands, including end-to-end large models. The product is considered to be is a central computing architecture chip that supports integrated cabin and driving functionalities.
The AI computing power of this chip is said to be equivalent to that of three mainstream intelligent driving chips.
Additionally, the report mentions that on August 27th, during XPeng’s 10th anniversary and the launch event for the M03 model, XPeng Motors will officially release details about its self-developed chip.
In response to the rumors surrounding the unveiling of XPeng’s self-developed chip, as per the report, XPeng’s Chairman and CEO hinted on his personal social account that the company certainly won’t disappoint.
Previously, NIO, another automobile manufacturer in China, had also announced the successful tape-out of its 5nm autonomous driving chip, the NX9031.
The tape-outs of self-developed chips marks the beginning of a new phase in which automakers are further competing to enhance the efficiency of intelligent driving software and hardware.
Per a previous report by 36Kr, it was noted that XPeng began building its chip team in 2020. Initially, XPeng collaborated with the U.S. chip design company Marvell, but the partnership did not go smoothly.
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(Photo credit: XPeng)
News
Recently, a report from South Korean media outlet BusinessKorea has indicated that the South Korean government is actively advancing new research and development (R&D) projects, including the development of AI chips for autonomous vehicles, with the aim of surpassing the American semiconductor giant NVIDIA.
The report stated that on May 2nd, the South Korean Ministry of Trade, Industry, and Energy announced that the“Second Strategic Planning and Investment Council,” comprising of representatives from research institutes, universities, etc, approved 62 new R&D projects for 2025, including flagship projects and roadmaps in over 11 domains.
The council prioritizes investments in high-end strategic industries to achieve technological sovereignty and breakthrough growth, while also increasing funding for innovative research that undertakes the risk of failure. It ceases subsidies to individual companies and instead focuses on investments centered around core technologies shared across industries, such as artificial intelligence and compliance with global environmental regulations.
Following this investment strategy, the review council has selected 62 projects. Among them, 12 flagship projects are designed to be world-first and best-in-class, aiming to seize the opportunity of next-generation technologies.
In line with this, the review council plans to develop a universal, open next-generation artificial intelligence chip for Software-Defined Vehicles (SDVs), with a processing speed of up to 10 trillion operations per second (TOPS).
Currently, NVIDIA is advancing the development and commercialization of its next-generation autonomous driving chip rated at 1,000 TOPS. Meanwhile, South Korea is developing autonomous driving chips with performance ranging from tens to 300 TOPS.
The Ministry’s goal is to develop the world’s first commercially viable high-speed autonomous driving vehicle network system and a core semiconductor with a processing speed of 10 gigabits per second (Gbps), enabling full Level 4 and above autonomous driving.
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(Photo credit: Pixabay)
Press Releases
There are four major categories of automotive DRAM applications, including infotainment, ADAS, telematics, and D-clusters (digital instrument clusters), according to TrendForce’s latest investigations. Of the four categories, infotainment applications require the highest DRAM content, although DRAM consumption per vehicle across all four categories remains relatively low at the moment. In contrast to ADAS, infotainment applications present a lower barrier to entry for companies, since current legislations and automotive safety standards governing infotainment are not as stringent, making infotainment a highly attractive market for various semiconductor companies and memory suppliers. TrendForce expects infotainment to remain the primary driver of automotive DRAM consumption through 2024, while all four automotive DRAM applications will together likely comprise more than 3% of total DRAM consumption as autonomous driving technology progresses toward higher levels. As such, automotive DRAM applications represents an emerging sector whose potential for growth should not be underestimated.
TrendForce further indicates that the safety requirements of automotive parts are far higher than those of consumer electronics in terms of both quality and durability. As a result, the release of new vehicle models may take up to 3-5 years from development and verification to release. Vehicles still under development are therefore likely to greatly surpass existing models in terms of both memory content and specifications.
Infotainment will comprise the majority of automotive DRAM consumption, while total automotive DRAM consumption is still relatively low
Infotainment applications represent the highest bit consumption among the major automotive DRAM applications, due to the computing demand of basic media entertainment functionalities in vehicles now. However, most vehicles with these functionalities require only about 1-2GB (gigabytes) of DRAM, which is the current mainstream, since infotainment applications are still relatively basic. As infotainment systems evolve towards higher image qualities and higher video bitrates, solutions requiring 4GB in DRAM content are also under development, with high-end systems transitioning to 8GB in DRAM content. On the other hand, given the close viewing distance involved in automotive infotainment, video bitrates must be sufficiently high to minimize lag. DRAM specifications for infotainment applications are therefore gradually shifting from DDR3 2/4Gb (gigabits) to LPDDR4 8Gb in order to satisfy the high data transfer speed and bandwidth required to achieve a sufficiently high video bitrate and optimal viewing experience.
With regards to ADAS, development is currently divided into two architectures: centralized vs. decentralized (or distributed) systems. Decentralized systems include such devices as reverse parking sensors, which require about 2/4Gb of DRAM. Centralized systems, however, require 2/4GB of DRAM, since data collected from various sensors located throughout the vehicle are transferred to and computed in a central control unit in centralized ADAS. Most vehicles with autonomous driving capabilities currently available on the market are still equipped with ADAS levels 1-2 and therefore require relatively low DRAM content. Going forward, as the development of autonomous driving technologies moves to level 3 and beyond, along with the potential inclusion of AI functionalities, vehicles will need to be able to integrate and process enormous amounts of data collected from sensors in real-time, as well as perform immediate decision-making with the collected data. Given the high bandwidth required for such operations, there will be a corresponding increase in automotive demand for higher-spec DRAM as well, and automotive DRAM for ADAS applications is expected to transition from DDR3 to LPDDR4/4X and even LPDDR5 or GDDR5/HBM later on, though this transition will require more time before it can take place, due to existing regulations.
The mainstream memory products used for telematics, or automotive communication systems, are MCP (Multi Chip Package) solutions. Due to the frequency and compatibility requirements of baseband processors contained in these systems, all telematics applications require the use of LPDRAM. As V2V and V2X gradually become necessities in the auto industry, automakers will place a high importance on memory bandwidth, meaning automotive DRAM for telematics will gradually shift from mainstream LPDDR2 solutions to LPDDR4/LPDDR5. Even so, the growth of telematics will depend on the pace of global 5G infrastructure build-out, since telematics requires 5G networks for fast peer-to-peer connections. As for D-clusters, DRAM bit consumption per vehicle for this application category comes to either 2Gb or 4Gb, depending on the individual vehicle’s degree of digitization for its instrumental panel. However, DRAM consumption for D-clusters is not expected to undergo significant future growths, and D-clusters may potentially be merged with infotainment into a single centralized system going forward.
For more information on reports and market data from TrendForce’s Department of Semiconductor Research, please click here, or email Ms. Latte Chung from the Sales Department at lattechung@trendforce.com