Currently, the global semiconductor industry is entering a new period of transformation. With the rapid development of AI, big data, cloud computing, and other technologies, the demand for high-performance computing chips, optical communication chips, and advanced packaging has surged, and recent reports suggest that prices for these types of chips are increasing.

Advanced Process and Advanced Packaging Products May See Price Increases

According to a recent report by Morgan Stanley, TSMC is considering raising prices for its 3nm process and CoWoS advanced packaging technology in response to soaring market demand. TSMC plans to implement these price increases in 2025, with the cost of its 3nm process potentially rising by up to 5%.

Industry analysts point out that on the demand side, major AI chip manufacturers such as NVIDIA and AMD heavily rely on TSMC’s 3nm process, and the explosive growth in AI technology has driven continuous demand for these chips, contributing to the price increase.

On the supply side, the high research and production costs associated with advanced process technology—including equipment investment, material costs, and R&D personnel—add significant pressure to the supply chain. Multiple factors have led to a tight supply of such chips, further driving up prices.

Additionally, TSMC’s 5nm and 4nm process quotes have increased more than previously anticipated by 4%, with some price hikes reaching as much as 10%.

Reports indicate that TSMC also plans to raise prices for its CoWoS advanced packaging technology, with potential increases between 10% and 20%. High demand for CoWoS from major companies like NVIDIA, AMD, Microsoft, Amazon, and Google has resulted in a shortage of CoWoS packaging capacity, which has driven up prices.

According to TrendForce research, NVIDIA is the primary driver of demand for CoWoS, and with the upcoming launch of its Blackwell series, demand for CoWoS is expected to increase by more than 10 percentage points annually by 2025.

Optical Communication Chip Sector Begins Price Increases

Demand for high-speed, high-bandwidth, and low-latency optical communication is rising, particularly in data centers, enterprise networks, and telecommunications, driving demand in the optical communication chip market. Recently, media reports revealed that Marvell, a major optical communication chip manufacturer, has issued a price increase notice, with its entire product line set to see price hikes starting January 1, 2025. According to TrendForce, Marvell ranked sixth in the global IC design market in 2023.

Industry forecasts predict that, driven by ongoing advances in optical communication technology and expanding applications, the global optical communication chip market will grow rapidly in the coming years.

The development and application of technologies such as silicon photonics, optoelectronic hybrid integration, and high-performance photonic chip materials are expected to bring new growth points and opportunities to the optical communication chip market.

(Photo credit: Marvell)

Driven by booming demand for AI chips, TSMC’s advanced CoWoS (Chip on Wafer on Substrate) packaging faces a significant supply shortage. In response, TSMC is expanding its production capacity and is considering price increases to maintain supply chain stability.

According to a recent report from Morgan Stanley cited by Commercial Times, TSMC has received approval from NVIDIA to raise prices next year, with CoWoS packaging expected to increase by 10% to 20%, depending on capacity expansion.

At TSMC’s Q3 earnings call, Chairman C.C. Wei highlighted that customer demand for CoWoS far outstrips supply. Despite TSMC’s plan to more than double CoWoS capacity in 2024 compared to 2023, supply constraints persist.

To meet demand, TSMC is collaborating closely with packaging and testing firms to expand CoWoS capacity. Industry sources quoted by CNA reveal that ASE Group and SPIL are working with TSMC on the back-end CoWoS-S oS (on-Substrate) process. By 2025, ASE may handle 40-50% of TSMC’s outsourced CoWoS-S oS packaging.

ASE announced investments in advanced packaging, covering CoWoS front-end (Chip on Wafer) and oS processes, along with advanced testing.

SPIL, a subsidiary of ASE, recently invested NT$419 million in land at Central Taiwan Science Park’s Erlin Park, boosting CoWoS capacity. Additionally, SPIL has allocated NT$3.702 billion to acquire property from Ming Hwei Energy in Douliu, Yunlin, for further expansion.

ASE also announced in early October that its new Kaohsiung K28 facility, slated for completion in 2026, will expand CoWoS capacity.

In early October, TSMC announced a partnership with Amkor in Arizona to expand InFO and CoWoS packaging capabilities. Industry sources cited by CNA suggest that Apple, a user of TSMC’s U.S.-based 4nm process for application processors, may leverage Amkor’s CoWoS capacity. Other U.S.-based AI clients utilizing TSMC’s advanced nodes for ASICs and GPUs are also expected to consider Amkor’s CoWoS packaging in the future.

(Photo credit: TSMC)

Taiwan’s semiconductor manufacturing is making strides in advanced process and packaging expansion. TSMC’s new 2nm fab in Kaohsiung will hold a tool-in ceremony this November, followed by equipment installations in December. Meanwhile, ASE’s Siliconware Precision Industries is set to expand advanced packaging capacity in the Erlin Science Park.

According to the Liberty Times, TSMC’s first 2nm fab in Kaohsiung’s Nanzih District is nearing completion. Industry sources indicate that TSMC has scheduled a low-profile tool-in ceremony with equipment suppliers on November 26, led by COO Y.P. Chyn, with equipment installations to begin on December 1. The Nanzih site is expected to serve as TSMC’s primary base for 2nm production.

The report also highlights the rapid progress at TSMC’s Nanzih facility. The P1 fab is nearing completion, with the office tower and P2 fab structure already in place, while groundbreaking for a third fab (P3) occurred this month. Industry insiders note that a fourth and fifth fab (P4 and P5) have received environmental approvals and could serve as wafer production sites for TSMC’s A16 process under the 2nm generation.

Key equipment suppliers, including Lam Research, ASML, and Tokyo Electron, have begun establishing presences in Kaohsiung to support this next-generation fab.

In related developments, ASE Technology announced on October 28 that its subsidiary Siliconware Precision Industries will invest NTD 419 million to secure land-use rights in the Erlin Science Park. According to a report from the Commercial Times, industry sources indicate this acquisition is primarily to expand CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity.

TSMC CEO C.C. Wei noted earlier in its third quarter earnings call that CoWoS advanced packaging capacity remains constrained. TSMC has committed to doubling CoWoS capacity by year-end and will continue expanding in 2025 to better align supply with demand. However, due to ongoing capacity limitations, the Commercial Times reported that TSMC stated the capacity shortfall had led them to expand outsourcing to OASTs, seeking support from industry partners.

(Photo credit: TSMC)

At TSMC’s earnings call on the 17th, the company revealed that its CoWoS (Chip-on-Wafer-on-Substrate) capacity will double each year in 2024 and 2025, but demand will continue to outpace supply. According to a report from Money DJ, the CoWoS expansion wave is expected to extend into 2026, promising strong growth for equipment suppliers for at least the next two to three years.

TSMC stated that advanced packaging currently accounts for approximately 7-9% of its revenue, and growth in this segment is expected to outpace the company’s average over the next five years. While the gross margin for advanced packaging is slightly below the company average, it is steadily approaching it. Regarding CoWoS capacity, customer demand significantly exceeds TSMC’s ability to supply, even with production capacity doubling year-on-year in both 2024 and 2025.

According to Money DJ, citing supply chain sources, TSMC has already provided equipment manufacturers with its machine requirements for 2026 and placed orders. Delivery schedules for next year are essentially fully booked, and TSMC is currently working with equipment suppliers to finalize shipment and installation plans for 2026.

The report noted that TSMC’s CoWoS monthly production capacity is expected to reach 35,000 to 40,000 wafers this year, and surge to 80,000 wafers per month next year. Originally, the expansion wave was anticipated to slow somewhat by 2026, with monthly capacity reaching around 100,000 to 120,000 wafers. However, strong and urgent demand from major AI customers continues to drive capacity needs, and with the addition of more equipment, TSMC’s CoWoS capacity could still see significant expansion, potentially reaching 140,000 to 150,000 wafers per month by 2026.

In addition, the report provided an overview of TSMC’s advanced packaging supply chain. Key suppliers for wet process equipment include GPTC and Scientech, which provide automated wet benches and single wafer spin processors. Scientech holds a significant share of CoWoS equipment orders, while GPTC remains a key global supplier for major packaging and testing companies like ASE, Micron, Amkor, and Chinese packaging firms.

(Photo credit: TSMC)

Amkor and TSMC announced today that the two companies have signed a memorandum of understanding to collaborate and bring advanced packaging and test capabilities to Arizona, further expanding the region’s semiconductor ecosystem.

Amkor and TSMC have been closely collaborating to deliver high volume, leading-edge technologies for advanced packaging and testing of semiconductors to support critical markets such as high-performance computing and communications. Under the agreement, TSMC will contract turnkey advanced packaging and test services from Amkor in their planned facility in Peoria, Arizona. TSMC will leverage these services to support its customers, particularly those using TSMC’s advanced wafer fabrication facilities in Phoenix. The close collaboration and proximity of TSMC’s front-end fab and Amkor’s back-end facility will accelerate overall product cycle times.

The companies will jointly define the specific packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS) that will be employed to address common customers’ needs.

The agreement underscores the shared commitment to supporting customer requirements for geographic flexibility in front-end and back-end manufacturing, as well as fostering the development of a vibrant and comprehensive semiconductor manufacturing ecosystem in the United States. The companies’ shared vision is to enable seamless technology alignment for customers across a global manufacturing network.

“Amkor is proud to collaborate with TSMC to provide seamless integration of silicon manufacturing and packaging processes through an efficient turnkey advanced packaging and test business model in the United States,” said Giel Rutten, Amkor’s president and chief executive officer.

“Our customers are increasingly depending on advanced packaging technologies for their breakthroughs in advanced mobile applications, artificial intelligence and high-performance computing, and TSMC is pleased to work side by side with a trusted longtime strategic partner in Amkor to support them with a more diverse manufacturing footprint,” said Dr. Kevin Zhang, TSMC’s Senior Vice President of Business Development and Global Sales, and Deputy Co-COO.“We look forward to close collaboration with Amkor at their Peoria facility to maximize the value of our fabs in Phoenix and provide more comprehensive services to our customers in the
United States.”

(Photo credit: Amkor)