As AI demand continues to surge, TSMC (Taiwan Semiconductor Manufacturing Company) has initiated an extensive expansion plan for its CoWoS (Chip-on-Wafer-on-Substrate) production. Within the industry, reports suggest that TSMC, a leading semiconductor foundry, placed a significant wave of orders with Taiwanese equipment manufacturers last week, creating a notable impact.

Additionally, outsourced semiconductor assembly and testing (OSAT) giants, which were originally inquiring about orders, have also significantly increased their orders for advanced packaging. This wave of orders is estimated to be fulfilled between March and April of the upcoming year.

The growth in demand for advanced semiconductor processes due to AI applications necessitates advanced packaging technologies to keep pace. With packaging technologies advancing from 2D and 2.5D to the more advanced 3D IC (Integrated Circuit) configurations, the number of IC stacking layers is increasing, leading to a greater demand for advanced packaging equipment. Considering the current emphasis on CoWoS technology, the industry estimates that production capacity will reach 12,000 to 14,000 wafers in 2023 and double to over 30,000 wafers in 2024.

According to a report by Taiwan’s Money DJ, information from equipment industry sources reveals that TSMC recommenced orders for CoWoS equipment in April 2023, with a second wave of orders in June. Subsequently, sporadic additional orders were placed, and last week witnessed a new significant wave of orders, surprising many.

An anonymous executive from a Taiwanese equipment company expressed that they initially believed TSMC’s orders for CoWoS equipment had concluded, making the recent wave of orders even more unexpected. Furthermore, the increase in orders for advanced packaging equipment by semiconductor testing and packaging facilities is also seen as encouraging.

Market experts believe that semiconductor testing and packaging facilities and semiconductor foundries have different positions and advantages in the advanced packaging market. Their cooperative relationships outweigh their competition. Major OSAT players like ASE, Amkor, and JCET have long possessed advanced packaging technology and are positioned to become an alternative choice for major foundries due to their technical upgrades and competitive pricing. In other words, top-tier orders from customers will be firmly in TSMC’s grasp, while other opportunities will likely be pursued by SATS companies.

Regarding the supply of CoWoS equipment, suppliers like Scientech have received over 30 orders for wet etching processing equipment, while Grand Process Technology and others have shipped nearly 20 units. Meanwhile, G2C+ Alliance members such as GMM and C Sun have reportedly received over 40 orders from the TSMC’s Longtan factory.

(Photo credit: TSMC)

According to Taiwan’s Money DJ, the AI wave is showing no signs of slowing down. Led by NVIDIA, major players including AMD, Intel, and international chip giants are aggressively entering the AI arena, driving increasing demand for advanced packaging and advanced processes. Industry reports suggest that TSMC is reallocating several thousand personnel from its Hsinchu 12B plant to support its Longtan and Tainan 18B facilities in a bid to address the current urgent demands.

TSMC typically follows a process of initial research and development (R&D) stages for advancing its processes before handing them over to the mini-line teams and then proceeding to full-scale production. As a result, the 2nm process is slated for trial production in the second quarter of 2024, leaving a gap of approximately six months. It is rumored that TSMC is mobilizing staff from its Hsinchu 12B plant to provide support for the CoWoS-focused Longtan facility and the Tainan 18B plant, which is responsible for mass-producing the 3nm process, to address the immediate needs.

Equipment suppliers estimate that TSMC’s CoWoS production capacity is set to reach 12,000 to 14,000 wafers per month by the end of this year, with a projected doubling of production by 2024. By the end of that year, it is expected to reach at least 26,000 wafers per month, potentially even surpassing 30,000 wafers. Meanwhile, for the 3nm family, in addition to Apple and MediaTek, AMD, NVIDIA, Qualcomm, and even Intel are confirmed to adopt the N3 family of processes.

(Photo credit: TSMC)

According to a report by Taiwan’s Economic Daily, TSMC is aggressively expanding its advanced packaging capacity. Recently, they placed an additional 30% order for equipment with manufacturers, leading to a doubling of order volumes for companies in the interposer supply chain, such as UMC and ASE Group. Moreover, there are rumors of price increases on the horizon.

TSMC, responding to the robust production demands from major clients like NVIDIA, AMD, and Amazon, has not only expanded its CoWoS capacity as originally planned but has also added another 30% in new equipment. This move implies that once TSMC’s new advanced packaging capacity comes online next year, it will represent at least a doubling of the current production capacity.

Given the substantial demand for TSMC’s advanced packaging orders, coupled with the necessity of interposer in CoWoS for stacking logic computing ICs and high-bandwidth memory, there is an expectation of significant growth in interposer orders, likely exceeding a twofold increase compared to this year. Notably, semiconductor giants like UMC and ASE Group have already secured significant orders from TSMC for interposer layers and are currently in the mass production and delivery stages.

It is understood that UMC, after venturing into the advanced packaging market in recent years, has introduced packaging solutions applicable to IoT, automotive chips, and more, spanning from wafer bumping and wire bonding packaging to advanced 2.5D, 3DIC, and wafer-level fan-out packaging solutions. The most notable among them is the 2.5D silicon interposer layer solution, which, through collaboration with UMC and other specialized packaging facilities, has proven pivotal in securing major orders in the interposer layer market, particularly from NVIDIA.

Industry sources suggest that UMC has increased prices for super hot run interposer layer orders and initiated capacity expansion plans to meet customer demands, while ASE Group is also contemplating adjustments to its advanced packaging quotations.

(Photo credit: UMC)

According to a report by Taiwan’s Economic Daily, TSMC’s CoWoS advanced packaging capacity is running at full throttle. As they actively expand their production capabilities, there are reports of major customers like NVIDIA increasing their orders for AI chips. Additionally, industry giants like AMD and Amazon have rushed in with urgent orders.

In response to this urgent situation, TSMC is actively seeking equipment suppliers to expand its CoWoS machine procurement. Beyond TSMC’s existing production expansion goals, the company is further increasing its orders for equipment by an additional 30%, highlighting the ongoing fervor in the AI market.

It is reported that TSMC has sought assistance from equipment manufacturers such as Scientech, Allring, Grand Process Technology, E&R Engineering, and GP Group for this endeavor. They plan to complete the delivery and installation of the equipment by the first half of the coming year. The related equipment manufacturers are experiencing a surge in activity.

Industry sources reveal that TSMC’s CoWoS advanced packaging monthly production capacity is currently around 12,000 units. With their previous expansion efforts, they aimed to gradually increase this to 15,000 to 20,000 units per month. Now, with the addition of more equipment, they are looking at the possibility of reaching capacities of over 25,000 units per month, potentially even approaching 30,000 units. This substantial increase in production capacity positions TSMC to handle a significantly larger volume of AI-related orders.

Equipment providers have pointed out that NVIDIA is currently TSMC’s largest customer for CoWoS advanced packaging, accounting for 60% of the production capacity. Recently, in response to robust demand in AI computing, NVIDIA has increased its orders. Additionally, urgent orders from other customers such as AMD, Amazon, and Broadcom have started to pour in.

(Photo credit: TSMC)

According to a report by Taiwan’s Commercial Times, TSMC is facing a tight supply of advanced packaging capacity, with its Taichung factory ramping up equipment support at a rapid pace. Industry insiders have disclosed that TSMC’s annual production capacity for the backend CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging is only 150,000 to 300,000 units, falling short of customer demand by over 20%.

To address this shortfall, TSMC officially inaugurated its advanced packaging and testing Plant 6 in Zhunan in June. TSMC’s management has also committed to steadily increasing CoWoS production capacity each quarter, and third-party testing facilities are being actively engaged to bridge the gap.

It is worth noting that TSMC’s Longtan factory has traditionally been a key hub for CoWoS and InFO (Integrated Fan-Out) packaging, with a primary focus on InFO production at approximately 100,000 units per month and a smaller portion allocated to CoWoS. Although some of the InFO capacity has been relocated to the Southern Taiwan Science Park, Longtan’s physical space constraints continue to make Zhunan the primary location for CoWoS expansion. TSMC’s Taichung AP5 factory, on the other hand, is prioritizing WoS (Wafer-on-Substrate) expansion, with CoW (Chip-on-Wafer) expansion slated to commence next year. Many equipment suppliers have reportedly received urgent orders related to these expansion efforts.

Analysts estimate that this year’s overall CoWoS production will reach 110,000 units, doubling to 250,000 units next year. However, analysts caution that while TSMC currently dominates the CoWoS production landscape, other players are gradually entering the field. Therefore, it is crucial to monitor whether an oversupply situation may emerge in the mid-term next year.

(Photo credit: TSMC)