EUV


2024-07-30

[News] TSMC Reveals High-NA EUV Equipment Will Be Adopted at the Right Time

As the semiconductor industry continues to advance, it has sparked an arms race among Samsung, Intel, and TSMC in acquiring extreme ultraviolet (EUV) equipment. When asked about when TSMC would adopt the extremely expensive High Numerical Aperture EUV (High-NA EUV) lithography equipment, as per a report from Economic Daily News, TSMC’s Senior Vice President of Business Development and Global Sales at TSMC, Kevin Zhang, also revealed his insight regarding the matter in an interview.

Reportedly, High-NA EUV machines are priced as high as USD 380 million each, more than double the cost of regular EUV machines. Samsung and Intel have already invested heavily, purchasing several High-NA EUV machines ahead of TSMC, hoping to gain a competitive edge through more advanced equipment.

Industry sources cited by the report point out that Kevin Zhang did not reveal the exact timeline for TSMC’s purchase of High-NA EUV, indicating that TSMC is confident and will not blindly expand its procurement just because competitors have made early purchases. Instead, TSMC will continue to strategically plan its advanced manufacturing processes, steadily preparing to meet upcoming challenges.

Youtube channel TechTechPotato recently uploaded a 29-minute interview with Kevin Zhang. During the interview, Zhang emphasized that TSMC was the very first in terms of bringing EUV into high-volume manufacturing as early as the 7nm generation.

Zhang pointed out that TSMC currently leads in the usage, mass production, and production efficiency of EUV technology. Zhang also mentioned that scalability and manufacturing costs are significant factors to consider. He believes that TSMC’s R&D team will make the best decision regarding when and where to apply the next generation of EUV technology.

Notably, according to a report from The Chosun Daily, it pointed out that TSMC was expected to maximize the capabilities of its existing EUV equipment and utilize them through multi-patterning techniques. Simultaneously, the company was also evaluating the scale at which additional equipment may be introduced.

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(Photo credit: ASML)

Please note that this article cites information from Economic Daily News, The Chosun Daily and Youtube channel TechTechPotato.

2024-07-22

[News] Samsung’s 2nm Node Will Reportedly Feature 30% More EUV Layers

As the industry is entering the Angstrom era with semiconductor giants eagerly applying EUV machines to the advanced nodes, more details about Samsung’s 2nm have surfaced. According to the latest report by TheElec, Samsung’s 2nm process will feature 30% more extreme ultraviolet (EUV) layers than the 3nm node.

The report notes that Samsung’s 3nm node has 20 EUV mask layers, while the layers of the 2nm node will be increased to late-20. As the cost of manufacturing rises with the number of EUV mask layers, whether the wafer average selling price of Samsung’s 2nm will significantly increase attracts attention.

According to the report, the South Korean semiconductor giant first implemented EUV technology in its logic process nodes with 7nm in 2018. Since then, Samsung has increased the number of EUV layers or process steps with each subsequent node, moving from 5nm to 3nm. The report also states that Samsung’s 1.4nm process, set to begin production in 2027, is expected to feature over 30 EUV layers.

Meanwhile, Samsung is also using EUV in its DRAM production. For its Gen 6 10nm DRAM, Samsung has implemented up to 7 EUV layers, compared to 5 layers used by SK Hynix, TheElec states.

In comparison, according to an earlier report by AnandTech, TSMC’s standard N3 node includes up to 25 EUV layers. TSMC employs EUV double-patterning on some of these layers to achieve greater logic and SRAM transistor density compared to its N5 node.

It is also worth noting that as EUV layers increase with each node, foundries are vying to secure more EUV machines from ASML. The Dutch lithography equipment giant is said to ship over 70 EUV machines to TSMC in 2024 and 2025 in response to the strong demand of 2nm and 3nm, according to a report by MoneyDJ.

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(Photo credit: ASML)

Please note that this article cites information from TheElec and AnandTech.
2024-07-17

[News] ASML Slightly Beats Q2 Earnings Forecasts, with Full-Year Outlook Unchanged

Lithography machine giant ASML released its financial report for the second quarter of 2024, with net sales amounting to EUR 6.2 billion and net income reaching EUR 1.6 billion. The gross margin was 51.5%.

According to the previous financial forecast, net sales for the second quarter were expected to be between EUR 5.7 and 6.2 billion, with a gross margin of 50% to 51%, making the overall performance for the second quarter slightly better than expected.

Additionally, with the continued increase in demand for AI chips, the order intake for the second quarter was EUR 5.6 billion, significantly up from EUR 3.61 billion in the first quarter, returning to the levels of the fourth quarter of 2023. It is also worth noting that in the order intake for the second quarter, EUR 2.5 billion were EUV orders.

This performance was said to be due to the strong sales of immersion DUV systems. ASML President and CEO Christophe Fouquet noted ongoing improvements in overall semiconductor inventory and further increased utilization rates of lithography equipment by logic and memory chip customers. Despite market uncertainties, ASML anticipates continued industry recovery in the second half of the year.

Fouquet also projected third-quarter net sales for 2024 to range between EUR 6.7 and 7.3 billion, with a gross margin of 50% to 51%. Estimated R&D investments are around EUR 1.1 billion, and sales and general administrative expenses (SG&A) are expected to be approximately EUR 295 million.

ASML reportedly regards 2024 as a transitional year, maintaining unchanged full-year expectations and continuing to invest in capacity and technology enhancements. Additionally, strong developments in AI are driving much of the semiconductor industry’s recovery and growth, positioning it ahead of other markets.

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(Photo credit: ASML)

Please note that this article cites information from ASML.

2024-07-15

[News] Korean Semiconductor Equipment Maker Develops ALD Technology to Reduce EUV Process Demand

Chul Joo Hwang, Chairman of South Korean semiconductor equipment company Jusung Engineering, recently stated that future semiconductors will stack transistors together, as the expansion of DRAM and logic chips has reached its limit. Stacking transistors like NAND is necessary to overcome these challenges.

According to a report from South Korean media outlet The Elec, Hwang believes this means developing more atomic layer deposition (ALD) technology to reduce the use of extreme ultraviolet (EUV) lithography steps in the production process of advanced chips.

ALD technology is a thin film process that allows materials to grow layer by layer, offering high uniformity, precise thickness control, and excellent step coverage, overcoming challenges faced by traditional process technologies.

Reportedly, stacking transistors can reduce the need for further scaling of transistors. As evidence, deep ultraviolet (DUV) equipment is expected to be used in 3D DRAM production.

Hwang believes that as stacking becomes increasingly important, the demand for ALD equipment will also rise. Additionally, the production of III-V semiconductors and IGZO semiconductors requires ALD equipment.

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(Photo credit: Jusung Engineering)

Please note that this article cites information from The Elec.

2024-07-09

[News] China Lists Semiconductor Self-Reliance Challenges, Excluding Lithography Equipment

The China Association for Science and Technology (CAST) recently listed challenges facing China’s semiconductor industry. However, the list did not include lithography. According to a report from TechNews, it’s believed that the move to exclude lithography is more of a political consideration aimed at downplaying the impact of US sanctions on China’s local chip manufacturing industry rather than fostering innovation in lithography equipment within China.

Reportedly, Chinese leader Xi Jinping once told the Dutch Prime Minister that China does not need the help from ASML, the world’s leading advanced lithography system manufacturer, to drive its technological development. Currently, Shanghai Micro Electronics (SMEE) and Naura Technology Group in China aim to develop exposure equipment for the first time by April 2024.

However, regarding in the overall semiconductor manufacturing process in China, the production rate of Chinese chip manufacturing equipment is only 20%, with a global market share of less than 1%. In contrast, ASML holds a global market share of 93%.

EUV (Extreme Ultraviolet) lithography equipment is crucial for manufacturing next-generation chips. Even if Chinese companies had obtained these devices before US sanctions, they still require ongoing maintenance and support. The US ban has cut off this supply line, meaning the currently used exposure equipment will eventually cease to operate.

Unless China makes significant breakthroughs in the semiconductor lithography equipment industry, it will face many obstacles in advanced processes. Some industry leaders have already urged their companies to focus on traditional chips and 3D packaging rather than attempting to continue with advanced processes.

Currently, many companies are still striving to circumvent Washington’s sanctions. For instance, Huawei is establishing a major research and development center for exposure and wafer fabrication equipment. Yet, per an earlier report from Reuters, Peter Wennink, former CEO of ASML, stated in an interview that the chip war between China and the US will not be resolved anytime soon and could potentially persist for decades.

Other Chinese companies are also exploring open standard technologies like RISC-V. However, given the current situation, it could take China several years, if not decades, of research and development to catch up with mainstream exposure equipment manufacturers.

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(Photo credit: ASML)

Please note that this article cites information from TechNews and Reuters.

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