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The China Association for Science and Technology (CAST) recently listed challenges facing China’s semiconductor industry. However, the list did not include lithography. According to a report from TechNews, it’s believed that the move to exclude lithography is more of a political consideration aimed at downplaying the impact of US sanctions on China’s local chip manufacturing industry rather than fostering innovation in lithography equipment within China.
Reportedly, Chinese leader Xi Jinping once told the Dutch Prime Minister that China does not need the help from ASML, the world’s leading advanced lithography system manufacturer, to drive its technological development. Currently, Shanghai Micro Electronics (SMEE) and Naura Technology Group in China aim to develop exposure equipment for the first time by April 2024.
However, regarding in the overall semiconductor manufacturing process in China, the production rate of Chinese chip manufacturing equipment is only 20%, with a global market share of less than 1%. In contrast, ASML holds a global market share of 93%.
EUV (Extreme Ultraviolet) lithography equipment is crucial for manufacturing next-generation chips. Even if Chinese companies had obtained these devices before US sanctions, they still require ongoing maintenance and support. The US ban has cut off this supply line, meaning the currently used exposure equipment will eventually cease to operate.
Unless China makes significant breakthroughs in the semiconductor lithography equipment industry, it will face many obstacles in advanced processes. Some industry leaders have already urged their companies to focus on traditional chips and 3D packaging rather than attempting to continue with advanced processes.
Currently, many companies are still striving to circumvent Washington’s sanctions. For instance, Huawei is establishing a major research and development center for exposure and wafer fabrication equipment. Yet, per an earlier report from Reuters, Peter Wennink, former CEO of ASML, stated in an interview that the chip war between China and the US will not be resolved anytime soon and could potentially persist for decades.
Other Chinese companies are also exploring open standard technologies like RISC-V. However, given the current situation, it could take China several years, if not decades, of research and development to catch up with mainstream exposure equipment manufacturers.
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(Photo credit: ASML)
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Peter Wennink, former CEO of ASML, recently stated in an interview with Dutch broadcaster BNR that the chip war between China and the US lacks factual basis and is entirely driven by ideology. According to reports from Reuters and the Commercial Times, Wennink also anticipated that this chip war will not be resolved anytime soon and could potentially persist for decades.
The global EUV lithography supplier ASML stands out as the world’s largest and most advanced EUV company, as both TSMC and Samsung utilize EUV equipment for manufacturing, covering TSMC’s 7nm, 5nm, and 3nm processes and Samsung’s EUV Line (7nm, 5nm, and 4nm), along with the 3nm GAA process.
Wennink further emphasized that ASML has been operating in China for over 30 years, serving numerous customers and employing a large workforce locally. Therefore, the company feels obligated to protect the rights and interests of its customers and employees.
He acknowledged striving to maintain a balance between the US and China during his tenure, advocating on one hand for the US government to relax export restrictions and on the other hand raising concerns with Chinese officials about intellectual property infringements.
According to the reports, Wennink brought up the concerns from the U.S. authority about which party he sided with. Wennink noted that officials in Washington might sometimes think he’s friend of China. However, he is a friend to ASML’s customers, suppliers, employees and shareholders. He then forecasted that given geopolitical interests are at stake, the chip war could take decades to play out.
Before retiring in April this year, Peter Wennink led ASML for a decade, transforming it into Europe’s largest semiconductor equipment manufacturer. During his tenure, China’s semiconductor influence rapidly grew, becoming ASML’s second-largest customer outside of Taiwan.
Since imposing export restrictions on China in 2018, the US has gradually expanded the list of controlled product categories, thus impacting ASML. In April this year, the US announced the latest round of export restrictions, limiting ASML’s ability to service high-end products already shipped to China.
At the time, Wennink emphasized that these new restrictions would not significantly impact ASML’s financial performance from 2025 to 2030, as only a small portion of its Chinese customers would be affected
Besides Netherlands, a previous report from Reuters on June 19 also mentioned that Japan, home to several chip equipment manufacturers like Nikon and Tokyo Electron, imposed restrictions on the export of 23 types of machinery to China to align with U.S. government policies aimed at curbing China’s technological advancements.
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Unlike other major semiconductor manufacturers, including Intel and TSMC, memory giant Micron is not in a hurry to adopt EUV (extreme ultraviolet) lithography for its DRAM production. However, according to a latest report from Technews, in 2024, Micron plans to begin trial production using EUV on its 1γ (1-gamma) process technology at 10-nm level.
The report also notes that currently, all of the company’s mass-produced products are made using DUV (deep ultraviolet) lithography. However, after entering trial production in 2024 with EUV, Micron also anticipates that this process technology will enter large-scale production in 2025.
Another Korean memory giant, Samsung, announced in 2020 that it has successfully shipped one million of the industry’s first 10nm-class (D1x) DDR4 (Double Date Rate 4) DRAM modules based on EUV technology.
In 2021, SK hynix has started mass production of its 10-nm DRAM chips using EUV technology, and is said to invest USD 1.5 billion this year to acquire 8 advanced EUV lithography machines, according to an earlier report from Disc Manufacturer.
Previously, Micron CEO Sanjay Mehrotra stated during an earnings call that the trial production of 10-nm-class 1γ (1-gamma) process DRAM using EUV lithography is progressing well, and they are on track to achieve mass production by 2025 as planned. Currently, Micron is developing the 10-nanometer-class 1γ process DRAM manufacturing technology using EUV lithography at its Hiroshima plant in Japan, which is also the first site for the trial production of 1γ memory, according to Technews.
In order to meet the strong demand for high-performance memory chips driven by AI, Micron is reportedly building a pilot production line for HBM in the U.S. and is considering producing HBM in Malaysia for the first time.
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As semiconductor companies led by TSMC accelerate their pace for capacity expansion, benefiting the local supply chain, industry electricity consumption has emerged as a tough challenge for Taiwan. According to the latest report by the Economic Daily News, Taiwan can only accommodate 20 more large plants, with the power supply possibly reaching its limit in two years.
As its price of industrial electricity is comparatively lower to international rates, the Taiwan market not only attracts semiconductor companies but also international giants to establish data centers, the report noted. In addition to cloud service providers like AWS, Google, and Microsoft, Apple has recently planned to set up a data center in Taiwan.
Citing engineering companies familiar with high-tech industries, the report indicated that more than 10 new data centers are expected to be constructed in Taiwan. With the recent wave of announcements by semiconductor companies to launch advanced nodes and packaging capacities in Taiwan, it is estimated that once the 2nm and 1.6nm factories are fully operational, approximately 10 more semiconductor plants will result in a power supply challenge.
That is to say, Taiwan could accommodate around 20 more tech plants to be built by 2026 in total, the report said.
Take TSMC as an example. According to earlier reports by Commercial Times, the foundry giant’s 3nm plant in Tainan plans to begin mass production in the third quarter, while EUV (Extreme Ultraviolet Lithography) machines will be introduced progressively at another 3nm plant, P8 in Hsinchu, next year. On the other hand, TSMC’s advanced 2-nanometer process capacity is set to begin mass production in 2025.
Commercial Times noted that the EUV machines, crucial for advanced processes, will see over 60 units delivered this year and next to TSMC.
However, EUV machines are considered “electricity-consuming monsters.” According to an earlier report by BITS&CHIPS, ASML’s EUV machine consumes about a megawatt to produce 160 wafers per hour. Since a chip must go through twenty passes in this scanner, this results in an additional energy consumption of about 0.2 kWh per square centimeter of the chip, totaling 1.6 kWh per square centimeter. An earlier report by Bloomberg estimated that because of the vast amount of power needed to run EUVs, TSMC is expected to use 12.5% of Taiwan’s entire electricity supply by 2025.
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(Photo credit: TSMC’s P8, DACIN Construction)
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Semiconductor equipment giant ASML plans to launch Hyper-NA Extreme Ultraviolet (EUV) machines by 2030, signaling the advent of the Angstrom era for semiconductor processes below 1 nanometer. However, according to a report from The Chosun Daily, the high cost of this equipment may cause TSMC, Samsung, and Intel to hesitate.
Reportedly, it’s said that ASML introduced a higher numerical aperture (high-NA) EUV machine last year, which outperforms existing EUV technology. Now, ASML is rumored to release the Hyper-NA EUV for sub-1nm processes by 2030. This development brings up significant strategic considerations for TSMC, Samsung, and Intel due to the substantial expense involved in acquiring such advanced equipment.
According to the report, currently, each EUV machine costs approximately USD 181 million. The new generation high-NA EUV machines cost from USD 290 million to USD 362 million per unit, while the expected cost for Hyper-NA EUV could exceed USD 724 million, namely, about twice the price of the previous generation.
The same report further points out that TSMC plans to maximize the capabilities of its existing EUV equipment and utilize them through multi-patterning techniques. Simultaneously, the company is evaluating the scale at which additional equipment may be introduced.
A source cited in the report mentioned that though TSMC adopted EUV technology after Samsung, it has managed to mitigate the investment burden of adopting new equipment by upgrading existing tools and employing multi-patterning techniques effectively.
The same source also indicated that TSMC is particularly interested in multi-patterning techniques. By leveraging its extensive expertise and existing EUV infrastructure, TSMC has developed multi-patterning processes, aiming to delay the adoption of high-NA and Hyper-NA EUV as much as possible.
TSMC has openly expressed concerns about the high cost of the new generation high-NA EUV machines. TSMC’s Senior Vice President of Business Development and Co-Chief Operating Officer, Dr. Kevin Zhang, has indicated that the development of 1.6 nanometer processes may not necessarily require high-NA technology.
Zhang further mentioned that the decision to adopt the new ASML technology would depend on where it offers the most economic benefits and the technical balance they can achieve. He declined to disclose when TSMC might purchase High-NA EUV from ASML.
As per the same report, Samsung is also considering the adoption of high-NA equipment but is adjusting its long-term roadmap with the emergence of Hyper-NA. According to another source cited by the report, it claimed that choosing high-NA now may not be the best option for long-term plans that involve processes below 1 nanometer.
The source continued that given the emergence of Hyper-NA, one approach might be to maximize the use of existing EUV and skip high-NA, transitioning directly to Hyper-NA. However, this is under the premise that Hyper-NA equipment has reached a certain level of reliability.
Intel was the first foundry to adopt high-NA EUV technology. Last year, its foundry business suffered a USD 7 billion loss, and in the first quarter of this year, it faced a record operational loss. One of the reasons for these financial challenges may be contributed to the cost burden of being an early adopter of the next-generation EUV equipment.
ASML has stated that high-NA EUV will enable Intel to produce chips with process nodes from 2 nanometers down to 14 angstroms (1.4 nanometers) and from 10 angstroms (1 nanometer) down to 7 angstroms (0.7 nanometers). ASML also mentioned that Hyper-NA will be essential for future angstrom-scale processes, as it can reduce the risks associated with multi-patterning processes, the report noted.
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(Photo credit: ASML)