According to Tom’s Hardware, citing a report from HardwareLuxx, Intel has postponed  its Magdeburg fab project to 2029-2030, raising concerns in Germany about whether the allocated funding should be returned to the federal budget.

The German government took some time to secure €10 billion in funding for Intel’s Fab 29 project near Magdeburg. However, construction has faced multiple delays due to various challenges, including Intel’s worsening financial situation. These issues have ultimately led to a temporary halt in the project, pushing its completion timeline further into the future.

The report from Tom’s Hardware indicates that Intel has decided to delay the project restart until 2029 or 2030. If the project is indeed halted until then, it would severely impact Germany’s semiconductor industry development plans and raise concerns about the future use of the €10 billion in subsidies initially allocated to Intel, including whether these funds should be reallocated.

The report pointed out that, according to the original plan, Intel was expected to receive the first portion of the €10 billion subsidy in 2024, which was approximately €3.96 billion. However, with the project on hold, these funds are now postponed.

The report highlighted that Germany’s Finance Minister, Christian Lindner, has advocated reallocating the subsidy to meet other economic needs, which could help Germany’s finances amid current economic pressures. However, Vice Chancellor and Minister for Economic Affairs Robert Habeck opposes this approach, arguing that the funding should continue to support long-term economic growth and environmental initiatives.

As for whether Intel can soon restart the project, the report indicated that, citing industry sources, given Intel’s current financial difficulties, the probability of the Magdeburg fab project resuming is now less than 50%, and there is a significant chance that Intel may ultimately abandon the project entirely.

Furthermore, the report pointed out that if Intel decides to proceed with the Magdeburg fab, it may need to renegotiate with the German federal government over subsidy details, while given the global economic environment over the next few years, securing large subsidies may be challenging.

On the other hand, if Intel ultimately abandons the Magdeburg fab project, Germany would also face issues related to land use. The report noted that the initial land development was tailored specifically for this facility, which could make it difficult to repurpose the site efficiently in the short term, potentially hindering local economic development plans.
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• [News] Intel’s Plant Delay Casts Doubt on German Economy, with Chances of Proceeding Estimated at No More than 50%
• [News] Intel’s 1nm-class Fabs in Germany Reportedly Delayed Due to Black Soil Concerns and Pending EU Subsidy Approval

(Photo credit: Intel)

Leading foundries have been making significant moves, reshaping the semiconductor industry landscape. Vanguard International Semiconductor Corporationrecently announced its entry into the 12-inch wafer foundry business, marking the beginning of a new phase in its strategic transformation for the next 30 years, with silicon carbide (SiC) also included in its development plan.

Meanwhile, India’s first 12-inch wafer plant has begun operations, with the Indian government approving five semiconductor plant construction projects valued at approximately USD18 billion. Additionally, TSMC’s world-first 2nm wafer plant is set for completion by the end of this month. Industry sources indicate that AI-related demand is expected to surge, further boosting TSMC’s profitability.

Vanguard International Semiconductor Corporation Enters 12-Inch Wafer Foundry Market, Aiming for TWD 100 Billion in Annual Revenue in Five Years

On November 2, Vanguard Chairman Mr. Leuh Fang announced that the company officially entered the 12-inch wafer foundry sector and is building a new plant. Both the company and stakeholders have high hopes for the plan, aiming for annual revenue to grow from TWD 50 billion to TWD 100 billion in five years once the new plant reaches full capacity. Fang emphasized that Vanguard announced a USD 7.8 billion investment in collaboration with NXP Semiconductor to build a 12-inch wafer fab, with TSMC providing all necessary critical technology and resources.

On June 5, Vanguard and NXP jointly announced plans to construct a 12-inch wafer fab in Singapore with a total investment of USD 7.8 billion. The fab will employ 130nm to 40nm technology and produce mixed-signal, power management, and analog products for automotive, industrial, consumer electronics, and mobile device markets.

India’s First 12-Inch Wafer Plant Begins Operations

On November 1, Powerchip Semiconductor Manufacturing Corporation (PSMC) announced the official launch of its joint project with Tata Electronics to construct India’s first 12-inch wafer fab. PSMC has received the first payment for Fab IP from Tata, and the construction project will proceed actively. Meanwhile, high-capacity interposer chips, validated by customers, will also begin mass production and delivery.

This 12-inch fab, with a total investment of USD 11 billion, will focus on power management ICs, panel driver chips, microcontrollers, and high-speed computing logic chips. It is projected to have a monthly capacity of 50,000 wafers, primarily serving automotive, computing, data storage, wireless communication, and AI applications. The plant is scheduled for completion and mass production by 2026.

World’s First 2nm Wafer Plant Nears Completion by End of Month

According to recent supply chain news, TSMC’s Kaohsiung P1 site for its first 2nm wafer fab is nearing completion, with a ceremony planned for November 26 and equipment installation set to begin on December 1.

TSMC’s 2nm production will take place at its Hsinchu Science Park (HSP) Baoshan F20 fab and Kaohsiung Nanzi F22 fab. The Baoshan fab is expected to complete a mini production line by the end of the year, targeting volume production by Q4 2025 with a monthly capacity of around 30,000 wafers. Commercial production at the Kaohsiung F22 fab will commence in Q1 2026, also with a monthly capacity of 30,000 wafers.

TSMC’s Chairman and CEO C.C. Wei have highlighted unprecedented demand for the 2nm process. Current planned capacity for the 2nm process has already surpassed that of the previous 3nm generation, underscoring the strong market demand for advanced process technology. Reportedly, TSMC has validated its 2nm product roadmap with customers, with process quotes exceeding USD 30,000 per wafer.

(Photo credit: Vanguard)

There are signs that OpenAI, the company that rose to fame with its AI models, is now eyeing the semiconductor manufacturing sector. However, can building a wafer fab be an easy success?

Recently, international media revealed details of OpenAI CEO Sam Altman’s meetings with senior executives from multiple chip manufacturers during his visit to Asia last year.

Altman visited top executives at companies such as TSMC and Samsung, proposing an ambitious plan to invest $7 trillion to build 36 new wafer fabs and data centers to drive the development of artificial intelligence. Altman envisioned that these fabs, funded by the United Arab Emirates, would produce AI chips, which OpenAI and other companies could use to build AI data centers.

The report highlighted that the scale of the investment Altman mentioned is equivalent to a quarter of the annual output of the U.S. economy. To meet OpenAI’s expansion needs for computing power, it would take several years to complete the necessary wafer fabs.

However, due to cost considerations, TSMC did not endorse Altman’s plan. TSMC executives considered Altman’s proposal too aggressive and risky. Even building a few more wafer fabs involves high risk due to the immense capital required, let alone 36 fabs.

How Much Does a Wafer Fab Cost? Hundreds of Billions of Dollars

In recent years, driven by the demand for AI models, the need for chips has surged, and wafer fabs have been expanding rapidly. However, as OpenAI’s experience shows building a wafer fab is no simple task. It faces challenges such as international dynamics, costs, and technological hurdles, with cost being the largest barrier.

The cost of a wafer fab primarily involves land and facility construction, equipment procurement, technology development and intellectual property, as well as operation and maintenance. Land and facility construction take up a significant portion, as a fab requires extensive land for building plants and basic infrastructure such as electricity, water supply, and communication.

On the equipment side, the purchase of lithography machines, etching machines, ion implanters, and thin-film deposition tools is a major expense, especially for advanced lithography machines, which are extremely costly.

Additionally, a wafer fab requires significant research and operational costs, including intellectual property, equipment maintenance, staff training, safety protocols, and environmental management, all of which demand continuous investment from manufacturers.

When all these factors are calculated, the cost of building a wafer fab is extremely high. Moreover, as chip manufacturing processes evolve, the cost of fabs continues to rise. The industry estimates that the cost of a modern fab is in the range of billions of dollars. For example, Intel’s two factories in Arizona are expected to cost $15 billion each, while Samsung’s fab in Taylor, Texas, is projected to cost $25 billion.

Regional Differences in Wafer Fab Costs

It’s also worth noting that the cost of building a wafer fab varies by region. In Asia, for example, due to a well-established supply chain, abundant talent, and policy support, the cost of building a fab is relatively lower. In regions like Europe, the U.S., and the Middle East, however, costs may be higher due to the need to import technology, train talent, and develop a complete supply chain.

(Photo credit: Intel)

Moments before TSMC’s earnings call, TSMC has released its financial results for the second quarter of 2024. Reportedly, TSMC announced consolidated revenue of NTD 673.51 billion, net income of NTD 247.85 billion, and diluted earnings per share of NTD 9.56 (USD 1.48 per ADR unit) for the quarter ended June 30, 2024.

(Photo credit: TSMC)

Compared to the same period last year, TSMC reported a 40.1% increase in second quarter revenue, with net income and diluted EPS also rising by 36.3%. Quarter-over-quarter comparisons with the first quarter of 2024 showed a 13.6% increase in revenue and a 9.9% increase in net income. All financial figures were prepared in accordance with TIFRS on a consolidated basis.

(Photo credit: TSMC)

In US dollars, TSMC’s second quarter revenue reached USD 20.82 billion, marking a 32.8% year-over-year increase and a 10.3% increase from the previous quarter. The quarter saw a gross margin of 53.2%, an operating margin of 42.5%, and a net profit margin of 36.8%.

During the second quarter, sales of 3-nanometer chips accounted for 15% (up from 9% of the first quarter) of total wafer revenue, while 5-nanometer chips accounted for 35%, and 7-nanometer chips accounted for 17%. Advanced technologies, including 7-nanometer and more advanced chips, constituted 67% of total wafer revenue.

(Photo credit: TSMC)

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• [News] TSMC Reportedly Sees Strong 4nm Demand, with NVIDIA’s Order Up by 25%
• [News] TSMC and Intel Boost Their 2025 Capital Spending to Lead in the AI Era

(Photo credit: TSMC)

Recently, TSMC reportedly got approval for the land change and environmental assessment of its third 2nm plant in Kaohsiung.

It is reported that the Nanzih Industrial Park in Kaohsiung City will adapt to the changing needs of the global semiconductor industry supply chain and will carry out the development of the park in stages. TSMC obtained the construction permit for the first phase of its 2nm advanced process plant in the Nanzih Industrial Park in September 2022, kick starting the construction of first phase, with mass production expected in 2025. The second phase of the plant is also underway.

In response to the shift in the supply chain and the market demand of the global semiconductor industry, TSMC has an urgent need to expand production. The Urban Development Bureau of Kaohsiung City Government stated that TSMC chose to initiate the urban plan variation procedure for the third phase of the plant on the east side of the first phase of the park, covering an area of 17.22 hectares.

To ensure that the industrial use category matches the land use content, the special industrial zone will be changed to a Type A industrial zone, and the building coverage ratio will be adjusted to 45% in consideration of the need of construction, while the original floor area ratio of the special industrial zone will remain at 160%.

Regarding the third 2nm plant, the Kaohsiung City Government’s Water Conservancy Bureau issued a statement saying that the city government fully supports TSMC’s establishment of the plant in the Nanzih Industrial Park, and the reclaimed water supply will be fully guaranteed.

As for electricity, the Economic Development Bureau explained that Kaohsiung’s total power generation in 2022 was 50.886 billion kWh, with total electricity sales of 30.734 billion kWh, accounting for only 60% of power generation. In the future, all TSMC plants will adopt a dual-circuit system to ensure stable power supply.

Previously, Tai-Hsiang Liao, Director of the Economic Development Bureau, pointed out in early April that the city government will provide relevant assistance to meet TSMC’s water and electricity supply needs in Kaohsiung. Additionally, Liao further stated that, based on the current land assessment in the park, the maximum scale of TSMC’s Kaohsiung plant could be up to five plants.

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• [News] TSMC Reportedly Invests over USD 12.3 Billion in EUV, Advancing in 2nm Production
• [News] TSMC Reportedly Accelerates 2nm Progress, with Kaohsiung Plant Rumored to Commence First Tool-in by Year-end

(Photo credit: TSMC)