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After Micron’s announcement of constructing two new fabs in the U.S. in 2022, the memory giant has now provided more details regarding their production timeline. According to the information the company disclosed in its Q3 FY24 financial report and its conference call, the fabs in Idaho and New York target to start operation between 2026 and 2029, a report from AnandTech noted.
“Fab construction in Idaho is progressing well, and we are diligently working to complete the regulatory and permitting processes in New York,” said Sanjay Mehrotra, CEO of Micron, during the company’s conference call with investors and financial analysts. However, the company admits that the Idaho fab will not contribute to meaningful supply until FY27, while and the New York fab is not expected to contribute to bit supply growth until FY28 or later.
AnandTech further noted that as Micron’s fiscal year 2027 begins in September 2026, the new fab near Boise, Idaho, will likely commence operations between September 2026 and September 2027, while the New York fab is expected to begin operations afterwards. Namely, Micron’s U.S. memory fabs are projected to start operations between late 2026 and 2029.
According to an earlier report by Bloomberg, Micron is expected to receive over USD 6 billion in funding through the “Chips Act” from the Department of Commerce to assist with the costs of local factory projects, as part of efforts to bring semiconductor production back to U.S. soil.
Though its U.S. fabs may not start operation soon, Micron does confirm the strong momentum from HBM, saying that its HBM production capacity has been fully booked through 2025, according to another report by TheElec. The company would be the second memory giant to make such a statement, after SK hynix.
Micron claims that it expect to generate “several hundred million dollars” of revenue from HBM in FY24, and “multiple $Bs” in revenue from HBM in FY25. The company has already sampled its 12-high HBM3E product and expect to ramp it into high volume production in 2025, as it is also confident to maintain the technology leadership with HBM4 and HBM4E.
To support the strong market demand as well as preparing for the mass production for its U.S. fabs, Micron expects to increase its capital spending materially next year, with capex around mid-30s % range of revenue for FY25, which will support HBM assembly and test equipment, fab and back-end facility construction as well as technology transition investment to support demand growth, the company said.
Micron states that its average quarterly capex in FY25 to be meaningfully above the Q4 2024 level of USD 3 billion, which means its capex would be around USD 12 billion, reporting a strong 50% YoY growth comparing to the USD 8 billion in FY24.
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(Photo credit: Micron)
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Vanguard International Semiconductor (VIS), an affiliate of TSMC, announced today a joint venture with NXP to build a 12-inch fab in Singapore. According to its press release, the construction is set to begin in the second half of 2024, with mass production expected by 2027. The initial investment for the fab is approximately USD 7.8 billion.
VIS stated in the official press release that it will establish a joint venture company, VisionPower Semiconductor Manufacturing Company (VSMC), with NXP in Singapore to build a 12-inch fab. The joint-venture fab will support 130nm to 40nm mixed-signal, power management and analog products, targeting the automotive, industrial, consumer and mobile end markets, of which its underlying process technologies are planned to be licensed and transferred to the joint venture from TSMC.
The company further stated that the joint venture will begin construction of the initial phase of the wafer fab in the second half of 2024, pending receipt of all required regulatory approvals, with initial production available to customers during 2027.
The joint venture will operate as an independent, commercial foundry supplier, providing assured proportional capacity to both equity partners, with an expected output of 55,000 300mm wafers per month in 2029. The joint venture will create approximately 1,500 jobs in Singapore. Upon the successful ramp of the initial phase, a second phase will be considered and developed pending commitments by both equity partners.
The total cost of the initial build out is anticipated to be USD 7.8 billion. VIS will inject USD 2.4 billion representing a 60 percent equity position in the joint venture and NXP will inject $1.6 billion for the remaining 40 percent equity position. VIS and NXP have agreed to contribute an additional USD 1.9 billion which will be utilized to support the long-term capacity infrastructure. The remaining funding including loans will be provided by third parties to the joint venture. The fab will be operated by VIS.
“VIS is pleased to work with leading global semiconductor company NXP to build our first 300mm fab. This project aligns with our long-term development strategies, demonstrating VIS’ commitment to meeting customer demands, and diversifying our manufacturing capabilities,” said VIS Chairman Leuh Fang.
“NXP continues to take proactive actions to ensure it has a manufacturing base which provides competitive cost, supply control, and geographic resilience to support our long-term growth objectives,” said Kurt Sievers, NXP President and CEO. “We believe VIS is well suited and fully understands the complexities involved in building and operating together with NXP a 300mm analog mixed signal fab. The joint venture partnership we intend to create with VIS perfectly aligns within NXP’s hybrid manufacturing strategy.”
Regarding this move, TrendForce posits that it reflects the trend of global supply chains shifting “Out of China, Out of Taiwan”(OOC/OOT), with Taiwanese companies accelerating their overseas expansion to improve regional capacity flexibility and competitiveness.
TrendForce noted that the semiconductor supply chain has been diversifying over the past two years to mitigate geopolitical and pandemic-related risks, forming two major segments: China’s domestic supply chain and a non-China supply chain. Recent US tariff increases have accelerated this shift, leading to increased orders from American customers.
Consequently, Vanguard’s capacity utilization rate is expected to rise to approximately 75% in the second half of this year, exceeding initial expectations. Additionally, inquiries for capacity at Vanguard’s existing Singapore Fab 3E plant have significantly increased, indicating potential support for the new plant’s capacity from customer demand and order transfers, according to Trendforce.
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(Photo credit: VIS)
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In the past two years, the semiconductor industry has experienced a market downturn, a recovery slower than expected, and a cash crunch. Major companies such as Intel, TSMC, and Samsung, while continuing to advance their expansion projects, have been constantly adjusting and slowing down the pace and schedule of their fab construction to better serve their long-term development goals. It’s found that seven fabs worldwide are projected to delay construction.
According to a report from global media outlet Volksstimme, the construction of Intel’s Fab 29.1 and Fab 29.2 near Magdeburg, Germany, has been postponed due to pending approval of EU subsidies and the need to remove and reuse black soil. The date of commencement has been pushed from summer 2024 to May 2025.
Earlier reports indicated that the construction of this chip planr was initially expected to begin in 1H23, but due to subsidy delays, construction was put off to summer 2024. Moreover, the topsoil at the construction site cannot be cleared until May 2025 at the earliest.
It is reported that Intel’s Fab 29.1 and Fab 29.2 were originally scheduled to start operations by late 2027 and were expected to employ advanced manufacturing processes, potentially Intel 14A (1.4nm) and Intel 10A (1nm) process nodes. However, Intel now estimates that it will take four to five years to build these two plants, and production is expected to commence between 2029 and 2030.
In February 2024, Samsung revealed that it had partially halted the construction of its fifth semiconductor plant in Pyeongtaek, Gyeonggi Province. Samsung originally planned to build six semiconductor plants on an 855,000 square meter site in Pyeongtaek, creating the world’s largest semiconductor hub. Currently, the P1, P2, and P3 plants at the Pyeongtaek park house the most advanced DRAM, NAND flash memory, and foundry production lines, while the P4 and P5 plants are under construction.
Samsung stated that the halt was for further inspection. However, industry sources have revealed that Samsung’s adjustment of the new production lines for P4 and P5 fabs is to prioritize the construction of the PH2 production line at P4 fab. It is reported that P4 plant might build PH3 production line to produce high-end DRAM to meet market demands.
Besides, South Korean media Businesskorea also revealed Samsung has postponed the mass production timeline of the fab in Taylor, Texas, US from late 2024 to 2026, which is possibly due to a slowdown in the wafer foundry market growth, and the delay was attributed to U.S. government subsidies and issues related to the complexities in gaining permits.
On April 9, TSMC announced the plan to build a third fab in Arizona. Once completed, this fab will use 2nm process or even more advanced technologies to manufacture wafers for customers. With this addition, TSMC’s total capital expenditure in Phoenix, Arizona, will exceed USD 65 billion.
Meanwhile, TSMC disclosed that their first fab in Arizona will start production in 1H25, using 4nm process. The second fab, initially announced to use 3nm process, will also incorporate the more advanced 2nm process, with mass production set to begin in 2028. This fab was announced in December 2020, which was originally scheduled to start mass production using 3nm process in 2026, primarily, but the latest schedule represents a delay of nearly two years from the original one.
As to the third fab planned to set up in Arizona, TSMC has not yet disclosed the date for construction. However, they mentioned that it will use 2nm process or more advanced ones, with production expected to commence in the late 2030s.
Wolfspeed’s 8-inch SiC fab in Ensdorf, Saarland planned to invest about EUR 2.75 billion, but the construction has been postponed. The project has already secured subsidies of EUR 360 million from the German federal government and EUR155 million from the Saarland government. In addition, Wolfspeed is also seeking financial assistance from the European Chips Act. ZF will provide Wolfspeed with several hundred million dollars of financial investment in exchange for a minority stake in the plant.
Industry sources indicate that Wolfspeed aims to secure more funding before the groundbreaking ceremony. If it fails to gain financial assistance from the European Chips Act, the project is very likely to be delayed. The plant was initially scheduled to start construction in summer 2024, but Wolfspeed CEO Gregg Lowe revealed that it might now begin in 2025.
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(Photo credit: TSMC)
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Fab inventories have declined for two consecutive quarters, indicating that reducing excess stock may currently be the semiconductor industry’s top priority. According to industry sources cited in a report from Commercial Times, fabs are predicted to wait until the second half of 2024 to resume ordering silicon wafers.
According to the latest quarterly analysis report from SEMI, a major microelectronics association, global silicon wafer shipments in the first quarter of 2024 reached 2,834 million square inches (MSI), marking a 5.4% decrease from the previous quarter and a 13.2% decrease from the same period last year.
SEMI attributes this decline in silicon wafer shipments to the continuing decline in IC fab utilization and inventory adjustments. Consequently, shipments of silicon wafers of all sizes experienced negative growth in the first quarter of 2024.
Industry sources cited by the same report note that, based on recent trends in foundry orders, apart from TSMC, other semiconductor manufacturers have seen capacity utilization rates around 70%. Among these, DRAM and Flash memory wafer shipments have shown year-on-year increases of 20.3% and 1%, respectively, indicating better performance compared to previous periods.
Japanese silicon wafer manufacturer Sumco recently announced in its financial report that in the first quarter, overall demand for 12-inch silicon wafers had bottomed out. Demand for logic chips used in AI and DRAM had increased. However, for applications outside of AI, customers continued to adjust their production.
Sumco estimates that due to customer production adjustments and the recovery of silicon wafer demand, it may take until the second half of 2024 for the situation to improve.
Industry sources cited by Economic Daily News believe that most IC design companies have returned to normal days of inventory (DOI) and are prioritizing urgent orders for foundries. However, the inventory levels of fabs and memory fabs remain historically high, so they will primarily focus on digesting existing long-term contracts (LTA) in the short term.
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(Photo credit: TSMC)
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According to a report from Korean media outlet THE ELEC, a senior executive at analog chip manufacturer Texas Instruments (TI) stated that the company is transitioning its production of gallium nitride (GaN) chips from several 6-inch fabs to 8-inch fabs.
The same report further noted that Jerome Shin, manager of Texas Instruments’ Korean subsidiary, stated at a press conference in Seoul that Texas Instruments is preparing to build 8-inch fabs in Dallas and Aizu, Japan. This move will enable the company to offer more competitively priced GaN chips.
Jerome Shin pointed out that there has been a shift in the perception of GaN chips compared to silicon carbide (SiC) chips since 2022. While GaN chips were previously considered more expensive, this perception is changing because Texas Instruments is transitioning its production from 6-inch fabs to 8-inch fabs. Producing larger wafers means more chips per wafer, leading to increased productivity and lower costs for GaN chips.
Currently, the price of GaN chips is already lower than that of SiC chips. Once the transformation of Texas Instruments’ fabs in Dallas and Aizu, Japan is completed, they will be able to offer even more affordable solutions. Expansion at the Dallas facility is expected to be completed by 2025, although Jerome Shin did not disclose the timetable for the Aizu facility.
However, some industry sources cited in the report suggest that Texas Instruments’ plan may lead to a comprehensive decline in GaN chip prices.
Currently, Texas Instruments is also transitioning the production of power management IC from 8-inch fabs to 12-inch fabs. This move has already resulted in a decrease in the prices of power management chips across the industry.
Still, reportedly, transitioning the production of power management chips from 8-inch fabs to 12-inch fabs could enable Texas Instruments to save over 10% in costs.
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(Photo credit: Texas Instruments)