News
After naming its new head for the semiconductor business in May, claiming to strengthen the company’s competitiveness in cutting-edge chips, Samsung has now disclosed its latest developments regarding AI chips. According to information from Reuters and Samsung’s press release, the company plans to provide one-stop solution for clients to expedite their production of AI chips, while its updated 2nm node with backside power delivery is expected to enter the market in 2027.
According to a report from Reuters, the semiconductor giant plans to provide a turn-key solution by integrating its leading services in memory chips, foundry, and chip packaging to capitalize on the AI surge. The production time needed for AI chips usually takes weeks, while under this scheme, it could potentially be reduced by approximately 20%.
Driven by the strong demand from AI chips, Samsung expects the revenue of global chip industry to grow to USD 778 billion by 2028, according to Siyoung Choi, President and General Manager of the Foundry Business in Samsung, the report noted.
On the other hand, the tech heavyweight has introduced on 13th June its latest developments on 2nm and GAA technologies, as tools to empower its AI solutions.
According to Samsung’s press release, its latest 2nm process, SF2Z, has incorporated optimized backside power delivery network (BSPDN) technology, which places power rails on the backside of the wafer to eliminate bottlenecks between the power and signal lines, and thus does better in PPA (power, performance and area), IR drop and performance of HPC designs compared to SF2, its first-generation 2nm node.
Samsung targets mass production for SF2Z in 2027, while SF4U, a high-value 4nm variant, is slated for mass production in 2025. It also confirms that preparations for SF1.4 (1.4nm) are progressing well, with performance and yield targets on track for mass production in 2027, the press release noted.
Regarding the progress on backside power delivery solution, TSMC’s Super PowerRail, which is expected to be used in A16 process, targets mass production in 2025. Intel’s PowerVia on its 20A process, on the other hand, is set for production in 2024.
Read more
(Photo credit: Samsung)
News
With the United States expected to further restrict China from acquiring advanced GAA (Gate-All-Around) chip architecture capabilities, coupled with reports of poor yield rates in Samsung’s 3nm GAA generation, the semiconductor industry sources cited in a report from Commercial Times state that TSMC’s 3nm FinFET process is enjoying dominance. Reportedly, due to the high demand and limited supply capacity, upstream IC design companies are beginning to report price hikes.
Seven global tech giants, including NVIDIA, AMD, Intel, Qualcomm, MediaTek, Apple, and Google, are set to gradually adopt TSMC’s 3nm process. As per the sources cited in the report from Commercial Times, Qualcomm’s Snapdragon 8 Gen 4, built using TSMC’s N3E process, has seen a price increase of 25% compared to the previous generation, potentially triggering a subsequent trend of price hikes.
Samsung was the first to commence mass production of 3nm chips using the GAA process in June 2022. However, the first-generation N3 node, SF3E, did not achieve significant success and was initially limited to cryptocurrency applications. Subsequently, the yield rate for its own Exynos 2500 chip also fell short of expectations.
Additionally, Google’s Tensor processors, which are manufactured by Samsung, still use Samsung’s 4nm process in their fourth generation. However, it is said in the report that the fifth generation will switch to TSMC’s 3nm process.
In the second half of the year, numerous AI products will be launched in the consumer market. Among the three major players in the mobile chip market, Qualcomm’s Snapdragon 8 Gen 4, MediaTek’s Dimensity 9400, and Apple’s A18 and M4 series will all be built using TSMC’s N3 family. Moreover, Google’s Tensor G5 will also compete in the market.
It is rumored that Qualcomm’s Snapdragon 8 Gen 4 has already initiated the first wave of price increases. The industry sources cited in the report claim that the procurement cost of mobile chips was already high, with last year’s flagship 8 Gen 3 costing around USD 200. This year’s flagship chip might exceed USD 250. Whether competitors will follow suit remains to be seen.
However, industry sources cited by the report also point out that the price increase is within a reasonable range. Compared to the 5nm process, the cost per wafer for the 3nm process is about 25% higher. This increase does not yet take into account overall wafer quantities and design architecture factors.
TSMC President C.C. Wei has also revealed that TSMC products are highly power-efficient and have better yield rates. When considering the cost per chip, TSMC is the most cost-effective.
Read more
(Photo credit: TSMC)
News
Starting from October, 2022, the U.S. has launched a series of export controls, targeting to limit China’s access to advanced semiconductor technologies, while tech giants including Intel, Qualcomm and NVIDIA are not allowed to ship some of their most cutting-edge chips to China. Now a new development seems to emerge, as the White House is said to consider additional restrictions on China’s access to gate-all-around (GAA) transistor technology as well as high-bandwidth memory (HBM), according to reports from Bloomberg and Tom’s hardware.
For now, the Big Three in the semiconductor industry have all announced their roadmaps regarding GAA. TSMC plans to adopt GAAFET (gate-all-around field-effect transistor) in its A16 process (2 nm), targeting for mass production in 2026. Intel aims to implement GAA in its upcoming 20A node, which may enter mass production by 2024. Samsung, on the other hand, is the only company to adopt GAA as early as in its 3nm node.
GAA transistors are crucial for pushing Moore’s Law further. By replacing the vertical fin used in FinFET transistors with a stack of horizontal sheets, the structure could further reduce leakage while increase drive current, which enables better chip performance.
Citing sources familiar with the matter, Bloomberg noted that in March, UK has imposed controls on GAAFET structures, which are typically used for chips manufactured with advanced nodes, and now the U.S. and other allies are expected to follow. The related restrictions are reportedly expected to be implemented as soon as this summer, according to the report, though further details have yet to be confirmed.
Also, it remains unclear whether the ban would restrict China’s ability to develop its own GAA chips or prevent U.S. and other international chipmakers from selling their products to Chinese firms, the report noted.
In addition to GAA, the Bloomberg report also mentioned that there have been preliminary discussions about restricting exports of high-bandwidth memory (HBM) chips. HBM chips, produced by memory giants like SK Hynix, Samsung and Micron, could enhance the performance of AI applications and are utilized by companies such as NVIDIA.
Recently, Huawei successfully mass-produced 7nm chips without using lithography technology. This development has surprised the global semiconductor market and has led to speculation that Huawei may soon also mass-produce 5nm chips. However, Zhang Ping’an, the Chief Executive Officer of Huawei Cloud Services, expressed concern earlier that China, due to US sanctions, is unable to purchase 3.5nm chip equipment.
Read more
(Photo credit: Intel)
News
According to a report on May 29th from The Korea Economic Daily, it has speculated that AMD is likely to become a customer of Samsung Electronics’ 3nm GAA process. Reportedly, during AMD CEO Lisa Su’s appearance at the 2024 ITF World, which was hosted by the Belgian microelectronics research center imec, Lisa Su revealed that AMD plans to use the 3nm GAA process for mass-producing next-generation chips.
As per the same report, Lisa Su stated that 3nm GAA transistors can enhance efficiency and performance, with improvements in packaging and interconnect technology. This will make AMD products more cost-effective and power-efficient. The report further addresses that Samsung is currently the only chip manufacturer with commercialized 3nm GAA process technology.
Samsung announced in June, 2022, that it has started initial production of its 3 nm process node applying Gate-All-Around (GAA) transistor architecture. It claims that compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.
An industry source cited by the report indicated that Su’s remarks could be interpreted as AMD planning to officially collaborate with Samsung on 3nm technology. Reports suggest that AMD is preparing to partner with Samsung, as TSMC’s 3nm production capacity has been fully booked by customers like Apple and Qualcomm.
The collaboration between the two companies could be traced back to April this year, as per a report from Korean media outlet viva100, Samsung was said to had signed a new USD 3 billion agreement with processor giant AMD to supply HBM3e 12-layer DRAM for use in the Instinct MI350 series AI chips. Reportedly, Samsung also agreed to purchase AMD GPUs in exchange for HBM products, although details regarding the specific products and quantities involved remain unclear.
Read more
(Photo credit: AMD)
News
According to a news report from UDN, despite U.S. restrictions on the exportation of technologies related to advanced semiconductor processes, China is fortifying its independent chip development capabilities.
ChangXin Memory Technologies (CXMT), a Chinese DRAM chip manufacturer, presented a paper at the 69th IEEE International Electron Devices Meeting (IEDM) in San Francisco, showcasing a Gate-All-Around (GAA) technology applicable to cutting-edge 3nm chips.
According to an article from South China Morning Post, while CXMT has not yet released sample products, the evidence of the company’s next-generation memory production has caught the attention of industry analysts. This is noteworthy because the design of such chips typically involves technology subject to U.S. export restrictions.
Frederick Chen, a memory expert at Winbond Electronics, a Taiwan-based company, said the evidence of progress by CXMT is “impressive”, as it shows that the Chinese company is not far away from state-of-the-art research and products. “It’s significant because Samsung Electronics is trying to do the same.” Chen said.
Regarding this matter, CXMT has maintained a relatively low profile. Reportedly, in a statement to the South China Morning Post on Wednesday, CXMT stated that the paper “describes fundamental research related to DRAM structure and the feasibility of 4F2 design” and “it has nothing to do with CXMT’s current production processes.” This may have implied that the conceptual design is still distant from becoming a market-ready product.
“Any accusation that CXMT is violating US sanctions or export controls is completely inaccurate,” the company’s export control experts said. “We firmly believe that the free flow of ideas that IEDM seeks to foster is essential for the industry’s innovation and development.”
At the end of this November, CXMT released China’s first LPDDR5 chip, marking the entry of Chinese manufacturers into the DDR5 competition and narrowing the technological gap with leading memory suppliers such as South Korea’s Samsung and SK Hynix.
(Photo credit: CXMT)