GAAFET


2024-08-29

[News] IC Design Leaders Scramble for 2nm Advantage as TSMC Launches September CyberShuttle

TSMC is set to offer a new round of its CyberShuttle prototyping service in September. According to sources cited in a report from Commercial Times, it’s revealed that, as per usual practice, there are two opportunities each year, in March and September, for customers to submit their projects. It is indicated that the highlight this time is expected to be the 2nm process, providing leading companies with an opportunity to gain an edge.

TSMC’s 2nm technology is progressing smoothly, with the new Hsinchu Baoshan plant on track for mass production next year. Previously, there were rumors indicating that Apple is considering adopting 2nm chips in 2025, with the iPhone 17 series potentially being among the first devices to use them.

Reportedly, both TSMC’s N2P and A16 technologies are expected to enter mass production in the second half of 2026, offering improvements in power efficiency and chip density.

ASIC companies are eagerly participating in CyberShuttle this time, even though customer intentions for the first 2nm tape-out are still unconfirmed. However, this technology will likely maintain TSMC’s leadership in advanced processes, securing its future technological advantage.

CyberShuttle, also known as MPW (Multi-Project Wafer), refers to the process of placing chips from different customers onto the same test wafer. This approach not only allows for the shared cost of photomasks but also enables rapid chip prototyping and verification, enhancing customers’ cost efficiency and operational effectiveness.

Based on TSMC’s official information, the CyberShuttle prototyping service significantly reduces NRE costs by covering the widest technology range (from 0.5um to 7nm) and the most frequent launch schedule (up to 10 shuttles per month), all through the Foundry segment’s most convenient on-line registration system.)

TSMC’s CyberShuttle prototyping service also validate the sub-circuit functionality and process compatibility of IP, standard cell libraries and I/Os, reducing prototype costs by up to 90%. TSMC states that their current CyberShuttle service covers the broadest range of technologies and can offer up to 10 shuttles per month.

TSMC’s 2nm technology is expected to make its debut in September, offering opportunities for test chips.

Per the report from Commercial Times, IC design companies have pointed out that, unlike the familiar FinFET (Fin Field-Effect Transistor) structure, the industry is transitioning to the Gate-All-Around FET (GAAFET) structure, making it crucial for the market to quickly adapt.

This also allows IC design companies to provide related products to end customers, demonstrating their 2nm design capabilities.

ASIC companies have also revealed that, based on CyberShuttle data, the number of advanced process projects below 7nm is relatively small, with mature processes still dominating.

This suggests that future competition will likely focus on a few leading companies. Those who miss the first wave of 2nm technology may fall behind their competitors by up to six months, making securing a spot on the Shuttle even more critical.

Read more

(Photo credit: TSMC)

Please note that this article cites information from Commercial Times and TSMC.

2024-06-12

[News] US Reportedly Mulls to Further Limit China’s Access to GAA Chip Technology and HBM

Starting from October, 2022, the U.S. has launched a series of export controls, targeting to limit China’s access to advanced semiconductor technologies, while tech giants including Intel, Qualcomm and NVIDIA are not allowed to ship some of their most cutting-edge chips to China. Now a new development seems to emerge, as the White House is said to consider additional restrictions on China’s access to gate-all-around (GAA) transistor technology as well as high-bandwidth memory (HBM), according to reports from Bloomberg and Tom’s hardware.

For now, the Big Three in the semiconductor industry have all announced their roadmaps regarding GAA. TSMC plans to adopt GAAFET (gate-all-around field-effect transistor) in its A16 process (2 nm), targeting for mass production in 2026. Intel aims to implement GAA in its upcoming 20A node, which may enter mass production by 2024. Samsung, on the other hand, is the only company to adopt GAA as early as in its 3nm node.

GAA transistors are crucial for pushing Moore’s Law further. By replacing the vertical fin used in FinFET transistors with a stack of horizontal sheets, the structure could further reduce leakage while increase drive current, which enables better chip performance.

Citing sources familiar with the matter, Bloomberg noted that in March, UK has imposed controls on GAAFET structures, which are typically used for chips manufactured with advanced nodes, and now the U.S. and other allies are expected to follow. The related restrictions are reportedly expected to be implemented as soon as this summer, according to the report, though further details have yet to be confirmed.

Also, it remains unclear whether the ban would restrict China’s ability to develop its own GAA chips or prevent U.S. and other international chipmakers from selling their products to Chinese firms, the report noted.

In addition to GAA, the Bloomberg report also mentioned that there have been preliminary discussions about restricting exports of high-bandwidth memory (HBM) chips. HBM chips, produced by memory giants like SK Hynix, Samsung and Micron, could enhance the performance of AI applications and are utilized by companies such as NVIDIA.

Recently, Huawei successfully mass-produced 7nm chips without using lithography technology. This development has surprised the global semiconductor market and has led to speculation that Huawei may soon also mass-produce 5nm chips. However, Zhang Ping’an, the Chief Executive Officer of Huawei Cloud Services, expressed concern earlier that China, due to US sanctions, is unable to purchase 3.5nm chip equipment.

Read more

(Photo credit: Intel)

Please note that this article cites information from Bloomberg and Tom’s Hardware.

 

2022-10-10

[Chip War] U.S. Department of Commerce Again Imposes Restrictions on China, Expanding Scope of Sanctions from Logic ICs to Memory Sector, Says TrendForce

The U.S. Department of Commerce announced new semiconductor restrictions on October 7 in the United States. In addition to existing restrictions on the logic IC sector, this new update extends to the memory category. In addition to Chinese-funded enterprises, the extent of these restrictions stipulate foreign-owned production centers located in China will also need to apply for approval on a case-by-case basis in order to continue to obtain manufacturing-related equipment. In addition, the new restrictions increase the difficulty for China to obtain any chips that may be used for military purposes through imports.

According to TrendForce research, the scope of this update is primarily limited to 16nm, 14nm, or more advanced proceses for logic ICs (such as FinFET or GAAFET), 18nm or more advanced processes for DRAM, and 128-layer or higher products for NAND Flash chips.

Analysis of impact on foundry industry

In terms of foundry equipment supply, after SMIC was included on the Entity List in 2020, according to TrendForce investigations, the US Department of Commerce targeted US equipment manufacturers who wished to export equipment used for processes below 16nm (inclusive) to Chinese fabs not included on the Entity List including HuaHong Group, etc., and even foreign-owned production centers located in China, instituting a review before export can be implemented. Therefore, most Chinese fabs are currently focusing their production expansions on processes 28nm and above. As for non-Chinese wafer foundries, only TSMC Nanjing is focused on 28nm expansion and has no plan for advanced processes.

TrendForce indicates, although Chinese fabs are actively partnering with domestic Chinese, European, and Japanese equipment manufacturers in an attempt to develop non-US centric production lines and have turned to the development of 28nm and above processes, the ban is completely stifling the possibility for China to develop and expand advanced processes 16nm and below and the expansion of processes 28nm and above is also subject to a protracted review process.

In addition, the US ban will expand the scope of its restrictions following the inclusion of high-end GPUs such as NVIDIA’s A100/H100 and AMD’s MI250 in the HPC sector into the range of sanctions at the end of August. In the future, it will target US manufacturers, including HPC sector CPUs, GPUs, and AI accelerators used in datacenter, AI, and supercomputer applications, requiring review before such items can be exported to China. In addition, foundries may no longer be able to manufacture any of the above-mentioned HPC-related chips for any Chinese IC design houses. TrendForce believes, regardless of whether the client is a Chinese or American IC design house, most HPC-related chips are currently manufactured by TSMC with mainstream processes at the 7nm, 5nm, or certain 12nm nodes. In the future, whether the situation is American factories no longer being able to export to the Chinese market or Chinese factories being unable to initiate projects and mass produce wafer starts, it will all have a negative impact on the future purchase order status of TSMC’s 7nm and 5nm processes.

Analysis of impact on memory industry

TrendForce indicates, according to the new specifications announced by the U.S. Department of Commerce, the DRAM portion of sanctions will be limited to the 18nm process (inclusive) and equipment must be reviewed by the Department before import. This move will greatly restrict or delay the sustainable development of China’s DRAM sector. CXMT possesses the largest memory market share for a Chinese company in the domestic Chinese market. Since 2Q22, the company has been committed to moving from the 19nm process into the 17nm process. Although the purchase of machinery to fulfill future needs had been accelerated before the ban, volume is still insufficient. CXMT continues to build new plants, including Phase 2 in Hefei and SMBC (SMIC Jingcheng), which is in discussion with SMIC. All of these projects will face difficulties in obtaining equipment in the future.

In addition to CXMT, the C2 plant of SK hynix’s DRAM production center in Wuxi is also affected by the restriction order. The factory accounts for approximately 13% of the world’s total DRAM production capacity and its process has evolved to 1Ynm and more advanced nodes, which means that subsequent continuous addition of equipment required for production requires approval on a case-by-case basis.

TrendForce has also observed, considering geopolitics, although current market demand is sluggish and supply and demand are seriously imbalanced, the three major manufacturers in the DRAM market still plan to increase production capacity in their home countries in the next 10 years and continue to reduce the proportion of production in China.

In terms of NAND Flash, TrendForce indicates that the import of NAND production equipment into China will be further restricted in the future, especially for equipment used in the manufacture of product of 128 layers and above (inclusive), requiring prior approval before import. It is estimated that this ban will significantly impact the long-term plans of China’s YMTC to upgrade its factory campuses as well as Samsung’s Xi’an plant and Solidigm’s process migration plan in Dalian.

TrendForce indicates that this ban will restrict YMTC from further expanding its customer base. At this stage, YMTC has been aggressively sending SSD products out for verification, hoping to successfully infiltrate the supply chain of non-Chinese customers in 2023. In the future, as the impact of the ban materializes, the US government will impose stricter restrictions on the development of China’s memory industry which will greatly limit non-Chinese customers’ adoption and consideration of YMTC.

(Image credit: iStock)

  • Page 1
  • 1 page(s)
  • 3 result(s)

Get in touch with us