On August 13, Google officially released the Pixel 9 series of smartphones, featuring Google’s latest self-developed Tensor G4 processor and advanced AI function supported by Gemini AI.

Google Pixel 9 series includes three full-screen smartphones: Pixel 9, Pixel 9 Pro, and Pixel 9 Pro XL, as well as a foldable smartphone, the Pixel 9 Pro Fold.

Both Pixel 9 and Pixel 9 Pro are equipped with 6.3-inch screens, with the Pixel 9 Pro using a better LTPO screen; Pixel 9 Pro XL is fitted with a 6.8-inch screen; Pixel 9 Pro Fold’s internal screen size increased from 7.6 inches to 8 inches, and the external display screen size from 5.8 inches to 6.3 inches.

The base memory capacity of the new phones is up to 12GB, with the two Pro models and the Pixel 9 Pro Fold offering 16GB of memory.

It is learned that the Tensor G4 adopted in Google’s new phones is based on Samsung’s 4nm process (4LPP+), boasting a 3.1GHz Arm Cortex-X4 super core, three 2.6GHz Arm Cortex-A720 large cores, and four 1.92GHz Arm Cortex-A520 small cores.

Moreover, Tensor G4 is equipped with the new Samsung Exynos Modem 5400 baseband chip (Outside the processor), supporting 4G/5G, WiFi-7, Bluetooth 5.x, and satellite connectivity. The memory used is LPDDR5X, and media decoding supports formats such as H.264, H.265, VP9, and AV1.

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• [News] Google’s Tensor G5 Reportedly Manufactured with TSMC’s 3nm and InFO-POP Packaging
• [News] Google Reportedly Shifts Orders from Samsung to TSMC for Its Upcoming Tensor G5 in the Pixel 10 Series

(Photo credit: Google)

Google has accelerate its pace on the Pixel series, as the tech giant launched Google Pixel 9 on August 13th, which is two months ahead of its schedule.

Though the Tensor G4 processor in the model is manufactured with Samsung’s 4nm, according to a report citing sources by Commercial Times, Google is said to be switching to TSMC’s 3nm process with its next-generation Tensor G5, coupling with the foundry giant’s InFO-POP packaging.

Google’s Pixel 8 is said to be the first AI-centric smartphone, featuring a range of AI functionalities. Yet, Commercial Times’ report has indicated that, after years of close collaboration, Google will part ways with Samsung and have TSMC produce the Tensor G5 chip.

The chip is also said to adopt TSMC’s advanced InFO-POP packaging. Google’s move, according to the report, demonstrates its ambition to expand its leadership in software to hardware, as it eyes for the opportunities of edge AI.

Industry sources cited by the report further point out that in the fourth quarter, both Qualcomm and MediaTek will launch flagship-level chips, while Apple’s A18 will also be produced using TSMC’s N3 process.

All these developments have hinted at tech giants’ ambition on the massive potential of the edge AI market. Now, Google would be the latest competitor to join the race.

Meanwhile, though Pixel’s market share is relatively low, the Android ecosystem, with its 70% market share in smartphones and billions of users, offers significant potential. Google is said to be following a path similar to Apple’s, achieving complete integration of hardware and software to maximize this potential.

Google’s self-developed chip extends beyond mobile devices, with its TPU (Tensor Processing Unit) now in their seventh generation. Additionally, Google’s Arm-based CPUs are being developed in partnership with TSMC.

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• [News] Breaking Apple’s Monopoly – TSMC’s InFO Packaging Reportedly Adds Google Chips
• [News] TSMC Pushes for FOPLP Mass Production by 2027, Reportedly Eyeing on Innolux’s Plant

(Photo credit: Google)

According to a report from The Wall Street Journal citing sources on August 13th, it’s revealed that Chinese internet companies and telecom operators have been testing Huawei’s latest processor, the “Ascend 910C,” in recent weeks. Reportedly, Huawei has informed potential customers that this new chip is comparable to NVIDIA’s H100 GPU, which cannot be directly sold in China.

Huawei’s ability to continue advancing its chip technology is a sign of its efforts to counter U.S. sanctions. However, the report also indicated that Huawei is already experiencing production delays with its current chips. The company faces additional U.S. restrictions, limiting its access to parts for production equipment and the latest memory used in AI hardware.

The sources cited by the same report point out that, TikTok’s parent company ByteDance, search giant Baidu, and state-owned telecom operator China Mobile are in preliminary talks with Huawei to secure the Ascend 910C chip. These negotiations suggest that Huawei could secure orders for more than 70,000 chips, valued at approximately USD 2 billion.

Reportedly, Huawei aims to begin shipping the Ascend 910C in October, but the final delivery schedule might differ from the initial plan and could be subject to adjustments.

Under U.S. sanctions, customers in China are forced to purchase the H20 from NVIDIA, which is a “downgraded” version of the AI chip designed specifically for the Chinese market.

Per a previous report from South China Morning Post, it’s expected that Chinese tech giants may be considering a shift towards local AI products, which could pose a challenge to NVIDIA. Currently, China accounts for 17% of NVIDIA’s revenue in the 2024 fiscal year, making the competition in the Chinese market increasingly fierce for NVIDIA.

Compared to NVIDIA’s customers in China, NVIDIA’s U.S. customers, such as OpenAI, Amazon, and Google, will soon have access to NVIDIA’s latest Blackwell architecture chips, including new products like the GB200, which NVIDIA claims offer significantly improved performance compared to existing products.

Meanwhile,  Wall Street Journal also has cited sources, pointed out that NVIDIA is working on another China-oriented chip called B20, but the design might have trouble getting U.S. approval for China export if the regulations are further tighten.

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• [News] NVIDIA Reportedly Developing Tailored Version of the Blackwell Series for Chinese Market
• [News] U.S. Reportedly Enhancing Chip Export Restrictions to China, while NVIDIA’s H20 Might Get Banned

(Photo credit: NVIDIA)

According to a report from The Chosun Daily, major tech companies like NVIDIA are considering using Intel’s foundry services (IFS) as an alternative due to TSMC’s packaging capacity shortages. While packaging is a core competency for semiconductor foundries, Samsung, which is facing difficulties in attracting customers, will need to exert maximum effort to secure orders.

It’s highlighted by the report that the demand for AI accelerators is growing rapidly, but TSMC’s AI chip production capacity is unable to keep up.

Furthermore, per The Chosun Daily citing sources, major clients like NVIDIA and Apple have secured TSMC’s 3nm advanced process capacity, pushing order backlogs into 2026.

Therefore, major tech companies seeking alternatives are turning to Intel’s IFS. Since Intel’s Foveros is said to be comparable to TSMC’s CoWoS-S, it has made Intel’s advanced packaging a viable option to ensure supply.

TSMC and Intel offer advanced packaging services to customers under the names CoWoS and Foveros, respectively. Both CoWoS and Foveros are advanced packaging technologies that connect two or more semiconductor chips on a wafer and then place them onto a packaging substrate.

Reportedly, in addition to NVIDIA and Microsoft, Amazon and Cisco are considering outsourcing to Intel Foundry to reduce their dependence on TSMC.

The report further emphasizes that this market trend is likely to cause anxiety for Samsung, which competes with TSMC and Intel in advanced processes.

Recently, Samsung’s former clients, Google and Qualcomm, have chosen TSMC, while Intel, seen as a latecomer, is catching up by securing advanced packaging orders from major tech companies, potentially narrowing the gap with Samsung.

Kim Hak-sung, head of Hanyang Institute of Smart Semiconductor, said that packaging is a technology that critically influences customer acquisition in the AI semiconductor era, where various types of chips are interconnected.

He noted that although there may not be a substantial technical capabilities difference between Samsung Electronics and Intel, as mass production experience allows the process to stabilize and become more appealing to customers.

Kim eventually addressed that to stay competitive, Samsung needs to focus on capturing the volumes that TSMC cannot accommodate, positioning itself ahead of Intel.

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• [News] TSMC Reportedly to Raise 3nm & 5nm Prices Soon, Looking to Maintain Long-Term Profit Margins 
• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
  

(Photo credit: Samsung)

TSMC’s fan-out (InFO) packaging process will no longer be exclusively used by Apple. According to a report from Commercial Times, it’s revealed that Google’s self-developed Tensor chips for their phones will switch to TSMC’s 3nm process next year and will also start using InFO packaging.

TSMC developed InFO packaging based on FOWLP (fan-out wafer-level packaging), which gained prominence after being adopted by the A10 processor in the iPhone 7 in 2016.

TSMC indicated that the current InFO_PoP technology has advanced to its ninth generation. Last year, it successfully certified 3nm chips, achieving higher efficiency and lower power consumption for mobile devices. The InFO_PoP technology, which features a backside redistribution layer (RDL), has entered mass production this year.

According to industry sources cited by the Commercial Times, Google will shift to TSMC for the Tensor G5 chips, which will be used in the Pixel 10 series next year. These chips will not only utilize the 3nm process but will also adopt integrated fan-out packaging.

This year’s Tensor G4 chips, set to be announced soon, use Samsung’s FOPLP (fan-out panel-level packaging). Although wafer-level packaging (WLP) is generally considered to have advantages over panel-level packaging (PLP), FOWLP still prevails at this stage due to yield and cost considerations.

TSMC has also begun developing FOPLP technology. Previously, per sources cited by a report from MoneyDJ, TSMC has officially formed a team, currently in the “Pathfinding” phase, and is planning to establish a mini line with a clear goal of advancing beyond traditional methods.

Although it is not expected to mature within the next three years, major customers like NVIDIA have partnered with foundry companies to develop new materials. One of TSMC’s major clients has already provided specifications for using glass materials.

Traditionally, chip advancements have been achieved through more advanced process nodes. However, new materials could enable the integration of more transistors on a single chip, achieving the same goal of scaling.

For instance, Intel plans to use glass substrates by 2030, potentially allowing a single chip to house one trillion transistors – 50 times the number in Apple’s A17 Pro processor. This suggests that glass substrates could become a significant milestone in chip development.

Another sources cited by Commercial Times have also indicated that glass substrates are part of the medium- to long-term technological roadmap. They can address challenges in large-size, high-density interconnect substrate development.

Currently, this technology is in the early stages of research and development. Its impact on ABF (Ajinomoto Build-up Film) substrates is expected to become significant in the second half of 2027 or later.

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• [News] TSMC Pushes for FOPLP Mass Production by 2027, Reportedly Eyeing on Innolux’s Plant
• [News] TSMC Reportedly Forms a Team on FOPLP Development, with Mini Line on the Road

(Photo credit: TSMC)