South Korean memory giant SK hynix announced on July 26th that it has decided to invest about 9.4 trillion won (approximately USD 6.8 billion) in building the first fab and business facilities of the Yongin Semiconductor Cluster after the board resolution today, according to its press release.

The company plans to start the construction of the fab in March next year and complete it in May 2027, while the investment period was planned to start from August 2024 to the end of 2028, SK hynix states.

The company will produce next-generation DRAMs, including HBM, at the 1st fab prepare for production of other products in line with market demand at the time of completion.

“The Yongin Cluster will be the foundation for SK hynix’s mid- to long-term growth and a place for innovation and co-prosperity that we are creating with our partners,” said Vice President Kim Young-sik, Head of Manufacturing Technology at SK hynix. “We want to contribute to revitalizing the national economy by successfully completing the large-scale industrial complex and dramatically enhancing Korea’s semiconductor technology and ecosystem competitiveness,” according to the press release.

The Yongin Cluster, which will be built on a 4.15 million square meter site in Wonsam-myeon, Yongin, Gyeonggi Province, is currently under site preparation and infrastructure construction. SK hynix has decided to build four state-of-the-art fabs that will produce next-generation semiconductors, and a semiconductor cooperation complex with more than 50 small local companies.

After the construction of the 1st fab, the company aims to complete the remaining three fabs sequentially to grow the Yongin Cluster into a “Global AI semiconductor production base,” the press release notes.

The 9.4 trillion investment approved this time included various construction costs necessary for the initial operation of the cluster, including auxiliary facilities1, business support buildings, and welfare facilities along with the 1st fab.

In addition, SK hynix plans to build a “Mini-fab2” within the first phase to help small businesses develop, demonstrate and evaluate technologies. Through the Mini-fab, the company will provide small business partners with an environment similar to the actual production site so that they can improve the technological perfection as much as possible.

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(Photo credit: SK hynix)

Global HBM leader, South Korea’s SK hynix, announced its financial report for the last quarter on July 25, exceeding market expectations. According to a report from Economic Daily News, the company also announced a full-scale effort to boost production of high-bandwidth memory (HBM) for AI, with this year’s capital expenditure expected to surpass initial projections. Additionally, more capacity will be allocated for HBM production.

Industry sources cited by the report also indicate that for Taiwanese manufacturers, the major global memory companies are expanding their HBM production capacity by converting existing DRAM capacity to HBM. This shift will suppress the supply of DDR4 and DDR5 DRAM, positively impacting market conditions.

Previously, as per sources cited by the Economic Daily News, it’s indicated that global memory leader Samsung plans to allocate about 30% of its existing DRAM capacity to HBM production. Now, with SK hynix reportedly making similar plans, this may benefit Taiwanese DRAM-related companies like Nanya Technology and ADATA in the future.

Reportedly, Nanya Technology is said to believe that the DRAM market has significantly improved due to the production cuts by the three major memory manufacturers—Samsung, SK hynix, and Micron—in the second half of last year, combined with the strong demand for HBM driven by generative AI. This chain reaction is spreading to various types of DRAM, and the company expects to see clear operational improvements soon.

SK hynix announced yesterday that its Q2 revenue increased by 125% year-on-year to KRW 16.4 trillion (USD 11.9 billion), setting a new record. Operating profit reached KRW 5.47 trillion, the highest since Q3 2018, significantly better than the KRW 2.9 trillion loss in the same period last year. The operating margin was 33%, exceeding expectations, mainly due to a more than 250% surge in HBM sales and an overall increase in DRAM and NAND chip prices.

SK hynix plans to begin mass production of the next-generation 12-layer HBM3e chips this quarter, enhancing its competitive edge over rivals Samsung and Micron in the design and supply of advanced memory for NVIDIA’s AI accelerators. HBM3e is expected to account for about half of all HBM chip sales this year. Additionally, capital expenditure for this year is likely to exceed initial expectations.

SK hynix predicts that the overall memory market will continue to grow in the second half of the year, with DRAM and NAND chip supply becoming tighter and demand for AI servers remaining strong.

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(Photo credit: SK hynix)

Amid the wave of AI applications, the demand for high-performance memory continues to mushroom, with DRAM, represented by HBM, gaining significant traction. Meanwhile, to further meet market demand, memory manufacturers are  poised to embrace a new round of DRAM technological “revolution.”

• 4F Square DRAM being Developed Smoothly

According to a report from Korean media outlet Chosun Biz, Samsung Electronics Vice President Changsik Yoo recently announced that Samsung’s next-generation DRAM technology is progressing well. In addition to the successful mass production of 1b DRAM, the development of 4F Square DRAM technology is also proceeding smoothly, with the initial sample of 4F Square DRAM set to be developed by 2025.

Industry sources cited by WeChat account DRAMeXchange indicate that the early DRAM cell structure was 8F Square, while currently commercialized DRAM mainly uses 6F Square. Compared to these two technologies, 4F Square employs a vertical channel transistor (VCT) structure, which can reduce the chip surface area by 30%.

As the cell area decreases, DRAM density and performance increase. Therefore, driven by applications like AI, 4F Square technology is gradually sought after by major storage manufacturers.

Previously, Samsung stated that many companies are working to transition their technology to 4F Square VCT DRAM, although some challenges need to be overcome, including the development of new materials like oxide channel materials and ferroelectrics.

Industry sources believe that the initial sample of Samsung’s 4F Square DRAM in 2025 might be for internal release. Another semiconductor manufacturer, Tokyo Electron, estimates that DRAM using VCT and 4F Square technology will come out between 2027 and 2028.

Furthermore, earlier media reports mentioned that Samsung plans to apply Hybrid Bonding technology to support the production of 4F Square DRAM. Hybrid Bonding is a next-generation packaging technology referring to vertically stack chips to increase cell density and thus improve performance, which will also exert an influence on the development of HBM4 and 3D DRAM.

• HBM4 on the Horizon

In the era of AI, HBM, particularly HBM3e, has thrived in the memory market, prompting fierce competition among the three major DRAM manufacturers. A new race is now underway, primarily focusing on the next-generation HBM4 technology.

In April of this year, SK Hynix announced a partnership with TSMC to jointly develop HBM4. It is reported that the two companies will first work on performance improvements for the base die fitted at the bottom layer within the HBM package. To focus on the development of next-generation HBM4 technology, Samsung has established a new “HBM Development Team.”

In July, Choi Jang-seok, head of the New Business Planning Group in Samsung Electronics’ memory division, revealed that the company is developing a high-capacity HBM4 memory with a single stack of up to 48GB, expected to go into production next year. Recently, Samsung reportedly plans to use a 4nm advanced process to produce HBM4 logic die. Micron, on the other hand, plans to introduce HBM4 between 2025 and 2027 and transition to HBM4E by 2028.

Aside from manufacturing processes, DRAM manufacturers are actively exploring hybrid bonding technology for future HBM products. Compared to existing bonding processes, hybrid bonding eliminates the need for bumps between DRAM memory layers, instead directly connecting the upper and lower layers, copper to copper. This significantly improves signal transmission speed, better matching the high bandwidth requirements of AI computing.

In April of this year, Korean media outlet The Elec reported that Samsung successfully manufactured a 16-layer stacked HBM3 memory based on hybrid bonding technology, with the memory sample functioning normally. This 16-layer stacked hybrid bonding technology will be used to produce HBM4 at scale in the future. SK Hynix plans to adopt hybrid bonding in its HBM production by 2026. Micron is also developing HBM4 and is considering related technologies, including hybrid bonding, which are all under research at present.

• The Development of 3D DRAM Picks up Steam

3D DRAM (Three-dimensional dynamic random-access memory) represents a new DRAM technology with a novel memory cell structure. Unlike traditional DRAM, which places memory cells horizontally, 3D DRAM vertically stacks memory cells, greatly increasing storage capacity per unit area and improving efficiency. This makes it a key development for the next generation of DRAM.

In the memory market, 3D NAND Flash has already achieved commercial application, while 3D DRAM technology is still under research and development. However, as AI, big data, and other applications enjoy burgeoning growth, the demand for high-capacity, high-performance memory will surge, and 3D DRAM is expected to become a mainstream product in the memory market.

HBM technology has paved the way for the 3D evolution of DRAM, enabling DRAM to transition from traditional 2D to 3D. However, current HBM cannot be considered as true 3D DRAM technology. Samsung’s 4F Square VCT DRAM is closer to the concept of 3D DRAM, but it is not the only direction or goal for 3D DRAM. Memory manufacturers have more ideas and creativity in 3D DRAM.

Samsung plans to achieve the commercialization of 3D DRAM by 2030. In 2024, Samsung showcased two 3D DRAM technologies, including VCT and stacked DRAM. Samsung first introduced VCT technology, then upgraded to stacked DRAM by stacking multiple VCTs together to continuously improve DRAM capacity and performance.

Samsung states that stacked DRAM can fully utilize the Z-axis space, accommodating more memory cells in a smaller area, with a single chip capacity exceeding 100Gb. In May of this year, Samsung noted that it, along with other companies, successfully manufactured 16-layer 3D DRAM, but emphasized that it is not ready for mass production. 3D DRAM is expected to be produced using wafer-to-wafer hybrid bonding technology, and BSPDN (Backside Power Delivery Network) technology is also considered.

Regarding Micron, industry sources cited by DRAMeXchange reveal that Micron has filed for a 3D DRAM patent application different from Samsung’s, aiming to alter the shape of transistors and capacitors without placing cells.

BusinessKorea reported in June that SK Hynix achieved a manufacturing yield of 56.1% for its 5-layer stacked 3D DRAM. This means that out of around 1000 3D DRAMs produced on a single test wafer, about 561 viable devices were manufactured. The experimental 3D DRAM demonstrated characteristics similar to the currently used 2D DRAM, marking the first time SK Hynix disclosed specific numbers and features of its 3D DRAM development.

Besides, American company NEO Semiconductor is also engaging in the development of 3D DRAM. Last year, NEO Semiconductor announced the launch of the world’s first 3D DRAM prototype: 3D X-DRAM. This technology resembles 3D NAND Flash, namely increasing memory capacity by stacking layers, offering high yield, low cost, and remarkably high density.

NEO Semiconductor plans to launch the first generation of 3D X-DRAM in 2025, featuring a 230-layer stack and a core capacity of 128Gb, which is several times higher than the 16Gb capacity of 2D DRAM.

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(Photo credit: SK Hynix)

As Samsung eagerly accelerates its pace on the HBM3e certification with NVIDIA, SK hynix, the current HBM market leader, is reportedly planning another move to strengthen its relationship with the AI giant. According to a report by Korean media Money Today, SK hynix is teaming up with Amkor Technology to target the silicon interposer market, eyeing to become a supplier for NVIDIA.

Citing sources from the semiconductor industry, the report notes that SK hynix has discussed with Amkor, the world’s second-largest OSAT (Outsourced Semiconductor Assembly and Test) company, about sending interposer samples. The process involves SK hynix sending its HBM and interposers to Amkor, which then combines them with GPUs from customers like NVIDIA to assemble AI accelerators.

A silicon interposer is a substrate on which GPUs and HBM are arranged and connected with the 2.5D/3D packaging. According to the report, drawing circuits on silicon to connect chips allows for more precise circuitry compared to using PCBs (Printed Circuit Boards) in traditional 2D packaging, which makes silicon interposers essential for packaging AI accelerators like NVIDIA’s A100 and H100.

Regarding the rumor, citing a SK hynix representative, the report states that the discussion is still in the early stages, while the company is conducting various reviews to provide interposers that meet customer demands.

It is worth noting that the entry barrier for silicon interposers seems to be high, as only a few semiconductor giants, including TSMC, UMC and Samsung, can supply silicon interposers with their own packaging technologies, such as TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) technology and Samsung’s I-Cube.

As Samsung is currently providing NVIDIA with its silicon interposers and I-Cube packaging services, SK hynix tries to further expand its leadership in HBM by entering the silicon interposer sector, the report notes, which may also alleviate the supply shortage for HBM and interposers as NVIDIA’s AI accelerators are in high demand.

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(Photo credit: SK hynix)

As Samsung actively expands its high-bandwidth memory (HBM) capabilities, it is also striving to enhance the penetration rate of its existing memory products in mobile devices such as smartphones. On July 16, Samsung announced that it has completed verification of its latest LPDDR5X DRAM, which can be paired with MediaTek’s next-generation smartphone chips.

Since MediaTek has yet to release its next-generation 5G flagship chip, the Dimensity 9400, Samsung’s announcement has drawn greater attention to the upcoming release date of the Dimensity 9400.

Samsung’s LPDDR5X DRAM boasts a 25% performance improvement over the previous generation, with increased execution speed, and will be compatible with the Dimensity 9400 chip set to be released in the fourth quarter. Industry sources cited by Economic Daily News further note that this means smartphone brands that choose the Dimensity 9400 as their main chip can also opt for Samsung’s LPDDR5X DRAM as the mobile memory solution for their new devices.

Samsung’s latest LPDDR5X DRAM claims to extend the battery life of mobile devices and enhance the speed of AI functions within the device, such as voice-to-text generation, without the need for server or cloud access.

According per another report by the Korea Economic Daily, JC Hsu, General Manager of MediaTek’s Wireless Communication Business Unit, stated that Samsung’s LPDDR5X DRAM, with an execution speed of up to 10.7 Gbps, will leverage more AI capabilities and performance of MediaTek’s upcoming products.

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(Photo credit: Samsung)