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According to a report by Yonhap News Agency, data released by Korea’s Ministry of Science and information and communication technology ICT on July 15 shows that in the first half of this year, Korea’s ICT industry exports grew by 28.2% YoY to USD 108.85 billion, setting the second-highest record for the same period in history.
Fueled by demands in the AI, IT information technology, and telecommunications equipment markets, semiconductor exports, one of Korea’s main export products, surged by 49.9% YoY, reaching USD 65.83 billion.
On a market segment basis, Korea’s memory exports in the first half of the year saw a hike of 88.7% YoY, driven by increased exports of products like high bandwidth memory (HBM).
Due to increased investment in server and data center as well as increased demand for personal computer and other devices, exports of computers and peripheral devices rose by 35.6% YoY; instead, mobile phone exports decreased by 2.8% YoY to USD 5.58 billion.
In June, ICT exports grew by 31.1% YoY, reaching USD 21.05 billion, the highest value for the same month in history. Semiconductor exports were USD 13.44 billion, also setting a record high for the same month. Notably, memory chip exports soared by 85.2% YoY, reaching USD 8.83 billion.
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As per a report from Korea Economic Daily citing unnamed sources on July 15th, Samsung Electronics is preparing to mass-produce the logic die for HBM4 using its advanced 4nm process.
The logic die, situated at the bottom of the chip stack, is a core component of HBM. Memory manufacturers are already capable of producing logic dies for existing products like HBM3e. However, regarding HBM4, the sixth-generation model, with its custom features demanded by customers, requires additional wafer processing steps.
Reportedly, Samsung’s 4nm process, which boasts is said boasting a yield rate exceeding 70%, is one of their flagship technologies. This advanced process is also used in producing the Exynos 2400 processor for their flagship AI smartphone, the Galaxy S24.
An industry source cited by the report further stated that the 4nm process is much costlier than the 7nm and 8nm but significantly better in terms of chip performance and power consumption. Reportedly, Samsung, which manufactures HBM3e with the 10nm process, is looking to take the throne in the HBM sector by applying the 4nm process.
On the other hand, SK Hynix announced its collaboration with TSMC in April 2024. In a statement released on April 19th, SK Hynix stated that the two semiconductor giants will collaborate on developing the 6th generation HBM4 chips, with production scheduled for 2026.
The same report from the Korean Economic Daily also addressed that, Samsung has reportedly deployed employees from its System LSI division to the newly established HBM research team. In response to Samsung’s actions, SK Hynix and TSMC have decided to add the 5nm process in addition to the originally planned 12nm process for producing the logic die of HBM4.
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Though Samsung has denied the rumor that its HBM3e passed NVIDIA’s qualification tests, multiple Taiwanese companies in the supply chain reportedly learned that the product is expected to receive certification soon, and will start shipping in Q3. As memory manufacturers are said to shift at least 20-30% of their production capacity to HBM, tightening supply further, DDR5 prices in Q3 will reportedly be on the rise.
It is reported that some of Samsung’s supply chain partners have recently received information to place orders and reserve capacity as soon as possible, which indicates the memory giant’s HBM may begin shipments smoothly in the second half of the year. The move may also imply that the internal capacity allocation within Samsung will accelerate, shifting the focus of production lines to HBM.
Taiwanese memory supply chain sources reportedly believe that the news of Samsung’s HBM certification is likely to be confirmed at the upcoming Samsung financial report meeting, which will take place on July 31. It is said that memory manufacturers will relocate at least 20-30% of their production capacity, driving DDR5 prices to rise.
TrendForce notes that a recovery in demand for general servers—coupled with an increased production share of HBM by DRAM suppliers—has led suppliers to maintain their stance on hiking prices. As a result, the ASP of DRAM in Q3 is expected to continue rising, with an anticipated increase of 8–13%. Due to high average inventory levels of DDR4 among buyers, purchasing momentum will be focused on DDR5.
On the other hand, regarding NAND prices in Q3, TrendForce reports that while the enterprise sector continues to invest in server infrastructure, the consumer electronics market remains lackluster. This, combined with NAND suppliers aggressively ramping up production in the second half of the year, is likely to curb the blended price hike to a modest 5–10%.
According to TrendForce’s latest analysis, Samsung’s initial plan to pass NVIDIA’s certification in Q2 was delayed, making it falling behind SK hynix and Micron. Simultaneously, some HBM suppliers also faced lower-than-expected production yields, leading to concerns about a shortage of HBM3e 8hi materials for the H200 GPU shipments starting in Q2 2024.
However, Samsung adjusted its 1alpha nm front-end production process and back-end stacking process in the first half of 2024, leading the industry to expect that sample production could be completed in Q3 2024, followed by product certification.
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While still working in the final stage of HBM3e qualification with NVIDIA, Samsung Electronics is also advancing in the AI memory market with custom high bandwidth memory (HBM) solutions. According to reports by PassionateGeekz and China Flash Market, the memory giant is collaborating with major clients, such as AMD and Apple, to develop tailored HBM products, which are expected to be commercially available in the era of HBM4.
Citing Choi Jang-seok, head of Samsung’s new business planning team at memory division, the reports note that many customers of Samsung are switching from traditional, general HBM to customized products, as the latter promises better performance, power and area (PPA), while offering greater value than current options.
PassionateGeekz notes that at the Samsung Foundry Forum 2024 earlier this week, Choi further highlighted two forms of customized HBM Samsung has been developing. It is worth noting that Samsung is developing a large-capacity HBM4 memory with a single stack capacity of 48GB, which is expected to enter production in 2025.
On the other hand, Samsung also illustrated the innovation of the 3D stacking of HBM DRAM and customer-specific logic chips. By bypassing the interposer and base die required in the existing 2.5D packaging solution, the HBM chip can be directly integrated into the computing SoC in 3D. Samsung’s custom HBM, therefore, by eliminating intermediaries and substrates, can significantly reduce power and area.
TrendForce also observed that for HBM4, standard processes and capacities have been settled. The three major suppliers are in the development stage, with each buyer initiating custom requests. For future generations of HBM, new directions have been proposed, as HBM may no longer be just arranged next to the SoC main chip but could also stack directly on top of it.
While all the options are still under feasibility discussion and not finalized, TrendForce believes the future HBM industry will shift towards more customized production. Compared to other DRAM products, this approach aims to break away from the framework of commodity DRAM in terms of pricing and design, offering more specialized solutions.
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According to a report from BusinessKorea, memory giant SK hynix is deepening its collaboration with TSMC and NVIDIA, and will announce a closer partnership at the Semicon Taiwan exhibition in September.
SK hynix has been collaborating with TSMC for many years. In 2022, TSMC announced the establishment of the OIP 3DFabric Alliance at its North America Technology Symposium, incorporating partners in memory and packaging.
At that time, Kangwook Lee, Senior Vice President and PKG Development Lead at SK hynix, revealed that the company has been closely working with TSMC on previous generations and current high-bandwidth memory (HBM) technologies, supporting compatibility with the CoWoS process and HBM interconnectivity.
After joining the 3DFabric Alliance, SK hynix reportedly plans to deepen its collaboration with TSMC to develop solutions for the next generation of HBM, looking to achieve innovations in system-level products.
SK hynix President, Justin Kim, is reportedly said to be delivering a keynote speech at the International Semiconductor Exhibition in Taipei in September, marking SK hynix’s first participation in such a keynote address. Following the speech, Kim will engage in discussions with senior executives from TSMC, possibly including NVIDIA CEO Jensen Huang, to discuss collaborative plans for the next generation of HBM. This move is expected to further solidify the trilateral alliance between SK hynix, TSMC, and NVIDIA.
Notably, the collaboration among the three giants was hinted in the first half of this year. On April 25th, SK Group Chairman Chey Tae-won traveled to Silicon Valley to meet with NVIDIA CEO Jensen Huang, potentially related to these strategies.
Reportedly, SK hynix will adopt TSMC’s logic process to manufacture the base die for HBM (High Bandwidth Memory). Reports indicate that SK hynix and TSMC have agreed to collaborate on the development and production of HBM4, scheduled for mass production in 2026.
HBM stacks core chips vertically on the base die, which are interconnected. While SK hynix currently produces HBM3e using its own process for the base die, it will switch to TSMC’s advanced logic process for HBM4. The same report further suggested that SK hynix will highlight achievements at forums, including achieving more than a 20% reduction in power consumption compared to initial targets for HBM4.
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(Photo credit: SK hynix)