According to a report from UDN, TSMC held a groundbreaking ceremony yesterday for its Dresden, Germany plant, offering a significant boost to the EU’s efforts to stabilize its chip supply.

TSMC Chairman C.C. Wei led a team of top executives at the event, joined by key officials including German Chancellor Olaf Scholz. European Commission President Ursula von der Leyen also attended, bringing with her the announcement that the EU has approved a EUR 5 billion subsidy for the Dresden plant.

TSMC announced last August that it would partner with Bosch, Infineon, and NXP Semiconductors to establish the European Semiconductor Manufacturing Company (ESMC) in Germany.

The joint venture will construct a 12-inch wafer plant, with TSMC holding a 70% stake, while Bosch, Infineon, and NXP each hold 10%. Construction is planned to start in the second half of this year, with mass production expected by the end of 2027.

The planned fab is expected to have a monthly production capacity of 40,000 12-inch wafers on TSMC’s 28/22 nanometer planar CMOS and 16/12 nanometer FinFET process technology.  TSMC will be responsible for the plant’s operations.

Following the U.S.-China tech war, the EU passed the “Chips Act” to fully support the development of the semiconductor industry, attracting key investments from companies such as TSMC, Intel, Belgium’s IMEC, GlobalFoundries, and GlobalWafers, all of which sought subsidies for their new European operations.

TSMC’s joint venture proposal, exceeding EUR 10 billion, stands as the largest global direct investment in Saxony’s history.

When C.C. Wei took the stage, he began by thanking the German government. He revealed that when he first met with the German Chancellor, he had prepared a polite speech to decline the offer of building a plant in Germany.

However, when the Chancellor mentioned that a budget had already been reserved for TSMC, Wei eventually found himself agreeing to the project.

C.C. Wei further highlighted that TSMC’s total investment in the German plant exceeds EUR 10 billion and is expected to create around 2,000 jobs.

He explained that the decision to locate the plant in Dresden was due to its proximity to TSMC’s customers and access to a large pool of talented individuals. Wei also pledged to continue recruiting and nurturing talent in the region, with the goal of making ESMC the most important semiconductor manufacturing hub in Europe.

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(Photo credit: TSMC)

As semiconductor giants, starting with Intel and TSMC, have been bringing in ASML’s High-NA EUV (high-numerical aperture extreme ultraviolet) equipment to accelerate the development in advanced nodes, the elite group has now reportedly been added two new members: Samsung and SK hynix.

According to the reports by Korean media outlet Sedaily and ZDNet, Samsung Electronics’ semiconductor (DS) division is said to bring in High-NA EUV equipment as early as the end of 2024. SK hynix’s High-NA equipment, which is expected to be applied to the mass production of advanced DRAM, will reportedly be introduced in 2026.

Samsung to Introduce First High-NA EUV Machine as soon as Year-End, Eyeing Full Commercialization by 2027

Sedaily, citing industry sources on August 13^th, notes that Samsung is expected to begin bringing in its first High-NA EUV equipment, ASML’s EXE:5000, between the end of this year and the first quarter of next year. It is worth noting that Samsung’s first High-NA EUV equipment is likely to be used for foundry operations, the report reveals.

Among the semiconductor heavyweights which have been advancing in the foundry business, Intel is the first to order new High-NA EUV machines from ASML. In May, Intel was said to have secured its first batch of the new High-NA EUV lithography equipment from ASML, which the company will allegedly use on its 18A (1.8nm) and 14A (1.4nm) nodes.

TSMC, on the other hand, is more concerned on the new machine’s expensiveness, as it might be priced at as much as EUR 350 million (roughly USD 380 million) per unit, according to a previous report by Bloomberg. However, the report, citing ASML’s spokesperson, confirmed that the Dutch chip equipment giant will ship High-NA EUV equipment to TSMC by the end of this year.

Now, following its two major rivals in the foundry sector, Samsung, by introducing High-NA EUV equipment as soon as year-end, aims to boost its competitive edge in the advanced nodes.

As the installation process is quite time-consuming, Samsung aims for the full commercialization of High-NA by 2027, supported by its efforts to build the related ecosystem, the report says.

According to the report, Samsung is working with electronic design automation (EDA) companies to design new types of masks, including curved (curvilinear) circuits for High-NA EUV that improve the sharpness of the printed circuits on wafers. This collaboration includes companies like Synopsys, a global leader in semiconductor EDA tools.

SK hynix’s High-NA EUV Reportedly to be Applied to 0a DRAM Production

According to the report by Sedaily, ASML has produced eight EXE:5000 High-NA EUV units currently, as Intel has the lion’s share by securing multiple units. Samsung is said to be the last customer to place the order for ASML’s first batch of units.

On the other hand, SK hynix, Samsung’s major rival in the memory sector, is reported to bring in ASML’s next generation of High-NA EUV machine, the EXE:5200, in 2026, ZDNet suggests.

Citing industry sources on August 16th, ZDNet notes that the HBM giant has been expanding the personnel dedicated to High-NA EUV development within the company.

Although specific plans, such as the fab where the equipment will be installed or the direction of additional investment, have not been disclosed, it is expected that the technology could be applied to mass production in 0a (single-digit nanometer) DRAM as early as possible, the report indicates.

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(Photo credit: ASML)

NEO Semiconductor, a company focused on 3D DRAM and 3D NAND memory, has unveiled its latest 3D X-AI chip technology, which could potentially replace the existing HBM used in AI GPU accelerators.

Reportedly, this 3D DRAM comes with built-in AI processing capabilities, enabling processing and generation without the need for mathematical output. When large amounts of data are transferred between memory and processors, it can reduce data bus issues, thereby enhancing AI performance and reducing power consumption.

The 3D X-AI chip has a underlying neuron circuit layer that can process data stored in 300 memory layers on the same chip. NEO Semiconductor states that with 8,000 neutron circuits performing AI processing in memory, the 3D memory performance can be increased by 100 times, with memory density 8 times higher than current HBM. By reducing the amount of data processed in the GPU, power consumption can be reduced by 99%.

A single 3D X-AI die contains 300 layers of 3D DRAM cells and one layer of neural circuits with 8,000 neurons. It also has a capacity of 128GB, with each chip supporting up to 10 TB/s of AI processing capability. Using 12 3D X-AI dies stacked with HBM packaging can achieve 120 TB/s processing throughput. Thus, NEO estimates that this configuration may eventually result in a 100-fold performance increase.

Source: NEO Semiconductor

Andy Hsu, Founder & CEO of NEO Semiconductor, noted that current AI chips waste significant amounts of performance and power due to architectural and technological inefficiencies. The existing AI chip architecture stores data in HBM and relies on a GPU for all calculations.

He further claimed that the separation of data storage and processing architecture has made the data bus an unavoidable performance bottleneck, leading to limited performance and high power consumption during large data transfers.

The 3D X-AI, as per Hsu, can perform AI processing within each HBM chip, which may drastically reduce the data transferred between HBM and the GPU, thus significantly improving performance and reducing power consumption.

Many companies are researching technologies to increase processing speed and communication throughput. As semiconductor speeds and efficiencies continue to rise, the data bus transferring information between components will become a bottleneck. Therefore, such technologies will enable all components to accelerate together.

Source: NEO Semiconductor

As per a report from tom’s hardware, companies like TSMC, Intel, and Innolux are already exploring optical technologies, looking for faster communications within the motherboard. By shifting some AI processing from the GPU to the HBM, NEO Semiconductor may reduce the workload and potentially achieve better efficiency than current power-hungry AI accelerators.

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(Photo credit: NEO Semiconductor)

After the disappointing financial performance in Q2, Intel has been plagued by a series of challenges. Its shares plunged, falling to the lowest point in over a decade, coupling with the suspension of dividend payouts, layoffs, and product failures. The company may be facing its worst moment in 50 years, and now, the market seems to lose patience with the once-dominant semiconductor giant.

Even Pat Gelsinger, who took over as CEO in 2021 with his technical expertise, has yet been able to rescue this struggling mammoth.

Over the past 50 years, Intel has witnessed eight CEOs, as each of them has left indelible marks in history. Some of their decisions have made Intel so sluggish that it is difficult to turn around.

The latest report by Technews looks back at Intel’s past and summarizes its former CEOs’ impact, examining how the tech giant’s development trajectory is closely intertwined with that of semiconductors.

What happened before Intel’s Foundation?

Let’s go back to 1956, when William Shockley, known as the ‘Father of the Transistor,’ left Bell Labs to establish the Shockley Semiconductor Laboratory.

However, Shockley’s authoritarian management style, as well as his erratic behavior, led to the dissatisfaction of employees. Eight employees, called by Shockley as the “Traitorous Eight,” resigned in 1957 to found Fairchild Semiconductor.

Fairchild, though developed rapidly, faced organizational management issues as well. In July 1968, two of its founders, Robert Noyce and Gordon Moore, resigned to found Integrated Electronics, later known as Intel, on July 18th of the same year. Andy Grove joined as the third employee afterwards.

They are regarded as Intel’s founders who formed a management triad. Noyce was in charge of research and development. Moore, on the other hand, was in charge of business execution, while Grove responsible for commercialization and management. The Big Three had led Intel through its first 30 years, establishing the glorious era from 1968 to 1998.

(Left to right:  Gordon Moore, Robert Noyce and Andy Grove)

First CEO: Robert Noyce (1968–1975)

During Noyce’s reign, Intel introduced the first microprocessor in 1971, which marked the beginning of the personal computer (PC) era and the start of Silicon Valley’s golden age. The breakthrough has earned Noyce the nickname of “Mayor of Silicon Valley” or “Father of Silicon Valley.”

It’s worth noting that Noyce and Texas Instruments engineer Jack Kilby were both pioneers of the integrated circuit (IC). Kilby developed the world’s first integrated circuit at Texas Instruments in 1958, earning him the title of “Father of the IC.” The following year, Noyce conceived the concept of the first planar IC with a metal interconnection method in his notebook, laying the foundation for all modern IC technologies.

Second CEO: Gordon Moore (1975–1987)

The famous “Moore’s Law” was proposed by Moore in 1965. However, the concept was somewhat speculative, as the development of integrated circuit was still in its early stages.

Moore’s prediction was aimed to convey the idea that electronic products would become increasingly affordable, and surprisingly, it came true. Considering the exponential growth in IC complexity, Moore revised his forecast in 1975, stating that the number of transistors on an IC would double approximately every two years. The law has established the foundation for the semiconductor industry. Even how, it is still a hot topic today among semiconductor giants such as TSMC, Intel and NVIDIA.

Third CEO: Andrew Grove (1987–1998)

To follow his superior Moore, Grove left Fairchild to become Intel’s third employee, and took up the management duties after Noyce and Moore.

In the 1970s, Intel’s main products were DRAM and SRAM. As Japanese companies began to flood the global market with DRAM, the profit of the product line quickly declined. Therefore, Grove decided to discontinue DRAM-related products and focus on integrated circuit applications instead.

The decision helped Intel to seize the vast opportunities of the PC era.

Additionally, one of the critical decisions during his tenure was to manufacture its 386 processor independently, which successfully showcased Intel’s capability to manufacture its own processors, establishing its undisputed leading position in the early 1990s.

When Intel was founded, its annual revenue was only USD 2,672. By 1997, thirty years later, its annual revenue had grown to USD 20.8 billion. Grove played a crucial role in the success and was named by Time magazine as Person of the Year in 1997. He also documented his management philosophy in his book, with the famously saying, “Only the Paranoid Survive.”

Fourth CEO: Craig Barrett (1998–2005)

Craig Barrett was an associate professor of Materials Science and Engineering at Stanford University before joining Intel. Upon taking office, his primary challenge was determining whether Intel could become a company that could handle “low margins.”

At that time, the market believed the high-profit era of the semiconductor industry was over, and that the future of PCs would be dominated by low-cost models. Therefore, he led Intel through two major transformations.

The first transformation was the segmentation of Intel’s processor products. Due to the company’s rapid transformation, the competitors are difficult to follow, making them unable to disrupt Intel’s position in the low-cost market. The second, on the other hand, was the expansion from computer/ computing into network servers.

Barrett also believed that Intel’s competitiveness lied in manufacturing and R&D, so he invested USD 28 billion in building advanced facilities and developing new technologies, which secured Intel’s leadership in manufacturing technology.

Fifth CEO: Paul Otellini (2005–2013)

Under Otellini’s leadership, Intel underwent another significant shift. As the first CEO in Intel’s history without an engineering background, Otellini only held an MBA degree.

During his tenure, Intel’s financial performance was excellent, but the company’s focus had been moved from technology to performance-oriented, which prioritized sales and marketing over technological advancements. This shift set the tone for Intel’s later decline.

In 2005, Intel secured an order from Apple, which would adopt Intel’s chips in Macs. However, when Apple inquired if Intel would supply processors for iPhones, Otellini declined the request as he believed the deal was not cost-effective. This decision caused Intel to miss out on the booming mobile device market following iPhone’s 2007 launch.

Rather than focusing selling chips individually, Otellini believed Intel’s platform had greater value, which helped Intel secure its share in the x86 market. However, the company’s technological advantage began to wane. Moreover, due to the global economic downturn, Intel closed five factories, including its last plant in Silicon Valley.

Sixth CEO: Brian Krzanich (2013–2018)

With the decline in the PC market, the new CEO Brian Krzanich, responsible for technology and administration, faced the critical task of transformation once again. In his tenure, Intel shifted its focus towards the Internet of Things (IoT) and cloud computing.

However, as Krzanich did not believe in the economic scalability of EUV, he opted to forgo ASML’s first-generation EUV equipment. As a result, Intel’s 10nm progress faced multiple delays, causing it to fall behind competitors like TSMC and Samsung in advanced nodes, and even led to a loss of market share to rival AMD.

Seventh CEO: Robert (Bob) Swan (2019–2021)

Intel was plagued with many issues, such as the problems with the 10nm process, which were difficult to overcome. During Swan’s tenure, Intel’s dominance in the market has gradually declined. In some sectors, AMD even caught up and overtook Intel’s throne.

At the same time, instead of using Intel’s chips, Apple introduced its self-designed M1 processors, which might become the final straw to Intel’s dominance.

Additionally, Intel had discussions with OpenAI about investment opportunities in 2017–2018, but Bob Swan believed that generative AI models would be challenging to commercialize in the short term and considered the deal to be unprofitable, thus giving up the opportunity to participate in the AI boom.

Eighth CEO: Pat Gelsinger (2021–)

As the three former CEOs all came from operations or finance backgrounds, Pat Gelsinger, with his technical background, was expected to bring a fresh outlook to Intel.

Given the challenge ahead, he planned to significantly expand Intel’s factories and announced the “Four Nodes in Five Years” plan, aiming to advance five nodes within four years, betting Intel’s future on the 18A process.

However, before the 18A technology was introduced, Intel has already been plagued by layoffs, suspension of dividends, and a stock price nearing tangible book value. Whether Gelsinger is the savior to lead Intel out of the woods remains to be seen. Only time will tell.

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(Photo credit: Intel)

According to a report from the Financial Times, SoftBank Group has decided to move away from its plan to collaborate with Intel on producing AI chips to compete with NVIDIA and is now reportedly focusing on discussions with TSMC.

The same report, citing sources, reported that the partnership between SoftBank and Intel fell through because Intel struggled to meet SoftBank’s requirements. SoftBank reportedly attributed the collapsed talk to Intel’s inability to meet their demands for production volume and speed.

The report noted as well that this fallout occurred before Intel’s announcement of releasing its official announcement on its Q2 (April-June) earnings in early August. Notably, in response to a significant drop in its performance, Intel planned to lay off about 15,000 employees and suspend shareholder dividends.

Moreover, the report further cited rumors claiming that SoftBank has shifted its focus to discussions with TSMC; however, no agreement has been reached so far.

Reportedly, Intel, SoftBank and TSMC have all declined to comment on the situation.

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(Photo credit: Intel)