News
Starting from October, 2022, the U.S. has launched a series of export controls, targeting to limit China’s access to advanced semiconductor technologies, while tech giants including Intel, Qualcomm and NVIDIA are not allowed to ship some of their most cutting-edge chips to China. Now a new development seems to emerge, as the White House is said to consider additional restrictions on China’s access to gate-all-around (GAA) transistor technology as well as high-bandwidth memory (HBM), according to reports from Bloomberg and Tom’s hardware.
For now, the Big Three in the semiconductor industry have all announced their roadmaps regarding GAA. TSMC plans to adopt GAAFET (gate-all-around field-effect transistor) in its A16 process (2 nm), targeting for mass production in 2026. Intel aims to implement GAA in its upcoming 20A node, which may enter mass production by 2024. Samsung, on the other hand, is the only company to adopt GAA as early as in its 3nm node.
GAA transistors are crucial for pushing Moore’s Law further. By replacing the vertical fin used in FinFET transistors with a stack of horizontal sheets, the structure could further reduce leakage while increase drive current, which enables better chip performance.
Citing sources familiar with the matter, Bloomberg noted that in March, UK has imposed controls on GAAFET structures, which are typically used for chips manufactured with advanced nodes, and now the U.S. and other allies are expected to follow. The related restrictions are reportedly expected to be implemented as soon as this summer, according to the report, though further details have yet to be confirmed.
Also, it remains unclear whether the ban would restrict China’s ability to develop its own GAA chips or prevent U.S. and other international chipmakers from selling their products to Chinese firms, the report noted.
In addition to GAA, the Bloomberg report also mentioned that there have been preliminary discussions about restricting exports of high-bandwidth memory (HBM) chips. HBM chips, produced by memory giants like SK Hynix, Samsung and Micron, could enhance the performance of AI applications and are utilized by companies such as NVIDIA.
Recently, Huawei successfully mass-produced 7nm chips without using lithography technology. This development has surprised the global semiconductor market and has led to speculation that Huawei may soon also mass-produce 5nm chips. However, Zhang Ping’an, the Chief Executive Officer of Huawei Cloud Services, expressed concern earlier that China, due to US sanctions, is unable to purchase 3.5nm chip equipment.
Read more
(Photo credit: Intel)
News
Converting LCD panel factories into semiconductor bases seems to emerge as one of the latest trends in the semiconductor industry. According to a report by Nikkei News, Intel plans to utilize Sharp’s LCD panel factory in Japan, and collaborate with Japanese companies to develop semiconductor production technology.
Intel will reportedly collaborate with 14 Japanese suppliers, including Omron, Resonac, and Murata Machinery, to develop “backend process” technologies responsible for semiconductor assembly. They plan to use Sharp’s LCD panel factory as a research and development site, as the target locations potentially being Sharp’s Kameyama plant or Mie plant.
For display manufacturers, their ability to effectively control contaminants in the manufacturing environment directly impacts the fluctuations in yield. LCD panels, like semiconductors, suffer from decreased yield if even minute dust or particles are introduced during the manufacturing process. Thus, LCD panel factories are equipped with clean rooms designed to minimize dust and particles, making them suitable for both production and semiconductor research and development.
The report also stated that in addition to Intel, Rapidus, which aims to mass-produce cutting-edge 2-nanometer chips, and Mitsubishi Electric will also utilize existing LCD factories for semiconductor research and development.
In mid-May, per another report by Nikkei, Sharp decided that Sakai Display Products (SDP), its 10th generation panel factory, which produces large-sized LCD panels for TVs, would cease production by the end of September. Additionally, production of medium and small-sized LCD panels would be reduced. Instead, the company intends to seek collaboration with other companies and optimize its factories to improve profitability.
According to the report, currently, Sharp produces medium and small-sized panels at its Kameyama, Mie, and Hakusan factories. Daily production at Kameyama’s second factory is expected to decrease from 2,000 panels to 1,500, while production at Mie’s third factory will drop from 2,280 panels to 1,100, a 52% reduction, while the OLED production line at the Tenjiku factory will be closed.
Read more
(Photo credit: Intel)
News
Intel CEO Pat Gelsinger gave a keynote speech at the 2024 COMPUTEX TAIPEI yesterday. According to a report from UDN, Gelsinger addressed that the U.S. must carefully find an appropriate balance in its chip ban against China to avoid pushing China to accelerate the development of its own chips. He stated that Intel’s technology holds a competitive advantage in China and will continue to export appropriate products to China.
Regarding the AI era, Gelsinger mentioned that all devices will eventually become AI devices, and all businesses will become AI businesses. He also introduced Intel’s foundry services as the first production system designed for the AI era. He stated that AI will be ubiquitous, its applications including AI PCs, end devices, enterprise products, and data centers.
At a press conference following the event, Gelsinger was asked about the development of Intel’s foundry services. He noted that everything is on track, with the goal of achieving this through a more flexible and balanced supply chain.
Regarding whether the U.S. chip export ban is prompting China to accelerate its chip development, Gelsinger said that the ban acts like a “magic line.” If the bans are too strict, it could force China to speed up the development of its own chips, so it is indeed crucial to carefully find the appropriate balance.
Per a report from tom’s hardware, Gelsinger agrees on strict restrictions on manufacturing technology, particularly emphasizing limitations on EUV lithography, which he believes will curb Chinese chipmakers’ capabilities to keep American companies competitive in China.
Notably, per Reuters citing sources, the U.S. government has reportedly revoked the licenses of Intel and Qualcomm to supply semiconductor chips used in laptops and handsets to Huawei. Some companies received notices on May 7th, and the revocation of the licenses took immediate effect.
Read more
(Photo credit: iStock)
News
Intel CEO Pat Gelsinger delivered a keynote speech at COMPUTEX Taipei earlier today, unveiling the next-generation client architecture set to launch this year. According to a report from CNA, He expressed gratitude to TSMC for collaborating on the development of the Lunar Lake processors, intended for the next generation of AI PCs. Currently, there are over 80 designs from 20 manufacturers.
Previously on the IFS Direct Connect event in San Jose, USA, Gelsinger pointed out in an interview that two generations of CPU Tiles would be manufactured using TSMC’s N3B process, marking the official arrival of Intel CPU orders for laptop platforms.
Gelsinger’s interview confirms that Intel has indeed expanded its outsourcing orders to TSMC. Currently, TSMC is responsible for producing Intel CPUs, GPUs, and NPUs tiles for the Arrow and Lunar Lake platforms.
As per CNA’s report, Gelsinger announced the launch of the Xeon 6 platform and processor family designed to meet the demands of data centers, as well as the Gaudi AI accelerator. He also unveiled details of the Lunar Lake processor architecture.
As the flagship processor for the next generation of AI PCs, Lunar Lake significantly enhances graphics and AI processing, reducing system-on-chip power consumption by 40% and providing over three times the AI computing capability. Lunar Lake processors are expected to start shipping in the third quarter of this year.
Additionally, Intel plans to ship over 40 million Core Ultra processors this year, further solidifying its position in the AI PC field.
Gelsinger remarked that having 100,000 transistors on a chip would be remarkable in the early days, but now there are already 1 billion transistors on a chip, with the potential to reach even 1 trillion in the future.
Contrary to what NVIDIA CEO Jensen Huang recently described in his speech, Gelsinger indicated further that Moore’s Law is alive and well, and Taiwan continues to play a core role.
According to Gelsinger, Intel has been operating in Taiwan since 1985 and will enter its 40th year of operation next year. The partnership between Intel and Taiwan spans 39 years, and the combined initials of Intel (I) and Taiwan (T) stand for information technology (IT). Together, Intel and its Taiwanese partners can change the world once again.
Read more
(Photo credit: Intel)
News
In the past two years, the semiconductor industry has experienced a market downturn, a recovery slower than expected, and a cash crunch. Major companies such as Intel, TSMC, and Samsung, while continuing to advance their expansion projects, have been constantly adjusting and slowing down the pace and schedule of their fab construction to better serve their long-term development goals. It’s found that seven fabs worldwide are projected to delay construction.
According to a report from global media outlet Volksstimme, the construction of Intel’s Fab 29.1 and Fab 29.2 near Magdeburg, Germany, has been postponed due to pending approval of EU subsidies and the need to remove and reuse black soil. The date of commencement has been pushed from summer 2024 to May 2025.
Earlier reports indicated that the construction of this chip planr was initially expected to begin in 1H23, but due to subsidy delays, construction was put off to summer 2024. Moreover, the topsoil at the construction site cannot be cleared until May 2025 at the earliest.
It is reported that Intel’s Fab 29.1 and Fab 29.2 were originally scheduled to start operations by late 2027 and were expected to employ advanced manufacturing processes, potentially Intel 14A (1.4nm) and Intel 10A (1nm) process nodes. However, Intel now estimates that it will take four to five years to build these two plants, and production is expected to commence between 2029 and 2030.
In February 2024, Samsung revealed that it had partially halted the construction of its fifth semiconductor plant in Pyeongtaek, Gyeonggi Province. Samsung originally planned to build six semiconductor plants on an 855,000 square meter site in Pyeongtaek, creating the world’s largest semiconductor hub. Currently, the P1, P2, and P3 plants at the Pyeongtaek park house the most advanced DRAM, NAND flash memory, and foundry production lines, while the P4 and P5 plants are under construction.
Samsung stated that the halt was for further inspection. However, industry sources have revealed that Samsung’s adjustment of the new production lines for P4 and P5 fabs is to prioritize the construction of the PH2 production line at P4 fab. It is reported that P4 plant might build PH3 production line to produce high-end DRAM to meet market demands.
Besides, South Korean media Businesskorea also revealed Samsung has postponed the mass production timeline of the fab in Taylor, Texas, US from late 2024 to 2026, which is possibly due to a slowdown in the wafer foundry market growth, and the delay was attributed to U.S. government subsidies and issues related to the complexities in gaining permits.
On April 9, TSMC announced the plan to build a third fab in Arizona. Once completed, this fab will use 2nm process or even more advanced technologies to manufacture wafers for customers. With this addition, TSMC’s total capital expenditure in Phoenix, Arizona, will exceed USD 65 billion.
Meanwhile, TSMC disclosed that their first fab in Arizona will start production in 1H25, using 4nm process. The second fab, initially announced to use 3nm process, will also incorporate the more advanced 2nm process, with mass production set to begin in 2028. This fab was announced in December 2020, which was originally scheduled to start mass production using 3nm process in 2026, primarily, but the latest schedule represents a delay of nearly two years from the original one.
As to the third fab planned to set up in Arizona, TSMC has not yet disclosed the date for construction. However, they mentioned that it will use 2nm process or more advanced ones, with production expected to commence in the late 2030s.
Wolfspeed’s 8-inch SiC fab in Ensdorf, Saarland planned to invest about EUR 2.75 billion, but the construction has been postponed. The project has already secured subsidies of EUR 360 million from the German federal government and EUR155 million from the Saarland government. In addition, Wolfspeed is also seeking financial assistance from the European Chips Act. ZF will provide Wolfspeed with several hundred million dollars of financial investment in exchange for a minority stake in the plant.
Industry sources indicate that Wolfspeed aims to secure more funding before the groundbreaking ceremony. If it fails to gain financial assistance from the European Chips Act, the project is very likely to be delayed. The plant was initially scheduled to start construction in summer 2024, but Wolfspeed CEO Gregg Lowe revealed that it might now begin in 2025.
Read more
(Photo credit: TSMC)