According to Taiwan’s Business Next, as Moore’s Law gradually reaches its limits, semiconductor manufacturers are transitioning from 2D to 3D chip stacking and packaging to increase transistor counts for improved performance. The final step, “packaging,” has become crucial. In line with this trend, Intel has announced the industry’s first glass-based substrate for advanced packaging, breaking traditional constraints, with mass production expected between 2026 and 2030.

Intel’s glass-based substrate packaging technology has been in development for a decade and was unveiled at the 2023 Innovation Day in Silicon Valley, USA. Intel aims to achieve the goal of accommodating 1 trillion transistors within a single package by 2030 using advanced glass-based packaging.

The rise of the AI wave has driven the demand for accelerated computing, increasing the requirements for chip density. Intel argues that current substrate materials consume more power and are more prone to expansion and warpage compared to glass, which better aligns with future needs. Industry analysts have noted that TSMC also has similar solutions.

According to Intel, Glass substrates can tolerate higher temperatures, offer 50% less pattern distortion, and have ultra-low flatness for improved depth of focus for lithography, and have the dimensional stability needed for extremely tight layer-to-layer interconnect overlay. As a result of these distinctive properties, a 10x increase in interconnect density is possible on glass substrates. Further, improved mechanical properties of glass enable ultra-large form-factor packages with very high assembly yields.

Glass substrates’ tolerance to higher temperatures also offers chip architects flexibility on how to set the design rules for power delivery and signal routing because it gives them the ability to seamlessly integrate optical interconnects, as well as embed inductors and capacitors into the glass at higher temperature processing.

According to a report from China’s Changjiang Securities released in May, the application of glass substrates in advanced packaging has been validated, and glass manufacturer Corning has introduced related products.

On the other hand, in a report by China’s Changjiang Securities released in May, the application of glass substrates in advanced packaging has been validated, with glass manufacturer Corning introducing related products.

(Photo credit: Intel)

Report to Liberty Times Net, In a joint statement on the comprehensive strategic partnership between the United States and Vietnam, the two countries highlighted Vietnam’s significant potential to become a key player in the semiconductor industry. The United States expressed its support for the rapid development of Vietnam’s semiconductor ecosystem. To foster the development of human resources in the semiconductor industry, the United States will provide a $2 million seed fund, with future investments coming from the Vietnamese government and the private sector. These initiatives are seen as a significant step forward for Vietnam in its journey to join the global semiconductor industry.

U.S. census data showed semiconductor imports from Vietnam surged by 75% to $562.5 million in August compared to the same period last year, capturing approximately 11.6% of the market share. However, experts point out that considering the entire supply chain, Vietnam’s contribution remains relatively small.

Semiconductor manufacturing involves three fundamental stages: design, fabrication, and packaging. Since Intel’s Ho Chi Minh City factory is its primary production facility, Vietnam is primarily involved in the final packaging stage of semiconductor production, which represents the lowest value-added segment of the supply chain. According to data from the Semiconductor Industry Association (SIA), packaging accounts for only 6% of the chip’s value. Additionally, Korean semiconductor design companies are following Samsung’s lead by establishing factories in Vietnam, including CoAsia in Hanoi and Amkor in Bac Ninh province.

Shortage of Engineers in Vietnam Poses a Major Challenge

A shortage of packaging and design engineers poses a significant challenge for Vietnam. The country lacks the capacity for domestic semiconductor manufacturing. Currently, Vietnam has over 5,500 semiconductor design engineers, while Intel’s Ho Chi Minh City factory has shipped over 3 billion chips to date. The supply chain ecosystem of American giants is gradually taking shape in Vietnam. However, with just over 5,000 engineers, Vietnam remains a distant bridge to this multi-billion-dollar industry.

Vietnam faces two choices for industry growth: expanding its manufacturing sector or enhancing skills and value in the design and packaging phases. Experts suggest that Vietnam has chosen the latter. However, the shortage of personnel poses a barrier to Vietnam’s ambitions to increase the value of its semiconductor supply chain.

According to estimates, the semiconductor industry needs to cultivate 10,000 engineers annually, but Vietnam’s current rate is less than 20%. In fact, according to a report by the Vietnam Microchip Association, the number of engineers only increases by about 500 people each year. Currently, most of Vietnam’s semiconductor engineers work for foreign companies.

(Source: https://ec.ltn.com.tw/article/breakingnews/4432014)

In recent years, with the rise of AI and 5G technologies leading to increasing computational demands, Silicon Photonics technology has once again become a focal point of discussion in the semiconductor industry.

TrendForce Perspective:

• Rewriting Semiconductor Development Rules with Silicon Photonics 

Since the development of the semiconductor industry, the industry’s trajectory has largely followed the development predicted by Gordon Moore – roughly doubling the number of transistors that can be accommodated on an integrated circuit approximately every two years. However, as chip sizes continue to shrink, chip architecture design is gradually being challenged. Semiconductor manufacturers, including TSMC, Samsung, and Intel, are striving to break through Moore’s Law as their goal. Others have publicly announced their focus on mature processes (the industry divides at 7nm, with 7nm and below considered advanced processes) and optimization of existing technologies.

However, even as manufacturers push the boundaries of Moore’s Law, leading to increased transistor density per unit area, signal loss issues inevitably arise during signal transmission since chips rely on electricity to transmit signals. Despite the increased transistor count, power consumption problems persist. Silicon Photonics technology, which replaces electrical signals with optical signals for high-speed data transmission, successfully overcomes this challenge, achieving higher bandwidth and faster data processing. With this approach, chips do not need to cram more transistors per unit area or pursue smaller nanometers and nodes. Instead, they can achieve higher integration and performance on existing processes, further advancing technology.

• Optimistic about Silicon Photonics Technology, but Breakthroughs Will Take Time

Currently, Silicon Photonics technology still faces various challenges, including alignment and coupling, thermal management, modulation and detection, expansion and integration, among others. Significant breakthroughs are unlikely in the short term, and major global manufacturers are still in the early development stages. In Taiwan, recent reports suggest that TSMC is actively venturing into Silicon Photonics technology. While TSMC has not officially confirmed this news, during the Silicon Photonics International Forum, a senior vice president from TSMC clearly stated, “If a good Silicon Photonics integration system can be provided, it can address the key issues of energy efficiency and AI computing power. This could be a Paradigm Shift, and we might be at the beginning of a new era.”

This suggests that TSMC is optimistic about the development of Silicon Photonics technology. Although Taiwanese companies have not formally announced their entry into the Silicon Photonics field, it is expected that with the explosive growth in demand for data transmission, storage, and computing driven by AI technology, Silicon Photonics will undoubtedly be a critical technology for future semiconductor development.

With the increasing demand for massive computing in fields such as AI, communication, and autonomous vehicles, the evolution of integrated circuits (ICs) has reached a physical limit under the premise of Moore’s Law. How can this limit be surpassed? The answer lies in the realm of optics. Currently, many domestic and international companies are actively embracing “Silicon Photonics” technology. When electronics meet photons, it not only addresses the signal transmission loss issue but is also considered a key technology that could usher in a new era, potentially revolutionizing the future world.

Integrated circuits (ICs) cram millions of transistors onto a single chip, performing various complex calculations. Silicon Photonics, on the other hand, represents integrated “light” paths, where light-conductive pathways are consolidated. In simple terms, it is a technology that converts “electronic signals” into “optical signals” on a silicon platform, facilitating the transmission of both electrical and optical signals.

As technology rapidly advances and computer processing speeds increase, communication between chips has become a critical factor in computing performance. For instance, when ChatGPT was first launched, there were issues with lag and interruptions during the question and answer process, which were related to data transmission problems. Therefore, as AI technology continues to evolve, maintaining computational speed is a crucial aspect of embracing the AI era.

Silicon Photonics has the potential to enhance the speed of optoelectronic transmission, addressing the signal loss and heat issues associated with copper wiring in current computer components. Consequently, semiconductor giants such as TSMC and Intel have already invested in related research and development efforts. In this context, we interviewed Dr. Fang Yen Hsiang, director of the Opto-Electronics Micro Device & System Application Division and Electronic and Optoelectronic System Research Laboratories at the Industrial Technology Research Institute (ITRI), to gain insights into this critical technology.

What Is the Relationship Between Silicon Photonics and Optical Transceivers?

An optical transceiver module comprises various components, including optical receivers, amplifiers, modulators, and more. In the past, these components were individually scattered on a PCB (printed circuit board). However, to reduce power consumption, increase data transmission speed, and minimize transmission loss and signal delay, these components have been integrated into a single silicon chip. Fang emphasizes that this integration is the core of Silicon Photonics.

Integrated Circuits’ Next Step: The Three Stages of Silicon Photonics

• Silicon Photonics Stage 1: Upgrading from Traditional Pluggable Modules

Silicon Photonics has been quietly developing for over 20 years. The traditional Silicon Photonics pluggable optical transceiver modules look very much like USB interfaces and connect to two optical fibers—one for incoming and one for outgoing light. However, the electrical transmission path in pluggable modules had a long distance before reaching the switch inside the server. This resulted in significant signal loss at high speeds. To minimize this loss, Silicon Photonics components have been moved closer to the server’s switch, shortening the electrical transmission path. Consequently, the original pluggable modules now only contain optical fibers.

This approach aligns with the actively developing “Co-Packaged Optics” (CPO) technology in the industry. The main idea is to assemble electronic integrated circuits (EIC) and photonic integrated circuits (PIC) onto the same substrate, creating a co-packaged board that integrates chips and modules. This co-packaging, known as CPO light engines (depicted in figure “d” below), replaces optical transceivers and brings optical engines closer to CPU/GPU chips (depicted in figure “d” as chips). This reduces transmission paths, minimizes transmission loss, and reduces signal delay.

According to ITRI, this technology reduces costs, increases data transmission by over 8 times, provides more than 30 times the computing power, and saves 50% in power consumption. However, the integration of chipsets is still a work in progress, and refining CPO technology will be the next important step in the development of Silicon Photonics.

• Solving the CPO Bottleneck and Beyond – Silicon Photonics Stage 2: Addressing CPU/GPU Transmission Issues

Currently, Silicon Photonics primarily addresses the signal delay challenges of plug-in modules. As technology progresses, the next stage will involve solving the electrical signal transmission issues between CPUs and GPUs. Academics point out that chip-to-chip communication is primarily based on electrical signals. Therefore, the next step is to enable internal chip-to-chip communication between GPUs and CPUs using optical waveguides, converting all electrical signals into optical signals to accelerate AI computations and address the current computational bottleneck.

• Silicon Photonics Ultimate Stage 3: The Arrival of the All-Optical Network (AON) Era

As technology advances even further, we will usher in the era of the “All-Optical Network” (AON). This means that all chip-to-chip communication will rely on optical signals, including random storage, transmission, switching, and processing, all of which will be transmitted as optical signals. Japan has already been actively implementing Silicon Photonics in preparation for the full transition to all-optical networks in this context.

Where Does Silicon Photonics Currently Face Technological Challenges?

Currently, Silicon Photonics faces several challenges related to component integration. First and foremost is the issue of communication. Dr. Fang Yen Hsiang provides an example: semiconductor manufacturers understand electronic processes, but because the performance of photonic components is sensitive to factors such as temperature and path length, and because linewidth and spacing have a significant impact on optical signal transmission, a communication platform is needed. This platform would provide design specifications, materials, parameters, and other information to facilitate communication between electronic and photonic manufacturers.

Furthermore, Silicon Photonics is currently being applied in niche markets, and various packaging processes and material standards are still being established. Most of the wafer foundries that provide Silicon Photonics chip fabrication belong to the realm of customized services and may not be suitable for use by other customers. The lack of a unified platform could hinder the development of Silicon Photonics technology.

In addition to the lack of a common platform, high manufacturing costs, integrated light sources, component performance, material compatibility, thermal effects, and reliability are also challenges in Silicon Photonics manufacturing processes. With ongoing technological progress and innovation, it is expected that these bottlenecks will be overcome in the coming years to a decade.

This article is from TechNews, a collaborative media partner of TrendForce.

(Photo credit: Google)

According to a report by Taiwanese media Money DJ, after establishing a stable position as a major supplier for NVIDIA GPU baseboard, Wistron has secured orders for AMD MI300 baseboards. Reliable sources indicate that Wistron has expanded its involvement beyond AMD baseboards and entered the module assembling segment.

In addition to NVIDIA and AMD, Wistron has also entered the Intel AI chip module and baseboard supply chain, encompassing orders from the three major AI chip manufacturers.

The NVIDIA AI server supply chain includes GPU modules, GPU baseboards, motherboards, server systems, complete server cabinets, and more. Wistron holds a significant share in GPU baseboard supply and is also involved in server system assembly.

Currently, NVIDIA commands a 70% market share in AI chips, but various chip manufacturers are eager to compete. Both AMD and Intel have introduced corresponding solutions. While Wistron was previously rumored to have entered AMD baseboard supply, it has also ventured into AMD GPU module assembling, serving as the sole source, according to reliable sources.

Regarding the news of Wistron’s involvement in AMD and Intel chip manufacturing, the company has chosen not to respond to market rumors.

(Photo credit: Google)