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According to a report from the Commercial Times, Tokyo Electron (TEL), a leading global semiconductor equipment manufacturer, is the only company in the world that possesses equipment for four consecutive processes: deposition, coating/developing, etching, and cleaning, which are crucial steps before wafers enter the process of EUV lithography. As the semiconductor nodes keep advancing, the Japanese semiconductor giant would significantly benefit from the trend by its extensive product line.
Hiromitsu Kambara, TEL’s President & Representative Director of TEL Miyagi Ltd., stated that as chip design evolves, etching technology is continuously advancing towards 3D development, with vertical stacking making more efficient use of space. However, the increase in the number of stacking layers leads to an increase in the number of deposition cycles and etching times, thereby necessitating the growth in the number of required machines.
While EUV bellwether companies enjoy nearly 100% market share in the sector, TEL, with its close collaboration with the industry leader in the coating/developing process, could also dominate in this field, the report noted. In other words, as EUV shipments increase, TEL will benefit concurrently. TEL also disclosed that it has already established a research and development center in Taiwan and will soon expand its cleanroom facilities to collaborate with the most advanced process manufacturers.
When paired with partner Litho (lithography) machines, TEL has nearly 100% market share in the coating/developing market. Currently, TEL operates in 19 countries with a total of 87 locations, according to Commercial Times.
As the semiconductor industry enters the angstrom era, fabs are increasingly relying on equipment precision, for which TEL has prepared accordingly. TEL’s latest product, Grinder, is designed not only to ensure wafer flatness but also to achieve partial etching flatness and surface cleaning. This allows the equipment to measure wafers’ flatness and cleanliness effectively.
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(Photo credit: TEL)
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According to a report from Japanese news outlet Kyodo News, TSMC’s Fab in Kikuyo, Kumamoto Prefecture, Japan (Kumamoto Fab 1) is expected to start mass production in Q4 this year. The planned second Fab (Kumamoto Fab 2) will also be located in Kikuyo. Reportedly, TSMC’s Kumamoto Fab 2 has already begun land preparation, the construction of the fab is set to commence as scheduled in the second half of the year, with the goal of commencing operations by 2027.
The report indicates that Kumamoto Fab 2 is situated to the east of Kumamoto Fab 1, which held its opening ceremony in February. Per Japan’s Ministry of Economy, Trade, and Industry, the land area for Kumamoto Fab 2 is approximately 321,000 square meters, about 1.5 times larger than Kumamoto Fab 1 (an increase of around 50%). The investment for this project is estimated at around JPY 2.2 trillion yen, with the Japanese government providing subsidies of up to JPY 732 billion.
Kumamoto Fab 1 is expected to begin mass production in Q4 of this year, utilizing 28/22nm and 16/12nm process technologies with a monthly capacity of 55,000 wafers.
On February 6th, TSMC announced the construction of Kumamoto Fab 2 in Kumamoto Prefecture. Combined, the total investment for both Fabs is expected to exceed USD 20 billion. Construction of Kumamoto Fab 2 is scheduled to start at the end of 2024, with the goal of beginning operations by the end of 2027, focusing on 6/7nm technology. The combined monthly capacity of Kumamoto Fab 1 and Fab 2 is estimated to exceed 100,000 wafers.
Kumamoto’s newly appointed governor, Takashi Kimura, who took office in April, stated in an report from Bloomberg on May 11th that he would spare no effort to persuade TSMC to establish a third fab in the region. Kimura believed that during the preparations for TSMC’s first fab in Kumamoto, the region already possesses better-quality road and water infrastructure and an education system that better supports international school students, which could be advantageous.
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(Photo credit: TSMC)
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According to a report from Nikkei citing sources, memory giant Micron Technology is building a pilot production line for advanced high-bandwidth memory (HBM) in the United States and is considering producing HBM in Malaysia for the first time to capture more demand from the AI boom.
Reported on June 19, Micron is said to be expanding its HBM-related R&D facilities at its headquarters in Boise, Idaho, which include production and verification lines. Additionally, Micron is considering establishing HBM production capacity in Malaysia, where it already operates chip testing and assembly plants.
Nikkei’s report further noted that Micron’s largest HBM production facility is located in Taichung, Taiwan, where expansion efforts are also underway. Micron is said to have set a goal to triple its HBM market share to 24-26% by the end of 2025, which would bring it close to its traditional DRAM market share of approximately 23-25%.
Earlier this month, a report from a Japanese media outlet The Daily Industrial News also indicated that Micron planned to build a new DRAM plant in Hiroshima, with construction scheduled to begin in early 2026 and aiming for completion of plant buildings and first tool-in by the end of 2027.
Per industry sources cited by TechNews, Micron is expected to invest between JPY 600 to 800 billion in the new facility, located adjacent to the existing Fab15 facility. Initially, the new plant will focus on DRAM production, excluding backend packaging and testing, with a capacity emphasis on HBM products.
Micron, along with SK Hynix, has reportedly received certification from NVIDIA to produce HBM3e for the AI chip “H200.” Samsung Electronics has not yet received approval from NVIDIA; its less advanced HBM3 and HBM2e are currently primarily supplied to AMD, Google, and Amazon.
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(Photo credit: Micron)
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According to a report from Reuters on June 19, to further restrict China’s semiconductor industry and prevent the use of semiconductor manufacturing equipment in military applications, Alan Estevez, the U.S. Commerce Department’s Under Secretary for Industry and Security, will visit the Netherlands and Japan.
Reportedly, Estevez will visit the Netherlands and Japan, with the primary objective of further limiting China’s ability to manufacture advanced semiconductors and preventing China from using chip manufacturing equipment to enhance its military capabilities. Additionally, the U.S. may add another 11 Chinese chip companies to the restricted list.
Sources cited by the report indicate that this move includes limiting the activities of equipment suppliers such as ASML and Japan’s Tokyo Electron in the Chinese market. Special attention will be given to Chinese chip manufacturers developing high-bandwidth memory (HBM) chips.
The report from also states that in July 2023, to align with U.S. government policies aimed at curbing China’s technological advancements, Japan, home to several chip equipment manufacturers like Nikon and Tokyo Electron, imposed restrictions on the export of 23 types of machinery to China. These machines range from those used for depositing thin films on silicon wafers to etching micro-integrated circuits. Similarly, the U.S. has imposed related restrictions on American companies such as Applied Materials and Lam Research.
Following Japan, the Dutch government also restricted ASML from exporting deep ultraviolet (DUV) lithography machines to China. The U.S. has not allowed some Chinese foundries to purchase additional advanced DUV machines. Prior to this, ASML had already ceased the export of even more advanced extreme ultraviolet (EUV) lithography machines to China.
With the Netherlands imposing new restrictions on the export of advanced chip manufacturing equipment effective from January, ASML previously announced that starting from 2024, they would not be able to ship NXT:2000i and higher DUV lithography equipment to China.
Equipment below NXT:2000i, including NXT:1970i and NXT:1980i, would also be restricted from shipment to advanced process fabs in China. ASML’s Chief Financial Officer, Roger Dassen, anticipated that this will impact 10% to 15% of sales in the Chinese market in 2024.
On the other hand, it has been reported that the U.S. government is in discussions with its allies about adding another 11 Chinese chip manufacturers to the blacklist. During a visit to the Netherlands in April this year, U.S. officials attempted to prevent ASML from continuing to provide maintenance services for equipment used in China. However, since ASML’s service contracts with Chinese customers are still valid and the Dutch government lacks the extraterritorial authority to terminate these contracts, this effort faced significant challenges.
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(Photo credit: iStock)
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According to a report from Nikkei, Japanese memory manufacturer Kioxia has ended production cuts amidst a recovery in the memory market and has secured new bank credit support. The company’s plants in Yokkaichi, Mie Prefecture, and Kitakami, Iwate Prefecture, have restored their production lines to 100% capacity, focusing mainly on NAND flash production.
With improved business conditions, creditor banks have reportedly agreed to refinance a maturing loan of JPY 540 billion (roughly USD 3.43 billion) and have established a new credit line totaling JPY 210 billion (roughly USD 1.33 billion).
Kioxia had previously implemented production cuts in October 2022 due to sluggish demand for smartphone products, reducing output by over 30%. The planned launch of new production lines at the Kitakami plant, originally scheduled for 2023, has been postponed to 2025.
The improved market environment is reflected in Kioxia’s financial report for January to March 2024, where the company achieved a net profit of JPY 10.3 billion, ending six consecutive quarters of losses. Demand for smartphone and personal computer chips has bottomed out and is starting to recover, while orders related to data centers have increased.
As per a previous TrendForce report, Kioxia’s Q1 output was still affected by production cuts from the previous quarter, resulting in a modest 7% QoQ increase in shipments. However, rising NAND Flash prices led to a 26.3% QoQ rise in revenue to $1.82 billion. Kioxia expects to grow Q2 revenue by approximately 20%, supported by increased supply bits and more flexible pricing, which will further expand enterprise SSD shipments.
Per the same report from Nikkei, led by a banking consortium including Sumitomo Mitsui Banking, Mitsubishi UFJ Financial Group, and Mizuho Bank, Kioxia’s improved performance has led to relaxed loan terms and agreement on refinancing along with new credit limits. Additionally, the banks will assist in funding for equipment upgrades.
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(Photo credit: Kioxia)