With the widespread adoption of AI, the demand for GPUs and high-bandwidth memory (HBM) is soaring. The Semiconductor Equipment Association of Japan (SEAJ) has revised its forecast for sales of Japanese-made semiconductor equipment, predicting that for the first time in history, sales will exceed JPY 4 trillion in the 2024 fiscal year. It is also estimated that sales will further exceed JPY 5 trillion in the 2026 fiscal year.

Per a report by Nikkei on July 5th, SEAJ’s forecast report indicates that for the 2024 fiscal year (April 2024 to March 2025), the sales of Japanese-made chip equipment (including sales by Japanese companies both domestically and overseas) have been revised from the previous estimate of JPY 4.0348 trillion (in January 2024) to JPY 4.2522 trillion, marking a significant increase of 15.0% compared to the 2023 fiscal year.

This will be the first time in history that annual sales exceed JPY 4 trillion, setting a new record. The main reason for this growth is the widespread adoption of AI, which has led to a strong demand for GPUs used in AI servers and a continuous surge in demand for HBM used in conjunction with them.

Reportedly, SEAJ stated that, due to anticipated steady investments in logic/foundry and memory, the sales forecast for Japanese chip equipment in the 2025 fiscal year (April 2025 to March 2026) has been revised upward from JPY 4.4383 trillion to JPY 4.6774 trillion, representing a 10.0% year-on-year increase.

Additionally, the demand for chip equipment is expected to be driven by AI-related semiconductors, resulting in a projected 10.0% year-on-year increase in sales for the 2026 fiscal year, reaching JPY 5.1452 trillion. This will mark the first time annual sales exceed JPY 5 trillion.

The compound annual growth rate (CAGR) for Japanese chip equipment sales during the 2024-2026 period is estimated to be 11.6%. Japan’s global market share for chip equipment (in terms of sales) is approximately 30%, making it the second-largest in the world, following the United States.

SEAJ has indicated that in addition to servers, AI will be integrated into into PCs and smartphones at a faster pace in the near future. SEAJ President Toshiki Kawai mentioned that by 2027, 30-40% of PCs and smartphones are expected to incorporate AI, which is anticipated to have a more significant impact on increasing the demand for chip equipment compared to servers.

Toshiki Kawai further mentioned that as the self-sufficiency in manufacturing equipment remains insufficient in the Chinese market, the demand remains consistent and robust for Japanese-made equipment.

On June 25th, SEAJ released statistics indicating that in May 2024, Japan’s semiconductor equipment sales (3-month moving average, including exports) reached JPY 400.954 billion. This marked a significant increase of 27.0% compared to the same month last year, marking the fifth consecutive month of growth and the largest increase in 19 months (since October 2022, with a growth of 27.6%).

Monthly sales exceeded JPY 300 billion for the seventh consecutive month and surpassed JPY 400 billion for the first time in history, setting a new monthly sales record (previously, the highest record was JPY 389.106 billion in April 2024).

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(Photo credit: TEL)

Japan’s leading NAND flash manufacturer, Kioxia, has reportedly increased its production line utilization rate to 100% as of June and is set to commence mass production of its most advanced NAND flash products in July.

According to a report from Nikkei on July 3rd, Kioxia will start mass-producing its latest NAND flash products at its Yokkaichi plant in July. This move is said to be meeting the rapidly growing data storage demands driven by the proliferation of generative AI. Reportedly, the new NAND flash products Kioxia will produce feature 218-layer 3D flash, offering approximately 50% more storage capacity and requiring about 30% less power for data writing compared to current products.

Per the same report, besides the increasing demand driven by AI, the improvement in the memory market also make Kioxia’s production line utilization rate to return to 100% in June. Previously, Kioxia had been implementing production cuts since October 2022 due to sluggish demand for smartphones, with the reduction scale exceeding 30% at its peak.

In an earlier report from The Register, Kioxia announced a partnership with Western Digital (WD) to invest JPY 729 billion in mass-producing advanced memory products. The new plant, located in the Kitakami plant area, is scheduled to start operations in 2025. The Japanese Ministry of Economy, Trade and Industry will provide a subsidy of up to JPY 243 billion (roughly USD 1.63 billion).

In April 2017, Toshiba spun off its semiconductor business focused on NAND Flash, creating “Toshiba Memory.” This entity was renamed “Kioxia” on October 1, 2019. Toshiba currently holds approximately 40% of Kioxia’s shares.

According to another Reuters’ report on June 26th citing sources,  they have indicated that Kioxia will soon submit an initial application for listing on the Tokyo Stock Exchange, aiming for an IPO by the end of October. Kioxia had been evaluating the possibility of going public to raise funds, and with the recovery of the semiconductor market and a rapid improvement in performance, it has determined that the timing is favorable for an IPO.

The sources cited by Reuters further indicate that Kioxia plans to submit its formal IPO application by the end of August, with the goal of going public by the end of October. To meet this timeline, preparations are being carried out at a faster pace than usual for an IPO. However, depending on progress, the IPO could be delayed until December. The sources also noted that Kioxia’s major shareholder, the American investment fund Bain Capital, plans to sell part of its stake during the IPO to recoup some of its investment.

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(Photo credit: Kioxia)

According to a report from the Commercial Times, Tokyo Electron (TEL), a leading global semiconductor equipment manufacturer, is the only company in the world that possesses equipment for four consecutive processes: deposition, coating/developing, etching, and cleaning, which are crucial steps before wafers enter the process of EUV lithography. As the semiconductor nodes keep advancing, the Japanese semiconductor giant would significantly benefit from the trend by its extensive product line.

Hiromitsu Kambara, TEL’s President & Representative Director of TEL Miyagi Ltd., stated that as chip design evolves, etching technology is continuously advancing towards 3D development, with vertical stacking making more efficient use of space. However, the increase in the number of stacking layers leads to an increase in the number of deposition cycles and etching times, thereby necessitating the growth in the number of required machines.

While EUV bellwether companies enjoy nearly 100% market share in the sector, TEL, with its close collaboration with the industry leader in the coating/developing process, could also dominate in this field, the report noted. In other words, as EUV shipments increase, TEL will benefit concurrently. TEL also disclosed that it has already established a research and development center in Taiwan and will soon expand its cleanroom facilities to collaborate with the most advanced process manufacturers.

When paired with partner Litho (lithography) machines, TEL has nearly 100% market share in the coating/developing market. Currently, TEL operates in 19 countries with a total of 87 locations, according to Commercial Times.

As the semiconductor industry enters the angstrom era, fabs are increasingly relying on equipment precision, for which TEL has prepared accordingly. TEL’s latest product, Grinder, is designed not only to ensure wafer flatness but also to achieve partial etching flatness and surface cleaning. This allows the equipment to measure wafers’ flatness and cleanliness effectively.

According to a report from Japanese news outlet Kyodo News, TSMC’s Fab in Kikuyo, Kumamoto Prefecture, Japan (Kumamoto Fab 1) is expected to start mass production in Q4 this year. The planned second Fab (Kumamoto Fab 2) will also be located in Kikuyo. Reportedly, TSMC’s Kumamoto Fab 2 has already begun land preparation, the construction of the fab is set to commence as scheduled in the second half of the year, with the goal of commencing operations by 2027.

The report indicates that Kumamoto Fab 2 is situated to the east of Kumamoto Fab 1, which held its opening ceremony in February. Per Japan’s Ministry of Economy, Trade, and Industry, the land area for Kumamoto Fab 2 is approximately 321,000 square meters, about 1.5 times larger than Kumamoto Fab 1 (an increase of around 50%). The investment for this project is estimated at around JPY 2.2 trillion yen, with the Japanese government providing subsidies of up to JPY 732 billion.

Kumamoto Fab 1 is expected to begin mass production in Q4 of this year, utilizing 28/22nm and 16/12nm process technologies with a monthly capacity of 55,000 wafers.

On February 6th, TSMC announced the construction of Kumamoto Fab 2 in Kumamoto Prefecture. Combined, the total investment for both Fabs is expected to exceed USD 20 billion. Construction of Kumamoto Fab 2 is scheduled to start at the end of 2024, with the goal of beginning operations by the end of 2027, focusing on 6/7nm technology. The combined monthly capacity of Kumamoto Fab 1 and Fab 2 is estimated to exceed 100,000 wafers.

Kumamoto’s newly appointed governor, Takashi Kimura, who took office in April, stated in an report from Bloomberg on May 11th that he would spare no effort to persuade TSMC to establish a third fab in the region. Kimura believed that during the preparations for TSMC’s first fab in Kumamoto, the region already possesses better-quality road and water infrastructure and an education system that better supports international school students, which could be advantageous.

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(Photo credit: TSMC)

According to a report from Nikkei citing sources, memory giant Micron Technology is building a pilot production line for advanced high-bandwidth memory (HBM) in the United States and is considering producing HBM in Malaysia for the first time to capture more demand from the AI boom.

Reported on June 19, Micron is said to be expanding its HBM-related R&D facilities at its headquarters in Boise, Idaho, which include production and verification lines. Additionally, Micron is considering establishing HBM production capacity in Malaysia, where it already operates chip testing and assembly plants.

Nikkei’s report further noted that Micron’s largest HBM production facility is located in Taichung, Taiwan, where expansion efforts are also underway. Micron is said to have set a goal to triple its HBM market share to 24-26% by the end of 2025, which would bring it close to its traditional DRAM market share of approximately 23-25%.

Earlier this month, a report from a Japanese media outlet The Daily Industrial News also indicated that Micron planned to build a new DRAM plant in Hiroshima, with construction scheduled to begin in early 2026 and aiming for completion of plant buildings and first tool-in by the end of 2027.

Per industry sources cited by TechNews, Micron is expected to invest between JPY 600 to 800 billion in the new facility, located adjacent to the existing Fab15 facility. Initially, the new plant will focus on DRAM production, excluding backend packaging and testing, with a capacity emphasis on HBM products.

Micron, along with SK Hynix, has reportedly received certification from NVIDIA to produce HBM3e for the AI chip “H200.” Samsung Electronics has not yet received approval from NVIDIA; its less advanced HBM3 and HBM2e are currently primarily supplied to AMD, Google, and Amazon.

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(Photo credit: Micron)