Amid the wave of AI applications, the demand for high-performance memory continues to mushroom, with DRAM, represented by HBM, gaining significant traction. Meanwhile, to further meet market demand, memory manufacturers are  poised to embrace a new round of DRAM technological “revolution.”

• 4F Square DRAM being Developed Smoothly

According to a report from Korean media outlet Chosun Biz, Samsung Electronics Vice President Changsik Yoo recently announced that Samsung’s next-generation DRAM technology is progressing well. In addition to the successful mass production of 1b DRAM, the development of 4F Square DRAM technology is also proceeding smoothly, with the initial sample of 4F Square DRAM set to be developed by 2025.

Industry sources cited by WeChat account DRAMeXchange indicate that the early DRAM cell structure was 8F Square, while currently commercialized DRAM mainly uses 6F Square. Compared to these two technologies, 4F Square employs a vertical channel transistor (VCT) structure, which can reduce the chip surface area by 30%.

As the cell area decreases, DRAM density and performance increase. Therefore, driven by applications like AI, 4F Square technology is gradually sought after by major storage manufacturers.

Previously, Samsung stated that many companies are working to transition their technology to 4F Square VCT DRAM, although some challenges need to be overcome, including the development of new materials like oxide channel materials and ferroelectrics.

Industry sources believe that the initial sample of Samsung’s 4F Square DRAM in 2025 might be for internal release. Another semiconductor manufacturer, Tokyo Electron, estimates that DRAM using VCT and 4F Square technology will come out between 2027 and 2028.

Furthermore, earlier media reports mentioned that Samsung plans to apply Hybrid Bonding technology to support the production of 4F Square DRAM. Hybrid Bonding is a next-generation packaging technology referring to vertically stack chips to increase cell density and thus improve performance, which will also exert an influence on the development of HBM4 and 3D DRAM.

• HBM4 on the Horizon

In the era of AI, HBM, particularly HBM3e, has thrived in the memory market, prompting fierce competition among the three major DRAM manufacturers. A new race is now underway, primarily focusing on the next-generation HBM4 technology.

In April of this year, SK Hynix announced a partnership with TSMC to jointly develop HBM4. It is reported that the two companies will first work on performance improvements for the base die fitted at the bottom layer within the HBM package. To focus on the development of next-generation HBM4 technology, Samsung has established a new “HBM Development Team.”

In July, Choi Jang-seok, head of the New Business Planning Group in Samsung Electronics’ memory division, revealed that the company is developing a high-capacity HBM4 memory with a single stack of up to 48GB, expected to go into production next year. Recently, Samsung reportedly plans to use a 4nm advanced process to produce HBM4 logic die. Micron, on the other hand, plans to introduce HBM4 between 2025 and 2027 and transition to HBM4E by 2028.

Aside from manufacturing processes, DRAM manufacturers are actively exploring hybrid bonding technology for future HBM products. Compared to existing bonding processes, hybrid bonding eliminates the need for bumps between DRAM memory layers, instead directly connecting the upper and lower layers, copper to copper. This significantly improves signal transmission speed, better matching the high bandwidth requirements of AI computing.

In April of this year, Korean media outlet The Elec reported that Samsung successfully manufactured a 16-layer stacked HBM3 memory based on hybrid bonding technology, with the memory sample functioning normally. This 16-layer stacked hybrid bonding technology will be used to produce HBM4 at scale in the future. SK Hynix plans to adopt hybrid bonding in its HBM production by 2026. Micron is also developing HBM4 and is considering related technologies, including hybrid bonding, which are all under research at present.

• The Development of 3D DRAM Picks up Steam

3D DRAM (Three-dimensional dynamic random-access memory) represents a new DRAM technology with a novel memory cell structure. Unlike traditional DRAM, which places memory cells horizontally, 3D DRAM vertically stacks memory cells, greatly increasing storage capacity per unit area and improving efficiency. This makes it a key development for the next generation of DRAM.

In the memory market, 3D NAND Flash has already achieved commercial application, while 3D DRAM technology is still under research and development. However, as AI, big data, and other applications enjoy burgeoning growth, the demand for high-capacity, high-performance memory will surge, and 3D DRAM is expected to become a mainstream product in the memory market.

HBM technology has paved the way for the 3D evolution of DRAM, enabling DRAM to transition from traditional 2D to 3D. However, current HBM cannot be considered as true 3D DRAM technology. Samsung’s 4F Square VCT DRAM is closer to the concept of 3D DRAM, but it is not the only direction or goal for 3D DRAM. Memory manufacturers have more ideas and creativity in 3D DRAM.

Samsung plans to achieve the commercialization of 3D DRAM by 2030. In 2024, Samsung showcased two 3D DRAM technologies, including VCT and stacked DRAM. Samsung first introduced VCT technology, then upgraded to stacked DRAM by stacking multiple VCTs together to continuously improve DRAM capacity and performance.

Samsung states that stacked DRAM can fully utilize the Z-axis space, accommodating more memory cells in a smaller area, with a single chip capacity exceeding 100Gb. In May of this year, Samsung noted that it, along with other companies, successfully manufactured 16-layer 3D DRAM, but emphasized that it is not ready for mass production. 3D DRAM is expected to be produced using wafer-to-wafer hybrid bonding technology, and BSPDN (Backside Power Delivery Network) technology is also considered.

Regarding Micron, industry sources cited by DRAMeXchange reveal that Micron has filed for a 3D DRAM patent application different from Samsung’s, aiming to alter the shape of transistors and capacitors without placing cells.

BusinessKorea reported in June that SK Hynix achieved a manufacturing yield of 56.1% for its 5-layer stacked 3D DRAM. This means that out of around 1000 3D DRAMs produced on a single test wafer, about 561 viable devices were manufactured. The experimental 3D DRAM demonstrated characteristics similar to the currently used 2D DRAM, marking the first time SK Hynix disclosed specific numbers and features of its 3D DRAM development.

Besides, American company NEO Semiconductor is also engaging in the development of 3D DRAM. Last year, NEO Semiconductor announced the launch of the world’s first 3D DRAM prototype: 3D X-DRAM. This technology resembles 3D NAND Flash, namely increasing memory capacity by stacking layers, offering high yield, low cost, and remarkably high density.

NEO Semiconductor plans to launch the first generation of 3D X-DRAM in 2025, featuring a 230-layer stack and a core capacity of 128Gb, which is several times higher than the 16Gb capacity of 2D DRAM.

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• [News] Korean Semiconductor Exports Hit a New High, with Memory Shipment up by 88.7%
• [News] Korean Advanced Packaging Industry’s Rise Delayed by TSMC and ASE Expansion

(Photo credit: SK Hynix)

According to a report by Yonhap News Agency, data released by Korea’s Ministry of Science and information and communication technology ICT on July 15 shows that in the first half of this year, Korea’s ICT industry exports grew by 28.2% YoY to USD 108.85 billion, setting the second-highest record for the same period in history.

Fueled by demands in the AI, IT information technology, and telecommunications equipment markets, semiconductor exports, one of Korea’s main export products, surged by 49.9% YoY, reaching USD 65.83 billion.

On a market segment basis, Korea’s memory exports in the first half of the year saw a hike of 88.7% YoY, driven by increased exports of products like high bandwidth memory (HBM).

Due to increased investment in server and data center as well as increased demand for personal computer and other devices, exports of computers and peripheral devices rose by 35.6% YoY; instead, mobile phone exports decreased by 2.8% YoY to USD 5.58 billion.

In June, ICT exports grew by 31.1% YoY, reaching USD 21.05 billion, the highest value for the same month in history. Semiconductor exports were USD 13.44 billion, also setting a record high for the same month. Notably, memory chip exports soared by 85.2% YoY, reaching USD 8.83 billion.

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• [News] Korean Semiconductor Equipment Maker Develops ALD Technology to Reduce EUV Process Demand
• [News] Korean Advanced Packaging Industry’s Rise Delayed by TSMC and ASE Expansion

(Photo credit: SK Hynix)

Chul Joo Hwang, Chairman of South Korean semiconductor equipment company Jusung Engineering, recently stated that future semiconductors will stack transistors together, as the expansion of DRAM and logic chips has reached its limit. Stacking transistors like NAND is necessary to overcome these challenges.

According to a report from South Korean media outlet The Elec, Hwang believes this means developing more atomic layer deposition (ALD) technology to reduce the use of extreme ultraviolet (EUV) lithography steps in the production process of advanced chips.

ALD technology is a thin film process that allows materials to grow layer by layer, offering high uniformity, precise thickness control, and excellent step coverage, overcoming challenges faced by traditional process technologies.

Reportedly, stacking transistors can reduce the need for further scaling of transistors. As evidence, deep ultraviolet (DUV) equipment is expected to be used in 3D DRAM production.

Hwang believes that as stacking becomes increasingly important, the demand for ALD equipment will also rise. Additionally, the production of III-V semiconductors and IGZO semiconductors requires ALD equipment.

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• [News] Robust Demand in AI Drives South Korea’s Chip Exports in June to Record High
• [News] South Korea to Boost Semiconductor with a 26 Trillion Won Subsidy Program Starting in July

(Photo credit: Jusung Engineering)

On July 1st, according to a report from Reuters, the South Korea’s Ministry of Trade, Industry and Energy has announced that exports had grown for the ninth consecutive month in June. The sustained and even increasing demand for chips overseas led to a record high in chip export value for June. This export growth also propelled South Korea’s Manufacturing Purchasing Managers’ Index (PMI) to its highest level in over two years.

In June, South Korea’s exports grew by 5.1% year-on-year to USD 57 billion, while imports decreased by 7.5% to USD 49 billion. This resulted in a trade surplus of USD 8 billion, surpassing market expectations of USD 5.24 billion and marking the largest surplus since September 2020, as well as a 13 consecutive month of surplus.

Reportedly, chips are the most significant driver of export growth, with a 50.9% year-on-year growth in June to USD 13.4 billion, marking eight consecutive months of year-on-year growth.

The Trade Ministry believes that the robust demand for high-performance memory chips, such as DRAM for AI servers, has driven the recovery in exports.

As per another report from The Korea Times, South Korea’s exports of IT products such as displays, computers, and wireless communication devices have been growing consecutively for four months. In June, these three categories saw year-on-year export increases of 26.1%, 58.8%, and 3.9%, respectively.

In terms of export markets, South Korea’s exports to the United States in June rose by 14.7% year-on-year to USD 11 billion, reaching a new high for the same month in historical records. This marks continuous monthly export highs to the U.S. since August last year. Meanwhile, exports to mainland China increased by 1.8% year-on-year to USD 10.7 billion, marking four consecutive months of growth.

For the first half of the year, South Korea’s total exports amounted to USD 334.8 billion, a 9.1% increase from the same period last year. Imports, on the other hand, decreased by 6.5% year-on-year to USD 311.7 billion, resulting in a trade surplus of USD 23.1 billion, the highest for the same period since 2018.

(Photo credit: Samsung)

On June 30, South Korea’s SK Group announced that its chip manufacturer, SK Hynix, will invest KRW 103 trillion (approximately USD 75 billion) by 2028 to enhance its chip business, with a particular focus on AI development.

According to a report from Commercial Times, SK Group recently concluded a two-day strategy meeting, after which it announced a full-scale effort to develop the AI capability, putting more emphasis on areas such as high-bandwidth memory (HBM), AI data centers, and AI voice assistants. SK Group further stated that 80% of the KRW 103 trillion, roughly KRW 82 trillion (USD 60 billion), will be dedicated to developing HBM.

HBM is widely used in generative AI chipsets, and SK Hynix is currently the exclusive supplier of HBM3 chips to NVIDIA. In the first quarter of this year, SK Hynix’s revenue more than doubled year-on-year to KRW 12.4 trillion, exceeding market expectations. Additionally, the company turned profit with an operating income of KRW 2.89 trillion, compared to a loss in the same period last year, primarily due to the high-margin HBM chips.

SK Group stated that by 2026, the group will invest KRW 80 trillion in AI and semiconductors, while continuing to streamline its businesses to increase profitability and return value to shareholders. Its plan to invest in AI chip development aligns with the South Korean government’s semiconductor policy.

As per a previous report from WeChat account DRAMeXchange, in January 2024, Korea launched the “World’s Largest and Best Semiconductor Supercluster Construction Plan,” proposing an investment of KRW 622 trillion (~USD 454 billion) by 2047, which is to build 16 new plants, inclusive of R&D facilities, and construct “Semiconductor Supercluster” in semiconductor-intensive cities such as Pyeongtaek, Hwaseong, Yongin, Icheon, and Suwon in southern Gyeonggi Province. It’s estimated that the chip production capacity will reach 7.7 million wafers per month by 2030.

According to another report from the Chosun Daily, starting from July, the South Korean government will also begin offering incentives and subsidies to semiconductor companies, launching a 26 trillion won (USD 19 billion) funding program to support the industry.

Read more

• [News] South Korea to Boost Semiconductor with a 26 Trillion Won Subsidy Program Starting in July
• [News] A Subsidy Wave Sweeping in the US, Europe and Japan amid the Cut-Throat Chip Competition

(Photo credit: SK Hynix)