AI applications is driving the memory market forward, with HBM (High Bandwidth Memory) undoubtedly being a sought-after product of the industry, attracting increased capital expenditure and production expansion from memory manufacturers. At the meantime, a new force in the memory market has quietly emerged: GDDR7 is expected to drive the memory market steadily forward as HBM amid the AI wave.

• The Differences between GDDR7 and HBM

GDDR7 and HBM both belong to the category of graphics DRAM with high bandwidth and high-speed data transmission capabilities, providing strong support for AI computing. However, GDDR7 and HBM differ slightly in terms of technology, application scenarios, and performance.

GDDR7 is the latest technology in the GDDR family primarily used to enhance the available bandwidth and memory capacity of GPU. In March 2024, JEDEC, the Solid State Technology Association, officially released the JESD239 GDDR7 standard, which significantly increases bandwidth, eventually reaching 192GB/s per equipment.

It can be calculated that the memory speed is 48Gbps, double that of GDDR6X, the number of independent channels double from 2 in GDDR6 to 4 in GDDR7, and it supports densities ranging from 16-32 Gbit, including support for 2-channel mode to double system capacity.

Additionally, JESD239 GDDR7 is the first JEDEC-standard DRAM to use a Pulse Amplitude Modulation (PAM) interface for high-frequency operation. Its PAM3 interface improves the signal-to-noise ratio (SNR) in high-frequency operations while improving energy efficiency.

GDDR7 is mainly applied in graphics processing, gaming, computing, networking, and AI, particularly in gaming, where its high bandwidth and high-speed data transmission capabilities can significantly improve frame smoothness and loading speed, enabling a better experience for game players. In the field of AI, GDDR7 boasts great potential, capable of supporting rapid data processing and computation for large AI models, thus speeding up model training and inference.

Michael Litt, chairman of the JEDEC GDDR Task Group, has stated that GDDR7 is the first to focus not only on bandwidth but also on integrating the latest data integrity features to meet the market demands for RAS (Reliability, Availability, and Serviceability). These features allow GDDR devices to better serve existing markets like cloud gaming and computing, and expand its presence to AI sector.

Based on memory stacking technology, HBM connects layers through Through-Silicon Via (TSV), and features high capacity, high bandwidth, low latency, and low power consumption. Its strength lies in breaking the memory bandwidth and power consumption bottleneck. Currently, HBM is mainly used in AI server and supercomputer applications.

Since the introduction of the first generation in 2013, HBM has developed the second generation (HBM2), third generation (HBM2E), fourth generation (HBM3), and fifth generation (HBM3E).

This year, HBM3e will be the mainstream in the market, with concentrated shipments expected in 2H24. Besides, the sixth generation HBM4 is anticipated to make its debut as early as 2025. Reportedly, HBM4 will bring revolutionary changes, adopting a 2048-bit memory interface, which theoretically can double the transmission speed again.

• Three Memory Giants Scramble for the Initiative in GDDR7 Market

Due to high technical barriers, HBM market share is firmly at the helm of the three major memory players: SK Hynix, Samsung, and Micron. With the ongoing influence of AI, their competition has been expanding from HBM to GDDR field.

Since the beginning of this year, the three manufacturers have successively announced the availability of GDDR7 memory samples. It’s expected that some of them will start mass production of GDDR7 between 4Q24 and 1Q25.

Photo credit: Samsung Electronics

In March, Samsung and SK Hynix announced their respective GDDR7 specifications. Samsung’s GDDR7 chip, using PAM3 signal for the first time, can achieve a speed of 32Gbps at a DRAM voltage of only 1.1V, exceeding the JEDEC GDDR7 specification of 1.2V.

SK Hynix’s latest GDDR7 product, compared to its predecessor GDDR6, offers a maximum bandwidth of 160GB/s, double that of the previous generation, with a 40% improvement in power efficiency and a 1.5 times increase in memory density.

In June, Micron announced it already begun sampling its new generation of GDDR7, achieving a speed of 32Gbps and a memory bandwidth of 1.5TB/sec, a 60% improvement over GDDR6, boasting the industry’s highest bit density. Micron’s GDDR7 utilizes 1β DRAM technology and an innovative architecture and has four independent channels to optimize workloads, offering faster response time, smoother gaming experience, and shorter processing time.

Additionally, Micron’s GDDR7 improves energy efficiency by 50% relative to GDDR6, which hence enhances thermal performance for portable devices (Like laptop) and extends battery lifespan. The new sleep mode can reduce standby power consumption by 70%. Micron claims its next-generation GDDR7 can deliver high performance, increasing throughput by 33% and reducing response time for generative AI workloads (Text and image creation included) by 20%.

Photo credit: Micron

Recently, rumor has it that NVIDIA RTX 50 series will fully adopt the latest GDDR7, with a maximum capacity of 16GB, including models GN22-X11 (16 GB GDDR7), GN22-X9 (16 GB GDDR7), GN22-X7 (12 GB GDDR7), GN22-X6 (8 GB GDDR7), GN22-X4 (8 GB GDDR7), and GN22-X2 (8 GB GDDR7). The industry believes that GDDR7 will become a new arena in the memory market following HBM, in which manufacturers will continue to battle for NVIDIA GPU orders.

Read more

• [News] SK hynix to Kick off Mass Production for GDDR7 in Q4 2024
• [News] Micron Reportedly Targets 25% HBM Market Share by 2025

(Photo credit: Samsung Electronics)

According to TrendForce’s latest memory spot price trend report, the spot price of DRAM remains weak, as Samsung’s reallocation of its D1A process to the manufacturing of HBM products did little help. As for NAND flash, overall transactions are also sitting on the enervated end due to weakening market demand. Details are as follows:

DRAM Spot Price:

A fire-related incident occurred at Micron’s fab in Taichung on June 20th, but no actual losses (in bit terms) have been reported. In response to this event, module houses did temporarily suspend quoting, but they soon resumed trading activities. Overall, the event has had no positive effect on the spot price trend, which remains relatively weak. Similar to last week, spot trading has been fairly tepid, and prices of DDR4 products have fallen more significantly compared to DDR5 products. With Samsung reallocating its D1A process to the manufacturing of HBM products, spot prices of DDR5 products have actually experienced sporadic hikes for a while. Mainstream die DDR4 1Gx8 2666 MT/s saw a price increase of 1.36% this week (US$1.835 to US$1.860).

NAND Flash Spot Price:

Module houses have started adopting even more aggressive pricing strategies to effectively control their inventory, though overall transactions are sitting on the enervated end due to weakening market demand. TrendForce believes that inventory pressure would continue to bring down spot prices, which dropped to US$3.302 for 512Gb TLC wafers this week at a 0.21% reduction.

Driven by memory giants ramping up high-bandwidth memory (HBM) production, according to a report from Korean media outlet TheElec, ASMPT, a back-end equipment maker, has supplied a demo thermal compression (TC) bonder for Micron’s HBM production.

TC bonders play a pivotal role in HBM production by employing thermal compression to bond and stack chips on processed wafers, thereby significantly influencing HBM yield.

ASMPT is reportedly collaborating with the US memory giant to co-develop a TC bonder for use in HBM4 production. Notably, ASMPT has supplied TC bonders to SK Hynix as well and plans to deliver more units later in the year.

Micron is also procuring TC bonders from Shinkawa and Hanmi Semiconductor for the production of HBM3e. However, as per the same report citing sources, Shinkawa has its handful in supplying the bonders to its largest customer, so Micron added Hanmi Semiconductor as a secondary supplier.

In addition to Micron, Samsung Electronics and SK Hynix have developed distinct supply chains for TC bonders. Samsung sources its equipment from Japan’s Toray and Sinkawa, as well as its subsidiary SEMES. In contrast, SK Hynix relies on Singapore’s ASMPT, HANMI Semiconductor, and Hanhwa Precision Machinery.

According to industry sources cited by The Chosun Daily, TC bonder orders driven by memory giants have been strong, as Samsung Electronics’ subsidiary SEMES has delivered nearly 100 TC bonders over the past year. Meanwhile, SK Hynix has inked a approximately $107.98 million contract with HANMI Semiconductor, which commands a 65% share of the TC bonder market.

Regarding the latest developments in HBM, TrendForce indicates that HBM3e will become the market mainstream this year, with shipments concentrated in the second half of the year. Currently, SK hynix remains the primary supplier, along with Micron, both utilizing 1beta nm processes and already shipping to NVIDIA.

According to TrendForce predictions, the annual growth rate of HBM demand will approach 200% in 2024 and is expected to double in 2025.

Read more

• [News] Rising HBM Production by Samsung and SK Hynix Energizes Korea’s TC Bonder Industry
• [News] Micron’s HBM Expansion at Full Throttle: Rumored to Expand in US, Malaysia Also an Option

(Photo credit: Micron)

Recently, it was reported that to meet the increasing demand for memory chips driven by the artificial intelligence (AI) boom, both Samsung Electronics and Micron set about ramping up their memory chip production capacity. Samsung plans to restart construction of the new Pyeongtaek plant (P5) infrastructure as early as 3Q24. Micron is building HBM testing and mass production lines at its headquarters in Boise, Idaho, U.S. and is considering producing HBM in Malaysia for the first time to meet the growing demand brought by the AI surge.

Samsung Restarts the Construction of P5 Plant

As per foreign media reports, Samsung has decided to restart the construction of the P5 infrastructure, which is expected to resume as early as 3Q24 and be completed in April 2027, though the actual date of starting production could be earlier.

Previously, P5 reportedly suspended construction at the end of January, which was said to be a temporary measure to coordinate progress, with investment not yet been finalized, as stated by Samsung at that time. Industry analysts interpret Samsung’s decision to resume P5 construction as a response to the AI-driven surge in demand for memory chip.

It is reported that the Samsung P5 plant is a large wafer fab with eight cleanrooms, while P1 to P4 only have four respectively, which makes Samsung’s plan to achieve large-scale production to meet market demand possible. However, no official announcement regarding the specific use of P5 has been disclosed so far.

According to Korean media reports, industry sources stated that Samsung held an internal management committee conference of the board of directors on May 30, during which they submitted and passed the agenda for the P5 infrastructure construction. The management committee was chaired by CEO and head of the DX division, Jong-hee Han, involving other members such as MX business head Noh Tae-moon, management support director Park Hak-gyu, and head of the memory business division Lee Jeong-bae.

Hwang Sang-joong, vice president and head of DRAM Product and Technology at Samsung, stated in March this year that HBM output for this year was expected to be 2.9 times that of last year. The company also announced its HBM roadmap, projecting that HBM shipment in 2026 would be 13.8 times the 2023 output, and by 2028, the annual HBM output would further increase to 23.1 times the 2023 level.

Micron Builds HBM Testing and Mass-Production Lines in the U.S.

On June 19, multiple media reported that Micron is building HBM testing and mass production lines at its headquarters in Boise, Idaho, and is considering producing HBM in Malaysia for the first time to meet the increased demand driven by the AI boom. Micron’s Boise wafer fab is reportedly to put into operation in 2025 and start DRAM production in 2026.

Previously, Micron announced plans to increase its HBM market share from the current “mid-single digits” to around 20% within a year. As of now, Micron has been expanding its memory capacity in various locations.

At the end of April, Micron officially announced that it had received USD 6.1 billion of government subsidies from the U.S. CHIPS and Science Act. These funds, along with additional state and local incentives, will support Micron in building a leading DRAM memory manufacturing plant in Idaho and two advanced DRAM memory manufacturing plants in Clay, New York.

The Idaho plant commenced construction in October 2023. Micron revealed that the plant is expected to run in 2025 and start DRAM production in 2026, with DRAM output increasing in line with industry demand. The New York project is in the phase of initial design, field study, and license application (NEPA application included). Construction of the wafer fab is expected to begin in 2025 and production in 2028, which will increase depending on market demand over the next decade. The press release noted that the U.S. government’s subsidies will support Micron’s plan to invest around USD 50 billion of total capital expenditures to lead domestic memory manufacturing by 2030.

In May, Japanese media Nikkan Kogyo Shimbun reported that Micron will pour JPY 600 to 800 billion to build an advanced DRAM chip plant using EUV lithography in Hiroshima, Japan. Construction is expected to start in early 2026 and be completed in late 2027 at the earliest. Japan had previously approved up to JPY 192 billion of subsidies to support Micron’s plant construction and next-generation chip production in Hiroshima.

The new Micron plant in Hiroshima will be located near the existing Fab 15, focusing on DRAM production, excluding back-end packaging and testing, with priority given to the fabrication of HBM products.

In October 2023, Micron inaugurated its second smart (Advanced assembly and test) plant in Penang, Malaysia, with an initial investment of USD 1 billion. Following the completion of the first plant, Micron allocated an additional USD 1 billion to expand the second smart plant, expanding its building area to 1.5 million square feet.

(Photo credit: Samsung)

According to a report by Korean media outlet Business Korea, SK Hynix recently shared its latest breakthrough on its 3D DRAM at VLSI 2024 last week, announcing that the manufacturing yield of its 5-layer stacked 3D DRAM has reached 56.1%.

This means that out of roughly 1,000 3D DRAM units manufactured on a single test wafer, about 561 functional devices were successfully manufactured, the report further explains. The experimental 3D DRAM exhibits characteristics similar to the currently used 2D DRAM, marking the first time SK Hynix has disclosed specific numbers and characteristics of its 3D DRAM development.

However, SK Hynix also noted that while 3D DRAM holds great potential, a significant amount of development is still required before it can be commercialized. The memory giant also reportedly pointed out that unlike the stable operation of 2D DRAM, 3D DRAM exhibits unstable performance characteristics, and stacking 32 to 192 layers of memory cells is necessary for widespread use.

3D DRAM is also a key development area for other major memory manufacturers like Samsung Electronics and Micron. Samsung Electronics has successfully stacked 3D DRAM up to 16 layers and plans to mass-produce 3D DRAM around 2030. Micron currently holds 30 patents related to 3D DRAM, and if there are breakthroughs in 3D DRAM technology, it could produce better DRAM products than existing ones without the need for EUV equipment.

The DRAM market remains highly concentrated, currently dominated by key players such as Samsung Electronics, SK Hynix, and Micron Technology, collectively holding over 96% of the entire market share.

Read more

• [News] Samsung and SK hynix to Implement Hybrid Bonding with 3D DRAM
• [News] The Quiet Beginning of the 3D DRAM Market Share Battle

(Photo credit: SK Hynix)