As reported by China’s Jiwei on October 2nd, Samsung has revealed that its chip manufacturing division has secured an order from AI chip client Tenstorrent to produce chips utilizing its cutting-edge 4nm process.

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According to a report by Taiwan’s Economic Daily, TSMC is set to hold its Q3 earnings conference on October 19th. The market is eagerly anticipating insights from the company’s top executives on six key areas: the latest semiconductor market outlook, Q3 financial forecasts, the status of 3-nanometer chip orders, progress in advanced packaging expansion, capital expenditure updates, and the latest developments in the AI market.

During the conference, TSMC will also unveil its financial results for the previous quarter. Analysts are expecting TSMC’s Q3 consolidated revenue, when measured in USD, to grow by nearly 10%, with a chance of gross margin exceeding the company’s estimated median of 52.5%. This suggests that Q3 profits are likely to surpass those of Q2.

TSMC has already announced its combined revenue for July and August, which totaled NT$366.3 billion. Based on TSMC’s financial forecasts, Q3 consolidated revenue is expected to reach between $16.7 billion and $17.5 billion USD. Using an exchange rate of 30.8 NT dollars per USD, this translates to an expected consolidated revenue in NT dollars ranging from NT$514.4 billion to NT$539 billion.

In the first half of the year, TSMC’s capital expenditure was $9.94 billion in Q1 and $8.17 billion in Q2, totaling $18.11 billion. Securities analysts previously estimated that TSMC’s annual capital expenditure for this year could range from $32 billion to $36 billion USD, with the possibility of a decrease next year.

Some industry experts believe that as advanced manufacturing processes have advanced to 2 nanometers, the customer base for the latest processes has started to decrease. Looking at the 3-nanometer process that is already in mass production, only Apple is currently leading the adoption, while others like NVIDIA, Qualcomm, and MediaTek are expected to transition to the 3-nanometer process next year. As a result, TSMC is shifting its focus to expanding production in the more cost-effective advanced packaging sector, which is one of the key reasons for the decrease in TSMC’s capital expenditure.

Furthermore, TSMC is currently estimating that it will be the first to introduce an enhanced version of the 3-nanometer process next year, with expectations to transition to the 2-nanometer process by 2025, using a new Gate-All-Around (GAA) transistor architecture to replace the FinFET transistor architecture used for nearly a decade. This represents a significant step into a new generation of semiconductor technology. Additionally, capacity for advanced packaging is expected to double next year.

(Photo credit: TSMC)

In the era of increasing electric vehicle penetration and automotive electrification, the future of cars resembles smartphones on wheels, demanding substantial computing power for advanced autonomous systems. As a result, future vehicles equipped with high-end self-driving systems are akin to mobile data centers. With the growth rate of the consumer electronics market slowing down, Self-Driving System-on-Chip (SoC) has become a crucial avenue for IC design firms to expand.

TrendForce Insights:

• Sluggish Growth in Consumer Electronics Market Spurs IC Design Firms to Focus on Self-Driving SoCs

With the deceleration in growth of mainstream consumer electronics products like smartphones and PCs, IC design firms are venturing into the automotive sector, with Self-Driving SoCs emerging as a key area of expansion. Key competitors in this space include NVIDIA, Mobileye, Qualcomm, Ambarella, and Horizon Robotics. Qualcomm, with solutions spanning smart cockpits, ADAS, and V2X, showcases its advantage in entering the automotive sector after years of success in the smartphone market. To avoid sustained dominance by international giants in the Chinese smart cockpit market, Chinese companies such as Siengine Technology, Navinfo, Autochips, Semidrive, Huawei, Rockchip, and Unisoc are actively entering this market.

• NVIDIA and Qualcomm Offer Broad Computing Capabilities, While Mobileye, Ambarella, and Horizon Robotics Bring Unique Strengths

NVIDIA and Qualcomm offer Self-Driving SoCs with broad computing capabilities. Initially targeting Level 4 and above autonomous driving, NVIDIA has adjusted its focus to Level 3 and below due to regulatory delays. Its high-computing SoCs cater to the computing needs of both smart cockpits and self-driving systems, achieving a “cockpit-and-drive integrated” approach. Qualcomm’s products cover computing requirements from Level 1 to 4. Intel’s Mobileye emphasizes low power consumption and integrates image sensing hardware and software. Both Ambarella and Mobileye possess core computer vision technologies, while Horizon Robotics provides highly open platforms to developers, offering software development tools (AIDI) and cloud-based AI training platforms. Horizon Robotics is also poised to benefit from China’s domestic production plans.

• NVIDIA’s Collaboration with MediaTek (Dimensity) is Crucial for Hardware-Software Integration

In May 2023, NVIDIA announced a partnership with MediaTek (Dimensity) to target the automotive market, with a focus on smart cockpits. NVIDIA concentrates on the main computing chips for in-vehicle computers and essential software, while MediaTek specializes in peripheral audiovisual entertainment and V2X communication systems. In Dimensity Auto, NVIDIA’s GPU and software are integrated, enabling the development of smart cockpit solutions. However, the collaborative car SoC development between MediaTek and NVIDIA is expected to launch by the end of 2025, with mass production slated for 2026-2027, necessitating a wait-and-see approach for the results of this collaboration.

Currently, high-end vehicles have software lines of code (SLOC) exceeding 100 million lines, more than double that of a PC. Vehicles with Level 5 self-driving systems in the future could potentially have over 1 billion lines of code. In the era of Software Defined Vehicles (SDV), hardware-software integration will be the key to competitiveness for manufacturers. NVIDIA, dominating the AI market with its CUDA platform, is well aware of this fact. Consequently, the results of NVIDIA’s collaboration with MediaTek (Dimensity) are highly anticipated.

(Photo credit: MediaTek)

According to Taiwan’s Money DJ, the AI wave is showing no signs of slowing down. Led by NVIDIA, major players including AMD, Intel, and international chip giants are aggressively entering the AI arena, driving increasing demand for advanced packaging and advanced processes. Industry reports suggest that TSMC is reallocating several thousand personnel from its Hsinchu 12B plant to support its Longtan and Tainan 18B facilities in a bid to address the current urgent demands.

TSMC typically follows a process of initial research and development (R&D) stages for advancing its processes before handing them over to the mini-line teams and then proceeding to full-scale production. As a result, the 2nm process is slated for trial production in the second quarter of 2024, leaving a gap of approximately six months. It is rumored that TSMC is mobilizing staff from its Hsinchu 12B plant to provide support for the CoWoS-focused Longtan facility and the Tainan 18B plant, which is responsible for mass-producing the 3nm process, to address the immediate needs.

Equipment suppliers estimate that TSMC’s CoWoS production capacity is set to reach 12,000 to 14,000 wafers per month by the end of this year, with a projected doubling of production by 2024. By the end of that year, it is expected to reach at least 26,000 wafers per month, potentially even surpassing 30,000 wafers. Meanwhile, for the 3nm family, in addition to Apple and MediaTek, AMD, NVIDIA, Qualcomm, and even Intel are confirmed to adopt the N3 family of processes.

(Photo credit: TSMC)

According to a report by Taiwan’s Money DJ, there’s good news from TSMC regarding its 3nm node. Sources within the supply chain have disclosed that the number of new chip designs using the 3nm process, known as “New Tape-Outs” (NTOs), has surged. It’s confirmed that customers including MediaTek, AMD, NVIDIA, and Qualcomm will follow in Apple’s footsteps for mass adoption of the 3nm process in the next year (2024) and the subsequent year. By the second half of next year, the monthly production capacity for the 3nm family, including N3E, will increase from the current approximately 60,000 wafers to 100,000 wafers.

According to publicly available information from TSMC, the company began volume production of its first 3nm process node, N3, in the second half of last year. The enhanced version of the 3nm process, N3E, started production in the latter half of this year. There will also be extensions to the 3nm process, including N3P, N3S, and N3X. This year, Apple’s high-end A17 Pro chip for its iPhones was based on the initial N3 process.

Both TSMC and MediaTek previously announced their collaboration, with MediaTek developing new Dimensity products using TSMC’s 3nm process. The design phase, known as “Tape Out,” has been successfully completed, and mass production is scheduled for next year. Industry reports indicate that aside from Apple and MediaTek, AMD, NVIDIA, and Qualcomm are also confirmed to adopt the N3 family of processes. Intel is also on the list, with mass production planned for the year after next.

TSMC’s first-generation 3nm process currently has a monthly production capacity of about 60,000 wafers, serving Apple as its primary customer. TSMC has initiated a program known as “Continuous Improvement Plan” (CIP) for the 3nm process, referred to as N3B in the industry. Supply chain sources suggest that N3B’s capacity will be integrated into subsequent extended process nodes, such as N3E, which is expected to attract more customers. It is estimated that the overall 3nm monthly production capacity will reach 100,000 wafers by the second half of next year.

(Photo credit: TSMC)