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According to a report from The Register, DPU developer Xockets recently filed a lawsuit, accusing AI chip giant NVIDIA, Microsoft, and intellectual property risk management company RPX of colluding to avoid paying Xockets the fees it is owed, violating federal antitrust laws, and intentionally infringing on its patents.
The report states that in addition to seeking monetary compensation, Xockets is also requesting an injunction. If granted, this injunction would prevent NVIDIA from selling its upcoming Blackwell architecture GPUs.
Per Reuter’s report, Xockets, founded in 2012, claims that its invention, the Data Processing Unit (DPU), plays a critical role in some of NVIDIA’s and Microsoft’s systems. The company states that its technology helps offload and accelerate tasks that would otherwise place a heavy burden on server processors.
Reportedly, Xockets founder Parin Dalal began filing a series of DPU technology patents in 2012. These patents describe architectures used for the linear downloading, acceleration, and isolation of data-intensive computational operations from server processors.
Xockets claims that its DPU-related patents cover various applications including cloud computing, machine learning, security, network overlay, stream data processing, and cloud computing architectures. Xockets alleges that Microsoft and Mellanox, which was acquired by NVIDIA in 2020, which was acquired by NVIDIA in 2020, have infringed on these patents.
In a recent statement, Xockets claimed that NVIDIA has utilized DPU technology patented by Xockets, allowing NVIDIA to monopolize the AI server market using its GPUs. Meanwhile, Microsoft has allegedly monopolized the AI platform market using NVIDIA GPUs.
Xockets further claimed that it has made effort to engage in sincere negotiations with NVIDIA and Microsoft, but these attempts have been rejected.
Xockets’ lawsuit reveals that it actually demonstrated the relevant technology to Microsoft in 2016, and the technology was subsequently adopted by Mellanox within the same year for cloud computing downloads used by Redmond and other clients.
Additionally, NVIDIA’s ConnectX smartNIC, BlueField DPU, and NVLink switch, which are crucial for extending AI training and inference deployments across large GPU clusters, are said to infringe on Xockets’ patents.
Regarding this matter, NVIDIA has declined to comment, while Xockets’ spokesperson has also not provided any additional explanation.
The report highlights that Microsoft and NVIDIA may not be Xockets’ only targets but are at least the most profitable ones. Other companies, such as Broadcom, Intel, AMD, Marvell, Napatech, and Amazon, are also actively developing products similar to NVIDIA’s ConnectX, BlueField, and NVLink.
Regarding the lawsuit, the judge overseeing the case has approved a preliminary injunction hearing to be held on September 19.
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(Photo credit: Xockets)
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As silicon photonics has become a key technology in the AI era, semiconductor giants, including Intel and TSMC, have joined the battlefield. Now another tech giant has engaged in the war, while U.S. chip giant AMD is reportedly seeking silicon photonics partners in Taiwan, according to local media United Daily News.
According to the report, AMD has reached out to Taiwanese rising stars in the sector, including BE Epitaxy Semiconductor and best Epitaxy Manufacturing Company. The former focuses on the design, research and development of silicon photonics platforms, while the latter possesses MOCVD machines to produce 4-inch and 6-inch epitaxy wafers.
Regarding the rumor, AMD declined to comment. Recently, the AI chip giant announced a USD 4.9 billion acquisition of server manufacturer ZT Systems to strengthen its AI data center infrastructure, with the aim to further enhance its system-level R&D capability. Now it seems that AMD is also eyeing to set foot in the market, as silicon photonics is poised to be a critical technology in the future.
Earlier in July, AMD is said to establish a research and development (R&D) center in Taiwan, which will focus on several advanced technologies, including silicon photonics, artificial intelligence (AI), and heterogeneous integration.
Here’s why the technology matters: As chipmakers keep pushing the boundaries of Moore’s Law, leading to increased transistor density per unit area, signal loss issues inevitably arise during transmission since chips rely on electricity to transmit signals. Silicon photonics technology, on the other hand, by replacing electrical signals with optical signals for high-speed data transmission, successfully overcomes this challenge, achieving higher bandwidth and faster data processing.
On September 3, a consortium of more than 30 companies, including TSMC, announced the establishment of the Silicon Photonics Industry Alliance (SiPhIA) at SEMICON.
According to a previous report by Nikkei, TSMC and its supply chain are accelerating the development of next-generation silicon photonic solutions, with plans to have the technology ready for production within the next three to five years.
AMD’s major rival, NVIDIA, is reportedly collaborating with TSMC to develop optical channel and IC interconnect technologies.
On the other hand, Intel has been developing silicon photonics technology for over 30 years. Since the launch of its silicon photonics platform in 2016, Intel has shipped over 8 million photonic integrated circuits (PICs) and more than 3.2 million integrated on-chip lasers, according to its press release. These products have been adopted by numerous large-scale cloud service providers.
Interestingly enough, Intel has also been actively collaborating with Taiwanese companies in the development of silicon photonics, United Daily News notes. One of its most notable partners is LandMark Optoelectronics, which supplies Intel with critical upstream silicon photonics materials, such as epitaxial layers and related components.
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(Photo credit: AMD)
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According to a report from tom’s Hardware, Jack Huynh, AMD’s senior vice president and general manager of its Computing and Graphics Business Group, announced at IFA 2024 in Berlin that AMD will unify its consumer microarchitecture “RDNA” and data center microarchitecture “CDNA” under a single name: “UDNA.” This move is expected to compete with NVIDIA’s CUDA ecosystem.
Previously, AMD used the same architecture for both gaming and compute GPUs, known as “GCN.” However, since 2019, the company decided to split the microarchitectures into two distinct designs: RDNA for consumer gaming GPUs and CDNA for data center computing.
Reportedly, Jack Huynh stated that the consolidation into the unified “UDNA” architecture will make it easier for developers to work with, eliminating the need to choose between different architectures without added value.
When asked if future desktop GPUs will have the same architecture as the MI300X, Huynh mentioned that this is part of a strategy to unify from cloud to client. With a single team working on it, the company is making efforts to standardize, acknowledging that while there may be minor conflicts, it is the right approach.
While high-end chips can establish a market presence, the report from tom’s hardware further addressed that the ultimate success depends on software support. NVIDIA built a strong moat 18 years ago with its CUDA architecture, and one of its fundamental advantages is the “U” in CUDA, which stands for Unified.
NVIDIA’s single CUDA platform serves all purposes, using the same underlying microarchitecture for AI, HPC, and gaming.
Jack Huynh revealed that CUDA has around 4 million developers, and his goal is to pave the way for AMD to achieve similar success.
However, AMD relies on the open-source ROCm software stack, which depends on support from users and the open-source community. If AMD can simplify this process, even if it means optimizing for specific applications or games, it will help accelerate the ecosystem.
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(Photo credit: AMD)
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According to a report from Commercial Times citing sources, it’s revealed that NVIDIA has executed changes to the Blackwell series’ 6-layer GPU mask. Therefore, the process can now proceed without re-taping out, as production delays being minimized.
The report noted that NVIDIA’s updated version of B200 is expected to be completed by late October, allowing the GB200 to enter mass production in December, with large-scale deliveries to ODMs expected in the first quarter of next year.
Previously, as per a report from The Information, NVIDIA’s GB200 was said to be experiencing a one-quarter delay in mass shipments. Another report from the Economic Daily News further suggested that the problem likely lies in the yield rates of advanced packaging, which mainly affected the non-reference-designed GB200 chips.
Industry sources cited by Commercial Times addressed that NVIDIA’s Blackwell chip used to be facing instability in metal layers during the HV process, which was then resolved by July.
In addition, since the issue reportedly occurred in the back-end-of-line process, a new tape-out was deemed unnecessary. Still, as CoWoS-L capacity remains a bottleneck, the advanced packaging for GB200 this year is expected to adopt CoWoS-S.
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(Photo credit: NVIDIA)
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After its 8-Hi HBM3e entered mass production in February, Micron officially introduced the 12-Hi HBM3e memory stacks on Monday, which features a 36 GB capacity, according to a report by Tom’s Hardware. The new products are designed for cutting-edge processors used in AI and high-performance computing (HPC) workloads, including NVIDIA’s H200 and B100/B200 GPUs.
It is worth noting that the achievement has made the US memory chip giant almost on the same page with the current HBM leader, SK hynix. Citing Justin Kim, president and head of the company’s AI Infra division at SEMICON Taiwan last week, another report by Reuters notes that SK hynix is set to begin mass production of its 12-Hi HBM3e chips by the end of this month.
Samsung, on the other hand, is said to have completed NVIDIA’s quality test for the shipment of 8-Hi HBM3e memory, while the company is still working on the verification of its 12-Hi HBM3e.
Micron’s 12-Hi HBM3e memory stacks, according to Tom’s Hardware, feature a 36GB capacity, a 50% increase over the previous 8-Hi models, which had 24GB. This expanded capacity enables data centers to handle larger AI models, such as Meta AI’s Llama 2, with up to 70 billion parameters on a single processor. In addition, this capability reduces the need for frequent CPU offloading and minimizes communication delays between GPUs, resulting in faster data processing.
According to Tom’s Hardware, in terms of performance, Micron’s 12-Hi HBM3e stacks deliver over 1.2 TB/s. Despite offering 50% more memory capacity than competing products, Micron’s HBM3e consumes less power than the 8-Hi HBM3e stacks.
Regarding the future roadmap of HBM, Micron is said to be working on its next-generation memory solutions, including HBM4 and HBM4e. These upcoming memory technologies are set to further enhance performance, solidifying Micron’s position as a leader in addressing the increasing demand for advanced memory in AI processors, such as NVIDIA’s GPUs built on the Blackwell and Rubin architectures, the report states.
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(Photo credit: Micron)