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Samsung Electronics has received the first client for its 2nm process. According to the official press release from Samsung on July 9th, Samsung Electronics will provide turnkey semiconductor solutions using the 2nm process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Japanese AI company Preferred Networks.
Per a previous report by SamMobile, Samsung is set to commence mass production of 2nm chips for mobile devices by 2025. The initial SF2 2nm process will be ready next year, followed by an enhanced version, SF2P, in 2026. In addition, according to Samsung’s press release, its latest 2nm process, SF2Z, has incorporated optimized backside power delivery network (BSPDN) technology, and will enter mass production in 2027.
Preferred Networks was founded in 2014 and is in the field of AI deep learning development. The company has attracted significant investments from major Japanese industrial enterprises such as Toyota, NTT, and Fanuc. The order placed with Samsung’s foundry division for 2-nanometer AI chips also includes HBM and advanced packaging.
As per the official release, Junichiro Makino, VP and Chief Technology Officer (CTO) of Computing Architecture at Preferred Networks stated that as Samsung Electronics’ 2nm GAA process will significantly support Preferred Networks’ ongoing efforts to build highly energy-efficient, high-performance computing hardware that meets the ever-growing computing demands from generative AI technologies, especially large language models.
Driven by the strong demand from AI chips, Samsung expects the revenue of global chip industry to grow to USD 778 billion by 2028, according to Siyoung Choi, President and General Manager of the Foundry Business in Samsung, the report noted.
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(Photo credit: Samsung)
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As the demand for AI chips surges, orders for thermal compression (TC) bonders, which play a critical role in HBM (high-bandwidth memory) manufacturing, are also heating up.
To further gain market momentum, South Korean chip packaging equipment manufacturer Hanmi Semiconductor plans to launch 2.5D big die TC bonder models in the second half of 2024, while increasing its annual sales target for this year to 650 billion won (USD 471 million), according to the latest report by the Korea Economic Daily.
Citing Kwak Dong-shin, vice chairman and CEO of Hanmi Semiconductor, the report notes that the company eyes strong revenue growth in the next two years, projecting 1.2 trillion won (USD 870 million) in sales for 2025, and 2 trillion won (USD 1.45 billion) for 2026.
TC bonders play a pivotal role in HBM production by employing thermal compression to bond and stack chips on processed wafers, thereby significantly influencing HBM yield. According to the report, Hanmi plans to introduce several upgraded models in the next two years, including 2.5D big die TC bonders in the second half of this year, mild hybrid bonders in the latter half of 2025, and hybrid bonders in 2026.
Memory giants have developed their own ecosystems to secure TC bonders’ supply. The report notes that Hanmi has been providing its TC bonders to SK hynix, while the latter is a major HBM supplier to Nvidia. In addition, the company also entered into a 22.6 billion won agreement with Micron in April.
Whether in the near future, Hanmi Semicodutor would be able to finalize similar contracts with Samsung, another memory heavyweight, remains to be seen. For now, Samsung sources its equipment from Japan’s Toray and Sinkawa, as well as its subsidiary SEMES.
Hanmi Semiconductor produces TC bonders at its six factories located in Incheon, where its headquarters are situated. The report indicates that it aims to increase the capacity of its newest, the sixth factory from 264 units of TC bonders annually this year to 420 units next year, which makes it the largest annual capacity for TC bonder producers worldwide.
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(Photo credit: Hanmi Semicondutor)
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South Korean media reports that the main suppliers of artificial intelligence (AI) chip packaging are concentrated in TSMC and ASE Technology Holding Co., which have been actively expanding production to meet the growing market demand. Despite efforts to develop technology and invest, South Korean companies like Samsung Electronics have not been able to narrow the gap with TSMC and ASE.
According to the Chosun Ilbo, industry insiders indicated that TSMC is expanding its advanced packaging (CoWoS) capacity by selecting a site in the southern region, while ASE also announced the construction of a second packaging and testing factory in California, USA, and plans to build another in Mexico. The rapid growth of the AI chip market highlights the increasing importance of semiconductor packaging and testing. As the benefits of semiconductor process miniaturization diminish and production costs rise, advanced packaging that can connect multiple components has become an ideal alternative solution. Some organizations predict that the semiconductor packaging market is expected to grow by more than 10% annually and expand to USD 90 billion by 2030.
Taiwanese companies like TSMC and ASE benefit a lot, almost monopolizing the contract manufacturing of AI chips for companies like NVIDIA and AMD. In terms of chip manufacturing, TSMC aims to double its CoWoS capacity from the previous year to meet increasing orders. TSMC recently announced plans to build two new advanced packaging factories in the southwest. The construction of the first factory was paused due to the discovery of ancient artifacts, but TSMC quickly sought a new site and announced an expansion of CoWoS facilities investment by 2025.
ASE, serving customers including Qualcomm, Intel and AMD, is also striving to increase equipment investment to meet rising orders. ASE, with the highest market share in the semiconductor packaging and testing field, is increasing its capacity and considering building a factory in Japan to match the growing demand. ASE’s CEO Wu Tianyu stated that they are looking for a location in Japan with a solid semiconductor ecosystem for the new factory.
Samsung has also announced packaging investment plans. The company intends to raise the investment in the new plant in Taylor, Texas, USA from USD 17 billion to more than USD 40 billion for the construction of an advanced packaging research and development center and facilities, in which it will allocate over KRW 2 trillion annually to expand advanced packaging production lines.
South Korean semiconductor back-end packaging and testing (OSAT) companies such as Hana Micron and Nepes are also striving for AI chip packaging orders based on technical development. Hana Micron, the leading OSAT company in South Korea, has announced its commitment to developing 2.5D AI semiconductor packaging. Nepes is developing Package on Package (PoP) technology, which integrates different semiconductors into one chip, with a target for commercial mass production in the second half of 2025.
Despite the efforts of South Korean companies, it is difficult to narrow the gap with Taiwanese companies in the short term. Taiwanese companies have actively developed advanced semiconductor packaging and commercializing CoWoS at a earlier time, while South Korean packaging companies lag in accumulated technologies. South Korean industry insiders point out that TSMC and ASE have been collaborating for over 30 years. Therefore, as TSMC secured a large number of AI chip orders, it would prove a boon to Taiwan’s packaging ecosystem. In contrast, South Korea’s packaging industry, which has long focused on the memory production market, still has a long way to go to expand its market and even compete with Taiwanese companies.
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Unlike other major semiconductor manufacturers, including Intel and TSMC, memory giant Micron is not in a hurry to adopt EUV (extreme ultraviolet) lithography for its DRAM production. However, according to a latest report from Technews, in 2024, Micron plans to begin trial production using EUV on its 1γ (1-gamma) process technology at 10-nm level.
The report also notes that currently, all of the company’s mass-produced products are made using DUV (deep ultraviolet) lithography. However, after entering trial production in 2024 with EUV, Micron also anticipates that this process technology will enter large-scale production in 2025.
Another Korean memory giant, Samsung, announced in 2020 that it has successfully shipped one million of the industry’s first 10nm-class (D1x) DDR4 (Double Date Rate 4) DRAM modules based on EUV technology.
In 2021, SK hynix has started mass production of its 10-nm DRAM chips using EUV technology, and is said to invest USD 1.5 billion this year to acquire 8 advanced EUV lithography machines, according to an earlier report from Disc Manufacturer.
Previously, Micron CEO Sanjay Mehrotra stated during an earnings call that the trial production of 10-nm-class 1γ (1-gamma) process DRAM using EUV lithography is progressing well, and they are on track to achieve mass production by 2025 as planned. Currently, Micron is developing the 10-nanometer-class 1γ process DRAM manufacturing technology using EUV lithography at its Hiroshima plant in Japan, which is also the first site for the trial production of 1γ memory, according to Technews.
In order to meet the strong demand for high-performance memory chips driven by AI, Micron is reportedly building a pilot production line for HBM in the U.S. and is considering producing HBM in Malaysia for the first time.
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Thanks to the rebound in memory chip demand amid accelerated global AI development, Samsung Electronics reported its strongest sales and profit growth in years. According to its financial guidance announced on July 5th, the semiconductor giant projects its operating profit to grow more than 15-fold YoY to 10.4 trillion won (USD 7.5 billion) in its preliminary results for the April-June quarter, outstripping market expectations.
In addition, the company expects its sales to increase by approximately 23% to 74 trillion won. According to a report from Bloomberg, this marks the largest rise since the peak levels seen during the Covid-19 pandemic in 2021.
The forecast is way better than LSEG SmartEstimate’s earlier forecast, which expected Samsung Electronics’ operating profit for Q2 2024 to reach 8.8 trillion won (roughly USD 6.34 billion).
Samsung is scheduled to release final earnings, including divisional breakdowns, on July 31.
It is also worth noting that Samsung is releasing its results just days ahead of planned three-day walkouts by union organizers, starting from July 8th. According to Bloomberg, the move would involve over 28,000 members, including those at crucial chip plants, due to a wage dispute. The extent of participation in Monday’s walkout remains uncertain at this time.
Citing market sources, the report noted that Samsung’s Q2 financial results highlight the memory market’s robust recovery this year from a sharp decline post-Covid, driven by increased demand from data centers and AI development, which contributes to a turnaround in Samsung’s largest division, which had incurred losses the previous year.
According to TrendForce, Samsung’s global share of DRAM and NAND Flash output in 2023 was 46.8% and 32.4%, respectively. An earlier report by the Korea Economic Daily indicated that Samsung’s HBM production has been sold out in 2024.
According to the latest forecast by Trendforce, the HBM market is poised for robust growth, driven by significant pricing premiums and increased capacity needs for AI chips. HBM prices are expected to Increase by 5–10% in 2025.
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(Photo credit: Samsung)