Samsung Electronics’ management has made a significant decision to invest in graphics processing units (GPUs). According to a report from Business Korea reported on June 18th, while the details of Samsung’s GPU investment have not been disclosed, this decision is noteworthy as it differs from their usual focus on memory and foundry services.

Per Business Korea citing Samsung Electronics’ governance report, the management committee approved the “GPU Investment Proposal” in March. The committee includes senior executives such as Han Jong-Hee, head of the Device eXperience (DX) division, as well as the presidents of the Mobile Experience (MX) and Memory Business divisions. Reportedly, this marks the first time since the agenda items were made public in 2012 that Samsung has decided to invest in GPUs, sparking speculation that the company aims to enhance its competitiveness in the GPU sector.

Industry sources cited in the same report interpret this investment as an internal strategy for Samsung to leverage GPUs to innovate semiconductor processes, rather than to develop or manufacture GPUs. At the “GTC Conference” held in March 2024, Samsung announced its collaboration with NVIDIA to develop AI-based digital twins, aiming to achieve full automation of semiconductor plants by 2030.

Reportedly, Samsung’s newly constructed high-performance computing (HPC) center in Hwaseong was completed in April 2024. This center houses a vast array of servers and network equipment necessary for semiconductor design, indicating a significant investment in GPUs.

According to the report, Samsung’s newly constructed high-performance computing (HPC) center in Hwaseong was completed in April 2024. This center houses a vast array of servers and network equipment necessary for semiconductor design, indicating a significant investment in GPUs.

Per another report from Bloomberg on June 4th, NVIDIA CEO Jensen Huang, during a briefing at the COMPUTEX, told reporters that NVIDIA is evaluating HBM provided by both Samsung and Micron Technology. Huang mentioned that there is still some engineering work needed to be completed, expressing the desire for it to have been finished already.

As per Huang, though Samsung hasn’t failed any qualification tests, its HBM product required additional engineering work. When asked about Reuter’s previous report concerning overheating and power consumption issues with Samsung’s HBM, Huang simply remarked, “there’s no story there.”

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• [News] Reasons for Samsung’s HBM Chips Failing Nvidia Tests Revealed, Reportedly Due to Heat and Power Consumption Issues
• [News] Samsung Reportedly Establishes New HBM Team, Looking to Improve AI Chip Yield

(Photo credit: Samsung)

South Korean patent management company Mimir IP, which acquired approximately 1,500 chip-related patents from SK hynix in May, has filed a complaint against Micron, accusing the US memory giant of infringing on its chip-related patents, the Korea Economic Daily reported. Sources suggested that if Mimir wins the case, the damages could amount to as much as USD 480 million.

The Korea Economic Daily learned that the lawsuit, filed on June 3, also targets four other companies that use Micron products: Tesla, Dell, HP, and Lenovo, while the patents involved are reportedly related to circuits, voltage measurement devices, and non-volatile memory devices.

The case has been filed with both the US District Court for the Eastern District of Texas and the US International Trade Commission (ITC), which marks the first instance of a Korea-based non-practicing entity (NPE) that acquired patents from domestic chipmakers filing a suit against a US semiconductor company.

Officials from the involved parties were unavailable for comment, the report said.

SK hynix, the current market leader in HBM, has been facing heated competition from Samsung and Micron, both of which have recently developed their HBM3e chips, trying to win favor from the world’s leading AI chip designer, NVIDIA. Now it seems that the battleground for industry dominance is expanding from technology competition to patent disputes.

It is worth noting that transferring patents to non-practicing entity (NPE) has become more and more popular, as it seems to be a preliminary measure for companies to prepare for legal disputes with its competitors, the report noted.

The Big Three in the memory industry have made similar moves on their patent strategy recently. According to the report, Micron transferred over 400 chip-related patents to Lodestar Licensing Group in March, 2023, followed by Samsung, which transferred 96 US chip patent rights, including the right to file patent infringement complaints, to IKT, an affiliate of Samsung Display, in June 2023.

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• [News] HBM Supply Shortage Prompts Micron’s Expansion, Expected Schedule in Japan and Taiwan Revealed
• [News] The HBM4 Battle Begins! Memory Stacking Challenges Remain, Hybrid Bonding as the Key Breakthrough

(Photo credit: SK hynix)

Taiwanese panel company Innolux have said to be involving in collaborating with leading global memory manufacturers. According to a report from the Economic Daily News, plans are underway to repurpose its 4th Plant in Tainan (5.5-generation LCD panel plant) for AI-related semiconductor applications, specifically targeting back-end packaging.

Sources cited in the report indicate that, based on the strategies of the top three global memory manufacturers, the partner in this collaboration is likely a memory manufacturer that already has a presence in Taiwan and seeks to expand its capacity there. Innolux’s advantage lies in its advanced panel-level fan-out packaging (FOPLP), which is poised to make a substantial impact in the AI field. However, these reports have not been confirmed by Innolux or any global memory giants.

Regarding the 4th Plant developments at Tainan, Innolux stated on June 16 that, based on flexible strategic planning principles, the company continues to optimize production configurations and enhance overall operational efficiency. Some production lines and products are being adjusted to streamline and strengthen the group’s layout and development.

The surge in AI demand has driven the need for advanced chip heterogenous integration and high-end packaging technologies to meet the high-performance application requirements of AI devices. Targeting these opportunities, Innolux has reportedly repurposed its Tainan 3.5-generation and 4-generation LCD panel production lines for semiconductor-related uses, including FOPLP and X-ray sensors.

Sources cited in the report also revealed that Innolux’s transformation efforts are making progress. After closing the 5.5-generation LCD panel production at the 4th Plant last year, the company has gradually reassigned staff to other facilities. To revitalize capacity and assets, Innolux has been in close contact with leading global memory manufacturers, aiming to develop AI-related applications.

Currently, the three major global memory manufacturers are actively developing high-bandwidth memory (HBM) for AI servers. South Korea’s SK Hynix is the most proactive in collaborating with Taiwanese companies. SK Hynix has partnered with TSMC to aggressively target the AI market. As per a report from Korean media outlet The Korea Herald,  SK Group Chairman Chey Tae-won recently visited TSMC Chairman C.C. Wei to ensure continued close cooperation on the next-generation HBM.

On the other hand, Micron has established memory production in Taiwan but does not yet have HBM capacity for AI servers in the region. Meanwhile, Samsung does not have direct AI cooperation with Taiwanese companies in the memory sector.

Sources cited in the report from Economic Daily News indicate that Innolux is engaging with one of these three major international memory manufacturers, focusing on new semiconductor applications. As Innolux is advancing into the promising glass substrate packaging business through panel-level fan-out packaging, this technology is expected to be combined with memory applications for AI development. Therefore, the developments at its 4th Plant in Tainan are receiving considerable attention.

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• [News] Samsung Reportedly to Challenge Apple/TSMC with 3nm Exynos W1000
• [News] MediaTek Announces 4nm Dimensity 7300 Series Chips, Supporting Foldable Devices

(Photo credit: Innolux)

According to a report by the Korean media outlet The Chosun Daily on June 16th, Samsung’s “Galaxy Tab S10” series tablets will be equipped with MediaTek’s Dimensity 9300+ application processor (AP) from Taiwan, marking the first instance of MediaTek’s AP being adopted by Samsung’s flagship tablet.

The report highlights that MediaTek’s APs have primarily been used in Samsung’s mid-to-low-end smartphones. The decision to use MediaTek’s AP in the Galaxy Tab S10 series, instead of Qualcomm’s or Samsung’s own APs, is a significant shift for Samsung.

The sources cited in the report believe that Samsung’s move is a butterfly effect caused by TSMC’s price hikes. TSMC’s price increases have potentially led to a rise in the cost of Qualcomm’s Snapdragon chips, which are manufactured by TSMC. After price negotiations, Samsung’s Mobile Communications Business (MX) decided to equip the Snapdragon 8 Gen 3 chips only in the Galaxy Tab S10 Ultra series, while using MediaTek’s Dimensity chips in the Plus and base models.

The same report further indicates that from Samsung’s perspective, choosing Dimensity to reduce costs and diversify the supply chain is a sensible decision. However, for Samsung’s foundry division which manufactures Exynos, this development is somehow unwelcome. While Exynos used to have price advantages over Snapdragon in supplying Samsung’s flagship products, the use of Dimensity jeopardizes Exynos’ competitive edge in its bargaining power for future flagship product pricing negotiations.

Samsung Electronics’ upcoming AP, the “Exynos 2500,” set for release next year, will also face similar challenges. With TSMC recently rumored to increase price for its 3nm process, costs for Qualcomm’s Snapdragon 8 Gen 4, slated for release in October, are expected to sharply increase. Industry source cited by the report further suggests the cost of this chip could rise from over USD 200 in the previous generation to more than USD 250.

TSMC Chairman C.C. Wei recently stated that, almost all companies interested in AI-related demand are willing to work with TSMC. From the yield rates obtained by customers, TSMC offers the best cost-effectiveness solutions, hence there is room for price increases. Per a report from Liberty Times, the wafer order prices for TSMC in 2025 are expected to be finalized in September and October this year.

Read more

• [News] Samsung Reportedly to Challenge Apple/TSMC with 3nm Exynos W1000
• [News] MediaTek Announces 4nm Dimensity 7300 Series Chips, Supporting Foldable Devices

(Photo credit: MediaTek)

In 2023, Samsung disclosed plans to launch its advanced three-dimensional (3D) chip packaging technology, which would be able to integrate memory and processors needed for high-performance chips, in much smaller sizes. Now, at the Samsung Foundry Forum in San Jose taken place in June, the tech giant made it public that it would introduce 3D packaging services for HBM within this year, according to the latest report by The Korea Economic Daily.

For now, HBM chips are predominantly packaged with 2.5D technology. Citing industry sources as well as personnel from Samsung, the company’s 3D chip packaging technology is expected to hit the market for HBM4, the sixth generation of the HBM family.

Samsung’s announcement regarding its 3D HBM packaing roadmap has been made after NVIDIA CEO Jensen Huang revealed Rubin at COMPUTEX 2024, the company’s upcoming architecture of its AI platform after Blackwell. The Rubin GPU will reportedly feature 8 HBM4, while the Rubin Ultra GPU will come with 12 HBM4 chips, targeting to be released in 2026.

Currently, Samsung’s SAINT (Samsung Advanced Interconnect Technology) platform includes three types of 3D stacking technologies: SAINT S, SAINT L, and SAINT D.

SAINT S involves vertically stacking SRAM on logic chips such as CPUs, while SAINT L involves stacking logic chips on top of other logic chips or application processors (APs). SAINT D, on the other hand, entails vertical stacking of DRAM with logic chips like CPUs and GPUs.

The Korea Economic Daily noted that unlike 2.5D technology, under which HBM chips are horizontally connected with a GPU on a silicon interposer, by stacking HBM chips vertically on top of a GPU, 3D packaging could further accelerate data learning and inference processing, and thus does not require a silicon interposer, a thin substrate that sits between chips to allow them to communicate and work together.

It is also understood that Samsung plans to offer 3D HBM packaging on a turnkey basis, according to the Korea Economic Daily. To achieve this, its advanced packaging team will vertically interconnect HBM chips produced by its memory business division, with GPUs assembled for fabless companies by its foundry unit, the report noted.

Regarding Samsung’s long-time rival, TSMC, the company’s Chip on Wafer on Substrate (CoWoS) has been a key enabler for the AI revolution by allowing customers to pack more processor cores and HBM stacks side by side on one interposer. TSMC also made similar announcement in May, reportedly utilizing 12nm and 5nm process nodes in manufacturing HBM4, according to a report by AnandTech.

Read more

• [News] TSMC Reportedly Prepares Next-generation HBM4 Manufacturing, Utilizing 12nm and 5nm Process
• [News] Samsung Accelerates 3D Packaging with Hybrid Bonding Production Line in Korean Advanced Packaging Hub

(Photo credit: Samsung)