In 2023, Samsung disclosed plans to launch its advanced three-dimensional (3D) chip packaging technology, which would be able to integrate memory and processors needed for high-performance chips, in much smaller sizes. Now, at the Samsung Foundry Forum in San Jose taken place in June, the tech giant made it public that it would introduce 3D packaging services for HBM within this year, according to the latest report by The Korea Economic Daily.

For now, HBM chips are predominantly packaged with 2.5D technology. Citing industry sources as well as personnel from Samsung, the company’s 3D chip packaging technology is expected to hit the market for HBM4, the sixth generation of the HBM family.

Samsung’s announcement regarding its 3D HBM packaing roadmap has been made after NVIDIA CEO Jensen Huang revealed Rubin at COMPUTEX 2024, the company’s upcoming architecture of its AI platform after Blackwell. The Rubin GPU will reportedly feature 8 HBM4, while the Rubin Ultra GPU will come with 12 HBM4 chips, targeting to be released in 2026.

Currently, Samsung’s SAINT (Samsung Advanced Interconnect Technology) platform includes three types of 3D stacking technologies: SAINT S, SAINT L, and SAINT D.

SAINT S involves vertically stacking SRAM on logic chips such as CPUs, while SAINT L involves stacking logic chips on top of other logic chips or application processors (APs). SAINT D, on the other hand, entails vertical stacking of DRAM with logic chips like CPUs and GPUs.

The Korea Economic Daily noted that unlike 2.5D technology, under which HBM chips are horizontally connected with a GPU on a silicon interposer, by stacking HBM chips vertically on top of a GPU, 3D packaging could further accelerate data learning and inference processing, and thus does not require a silicon interposer, a thin substrate that sits between chips to allow them to communicate and work together.

It is also understood that Samsung plans to offer 3D HBM packaging on a turnkey basis, according to the Korea Economic Daily. To achieve this, its advanced packaging team will vertically interconnect HBM chips produced by its memory business division, with GPUs assembled for fabless companies by its foundry unit, the report noted.

Regarding Samsung’s long-time rival, TSMC, the company’s Chip on Wafer on Substrate (CoWoS) has been a key enabler for the AI revolution by allowing customers to pack more processor cores and HBM stacks side by side on one interposer. TSMC also made similar announcement in May, reportedly utilizing 12nm and 5nm process nodes in manufacturing HBM4, according to a report by AnandTech.

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• [News] TSMC Reportedly Prepares Next-generation HBM4 Manufacturing, Utilizing 12nm and 5nm Process
• [News] Samsung Accelerates 3D Packaging with Hybrid Bonding Production Line in Korean Advanced Packaging Hub

(Photo credit: Samsung)

After naming its new head for the semiconductor business in May, claiming to strengthen the company’s competitiveness in cutting-edge chips, Samsung has now disclosed its latest developments regarding AI chips. According to information from Reuters and Samsung’s press release, the company plans to provide one-stop solution for clients to expedite their production of AI chips, while its updated 2nm node with backside power delivery is expected to enter the market in 2027.

According to a report from Reuters, the semiconductor giant plans to provide a turn-key solution by integrating its leading services in memory chips, foundry, and chip packaging to capitalize on the AI surge. The production time needed for AI chips usually takes weeks, while under this scheme, it could potentially be reduced by approximately 20%.

Driven by the strong demand from AI chips, Samsung expects the revenue of global chip industry to grow to USD 778 billion by 2028, according to Siyoung Choi, President and General Manager of the Foundry Business in Samsung, the report noted.

On the other hand, the tech heavyweight has introduced on 13^th June its latest developments on 2nm and GAA technologies, as tools to empower its AI solutions.

According to Samsung’s press release, its latest 2nm process, SF2Z, has incorporated optimized backside power delivery network (BSPDN) technology, which places power rails on the backside of the wafer to eliminate bottlenecks between the power and signal lines, and thus does better in PPA (power, performance and area), IR drop and performance of HPC designs compared to SF2, its first-generation 2nm node.

Samsung targets mass production for SF2Z in 2027, while SF4U, a high-value 4nm variant, is slated for mass production in 2025. It also confirms that preparations for SF1.4 (1.4nm) are progressing well, with performance and yield targets on track for mass production in 2027, the press release noted.

Regarding the progress on backside power delivery solution, TSMC’s Super PowerRail, which is expected to be used in A16 process, targets mass production in 2025. Intel’s PowerVia on its 20A process, on the other hand, is set for production in 2024.

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• [News] Gearing up for Backside Power Delivery: Heated Tech War Between TSMC, Intel, and Samsung

(Photo credit: Samsung)

SK hynix, as the market leader in HBM, targets to begin mass production of its GDDR7 chips in the fourth quarter of 2024, the company said on 13th June.

In the meantime, Micron also announced the launch of its GDDR7 graphics memory at Computex, which is currently being sampled. According to AnandTech, Micron not only plans to start mass production for GDDR7 this year, but also aims to do so early enough for some customers to ship finished products by year-end, with major applications range from AI and gaming to high-performance computing.

Samsung, on the other hand, is the first among the Big Three to present its GDDR7 products. According to its press release, Samsung has completed development of the industry’s first GDDR7 DRAM in July, 2023, a 16-gigabit  product, after its development of the industry’s first 24Gbps GDDR6 DRAM in 2022. According to AnandTech, Samsung is already sampling GDDR7 memory with the aim of launching it in 2024.

According to a report from AnandTech, SK hynix already has sample chips available for partners to test. Currently, the company plans to produce both 16Gbit and 24Gbit chips, with data transfer rates of up to 40 GT/s. As Samsung and Micron both expect to begin with 16Gbit chips running at 32 GT/s for their GDDR7 products, whether SK hynix could win customers’ favor by its faster speed attracts attention, AnandTech noted.

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• [News] SK Hynix Reportedly Raises Prices Again, with DRAM Products to Increase by 15-20%
• [News] New Standard for DDR6 Memory to Come out Soon

(Photo credit: SK hynix)

The upcoming iPhone 16 series from Apple is set to debut in the latter half of the year, and according to a report from Korean media outlet “The Elec,” LG Display, a major panel manufacturer in South Korea, has secured OLED panel orders from Apple for the iPhone 16 Pro Max model, ahead of its rival Samsung.

Earlier in May, both LG Display and Samsung Display secured orders for OLED panels for Apple’s iPhone 16 Pro, according to the report. Subsequently, LG Display also has acquired orders for iPhone 16 Pro Max panels, which could be the first time ever for LG Display to be ahead of Samsung display. 

Reports indicate that LG Display failed to secure the initial batch of orders for OLED panels for the iPhone 15 Pro last year, with the majority of orders going to its competitor Samsung Display. This bolstered Samsung Display’s profitability significantly. However, this year, LG Display has finally regained its footing by securing orders for both the iPhone 16 Pro and iPhone 16 Pro Max models, marking a turnaround in its fortunes.

However, Samsung Display continues to firmly hold orders for OLED panels for the iPhone 16 and iPhone 16 Plus models, while LG Display is responsible only for supplying OLED panels for the higher-end positioned iPhone 16 Pro and iPhone 16 Pro Max models.

Previous revelations from South Korean source yeux1122 also indicated that LG Display holds a higher share than Samsung Display in the supply of OLED screens for Apple’s new iPad Pro.

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• [News] Leak Reveals LGD as the Largest Supplier of Apple’s OLED iPad Pro Screen

(Photo credit: Apple)

Starting from October, 2022, the U.S. has launched a series of export controls, targeting to limit China’s access to advanced semiconductor technologies, while tech giants including Intel, Qualcomm and NVIDIA are not allowed to ship some of their most cutting-edge chips to China. Now a new development seems to emerge, as the White House is said to consider additional restrictions on China’s access to gate-all-around (GAA) transistor technology as well as high-bandwidth memory (HBM), according to reports from Bloomberg and Tom’s hardware.

For now, the Big Three in the semiconductor industry have all announced their roadmaps regarding GAA. TSMC plans to adopt GAAFET (gate-all-around field-effect transistor) in its A16 process (2 nm), targeting for mass production in 2026. Intel aims to implement GAA in its upcoming 20A node, which may enter mass production by 2024. Samsung, on the other hand, is the only company to adopt GAA as early as in its 3nm node.

GAA transistors are crucial for pushing Moore’s Law further. By replacing the vertical fin used in FinFET transistors with a stack of horizontal sheets, the structure could further reduce leakage while increase drive current, which enables better chip performance.

Citing sources familiar with the matter, Bloomberg noted that in March, UK has imposed controls on GAAFET structures, which are typically used for chips manufactured with advanced nodes, and now the U.S. and other allies are expected to follow. The related restrictions are reportedly expected to be implemented as soon as this summer, according to the report, though further details have yet to be confirmed.

Also, it remains unclear whether the ban would restrict China’s ability to develop its own GAA chips or prevent U.S. and other international chipmakers from selling their products to Chinese firms, the report noted.

In addition to GAA, the Bloomberg report also mentioned that there have been preliminary discussions about restricting exports of high-bandwidth memory (HBM) chips. HBM chips, produced by memory giants like SK Hynix, Samsung and Micron, could enhance the performance of AI applications and are utilized by companies such as NVIDIA.

Recently, Huawei successfully mass-produced 7nm chips without using lithography technology. This development has surprised the global semiconductor market and has led to speculation that Huawei may soon also mass-produce 5nm chips. However, Zhang Ping’an, the Chief Executive Officer of Huawei Cloud Services, expressed concern earlier that China, due to US sanctions, is unable to purchase 3.5nm chip equipment.

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• [News] Huawei Reportedly Acknowledges China’s Semiconductor Development May Have Plateaued, Facing Challenges Below 3.5nm
• U.S. Updates Advanced Semiconductor Ban, Actual Impact on the Industry Will Be Insignificant, Says TrendForce

(Photo credit: Intel)