Currently, the issue of low power consumption remains a key concern in the industry. According to a recent report by the International Energy Agency (IEA), given that an average Google search requires 0.3Wh and each request to OpenAI’s ChatGPT consumes 2.9Wh, the 9 billion searches conducted daily would require an additional 10 terawatt-hours (TWh) of electricity annually. Based on the projected sales of AI servers, AI industry might see exponential growth in 2026, with power consumption needs at least ten times that of last year.

Ahmad Bahai, CTO of Texas Instruments, per a previous report from Business Korea, stated that recently, in addition to the cloud, AI services have also shifted to mobile and PC devices, leading to a surge in power consumption, and hence, this will be a hot topic.

In response to market demands, the industry is actively developing semiconductors with lower power consumption. On memory products, the development of LPDDR and related products such as Low Power Compression Attached Memory Module (LPCAMM) is accelerating. These products are particularly suitable for achieving energy conservation in mobile devices with limited battery capacity. Additionally, the expansion of AI applications in server and automotive fields is driving the increased use of LPDDR to reduce power consumption.

In terms of major companies, Micron, Samsung Electronics, and SK Hynix are speeding up the development of the next generation of LPDDR. Recently, Micron announced the launch of Crucial LPCAMM2. Compared to existing modules, this product is 64% smaller and 58% more power-efficient. As a low-power dedicated packaging module that includes several latest LPDDR products (LPDDR5X), it is a type of LPCAMM. LPCAMM was first introduced by Samsung Electronics last year, and it is expected to enjoy significant market growth this year.

Currently, the Joint Electron Device Engineering Council (JEDEC) plans to complete the development of LPDDR6 specifications within this year. According to industry news cited by the Korean media BusinessKorea, LPDDR6 is expected to start commercialization next year. The industry predicts that LPDDR6’s bandwidth may more than double that of previous generation.

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(Photo credit: SK Hynix)

Samsung’s HBM, according to a report from TechNews, has yet to pass certification by GPU giant NVIDIA, causing it to fall behind its competitor SK Hynix. As a result, the head of Samsung’s semiconductor division was replaced. Although Samsung denies any issues with their HBM and emphasizes close collaboration with partners, TechNews, citing market sources, indicates that Samsung has indeed suffered a setback.

Samsung invested early in HBM development and collaborated with NVIDIA on HBM and HBM2, but sales were modest. Eventually, the HBM team, according to TechNews’ report, moved to SK Hynix to develop HBM products. Unexpectedly, the surge in generative AI led to a sharp increase in HBM demand, and SK Hynix, benefitting from the trend, seized the opportunity with the help of the team.

Yet, in response to the rumors about changes in the HBM team, SK Hynix has denied the claims that SK Hynix developed HBM with the help of the Samsung team and also denied the information that Samsung’s HBM team transferred to SK Hynix. SK Hynix further emphasized the fact that SK Hynix’s HBM was developed solely by its own engineers.

Samsung’s misfortune is evident; despite years of effort, they faced setbacks just as the market took off. Samsung must now find alternative ways to catch up. The market still needs Samsung, as noted by Wallace C. Kou, President of memory IC design giant Silicon Motion.

Kou reportedly stated that Samsung remains the largest memory producer, and as NVIDIA faces a supply shortage for AI chips, the GPU giant is keen to cooperate with more suppliers. Therefore, it’s only a matter of time before Samsung supplies HBM to NVIDIA.

Furthermore, Samsung also indicated in a recent statement, addressing that they are conducting HBM tests with multiple partners to ensure quality and reliability.

In the statement, Samsung indicates that it is in the process of optimizing their products through close collaboration with its customers, with testing proceeding smoothly and as planned. As HBM is a customized memory product, it requires optimization processes in line with customers’ needs.

Samsung also states that it is currently partnering closely with various companies to continuously test technology and performance, and to thoroughly verify the quality and performance of its HBM.

On the other hand, NVIDIA has various GPUs adopting HBM3e, including H200, B200, B100, and GB200. Although all of them require HBM3e stacking, their power consumption and heat dissipation requirements differ. Samsung’s HBM3e may be more suitable for H200, B200, and AMD Instinct MI350X.

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• [News] Reasons for Samsung’s HBM Chips Failing Nvidia Tests Revealed, Reportedly Due to Heat and Power Consumption Issues
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(Photo credit: SK Hynix)

Google has reportedly collaborated with TSMC on the upcoming Tensor G5 chip, slated for use in the Pixel 10 series smartphone to be released next year, according to media outlet Android Authority, based on information it spotted in trade databases.

Google has been cooperating with Samsung on its self-developed Tensor processors since 2021, including the Tensor G4 used in the Pixel 9.

The US tech giant’s latest strategic move is reportedly making Tensor G5 the first Google smartphone chip not produced by Samsung.

According to industry insiders cited by the aforementioned report, despite Google’s relatively low smartphone market share, the act would signify TSMC’s leading position in advanced nodes, and is expected to foster closer collaboration between the two companies in the future.

According to the market share data released by Trendforce in March, in 4Q 2023, Apple ranked as 1^st in global smartphone production, with a 23.3% market share, while Samsung (15.9%) and Xiaomi (12.8%) ranked as 2^nd and 3^rd, respectively. Google, on the other hand, has not made it to the top six.

Regarding other major smartphone players’ product roadmaps next year, in addition to Google’s Pixel 10, Apple is also rumored to cooperate with TSMC on the A19 Pro chip in the iPhone 17 Pro and iPhone 17 Pro Max, based on a previous report from Wccftech.

Samsung, on the other hand, is reportedly planning to use its 2nm process on the latest Exynos 2600 chip, which is expected to start mass production in 2025, and be used in the Galaxy S26 series smartphone, according to a previous report by the Korea media outlet ET News.

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(Photo credit: Google)

This May, we have witnessed two different approaches to the new High-NA EUV (high-numerical aperture extreme ultraviolet) lithography equipment between semiconductor giants. Intel has secured the first batch of High-NA EUV kits from ASML, which will allegedly be used on its 18A (1.8nm) and 14A (1.4nm) nodes. On the other hand, TSMC stated that the company will not utilize this new lithography technology in its upcoming A16 (1.6nm) process.

High-NA EUV machines may be critical for companies aiming to produce chips beyond 2nm, but are they must-have?

Looking back in history, the industry used to believe that when the U.S. prevented EUV exports to China, the act would limit China’s progress in 7nm. However, China’s largest foundry, SMIC, is rumored to produce 5-nm chips for Huawei this year, without the need for EUV lithography machines.

When examining TSMC’s trajectory on EUV itself, it is worth mentioning that the company took a more cautious stance, as well. When Samsung began using EUV in its 7nm process in 2018, TSMC successfully launched its first 7nm production line using mature DUV lithography.

It was not until the stability and maturity of EUV had been confirmed that TSMC started to use EUV in its N7+ process, which took place in 2019. In the end, in spite of Samsung’s early adoption of EUV, yield issues allowed TSMC to overtake them.

Similarly, in the race for the 3nm process, unlike Samsung, instead of rushing to adopt GAAFET, TSMC chose the reliable FinFET route.

Will history repeat itself? Now it would be a good timing to examine TSMC’s strategy on High-NA EUV machines.

High-NA EUV technology: A Cure for All?

According to a report by China’s Jiwei, at the recent 2024 North America Technology Symposium hosted by TSMC, the company revealed that its A16 process would not require the next-generation High-NA EUV lithography machines, with mass production expected in 2026.

An expert cited by Jiwei stated that TSMC’s decision might be due to the higher risk associated with High-NA lithography machines.

The report noted that there would be still quite a few challenges to be resolved, such as supporting light sources for photon shot noise and productivity requirements, solutions for the 0.55 NA’s small depth of focus, computational lithography capabilities, mask manufacturing, and computing infrastructure including new materials. Not to mention there is the necessary debugging and development time to ensure stability, which implies considerable time and hidden costs.

On the other hand, TSMC began to adopt EUV in its N7+ process in 2019, implying the world’s largest chipmaker has committed plenty of time and effort to refine the technology.

According to the report by Jiwei, by optimizing the EUV exposure dose and the photoresist used, as well as improving photomask life, increasing yield, and reducing defect rates, TSMC has achieved significant advancements. Today, the number of EUV lithography machines has increased tenfold, while wafer output nowadays is 30 times that of 2019.

Weigh Between Cost and Technology

In addition to potential technology bottlenecks, higher cost may be another problem. Per a report from Bloomberg, TSMC’s Senior Vice President of Business Development and Co-Chief Operating Officer, Dr. Kevin Zhang, remarked that while he appreciates the capabilities of High-NA EUV, he finds its price tag to be unlikeable.

As per the same report from Bloomberg, ASML’s new High-NA EUV machine is priced at EUR 350 million (roughly USD 380 million). Jiwei further stated the unit price may more than double, comparing with the current EUV machines (roughly EUR 170 million).

Market demand would be another major concern. Citing an industry insider, Jiwei analyzed that the cost of manufacturing chips with High-NA lithography machines increases significantly. While more chips can be cut from each wafer, more chips need to be sold to recoup the investment.

The report stated that the smartphone AP chip market alone cannot absorb these cost without the supporting demand of AI chips. However, as China, the largest market for AI, is now being restricted by export control measures from the U.S., the overall market demand remain uncertain.

Adoption Timing for High-NA EUV? TSMC May Not Be in a Hurry

Then what would be the right timing for TSMC to adopt High-NA EUV?

The report by Jimwei took the trajectory of EUV as an example. When the industry generally regarded EUV essential in the 7nm node, TSMC successfully launched its first 7nm production line using mature DUV lithography. This strategy allowed TSMC to avoid the imperfections and high costs of EUV lithography at that time.

TSMC waited until 2019 to start the usage of EUV in its N7+ process when the technology has become mature enough. In the end, in spite of Samsung’s early adoption of EUV, yield issues allowed TSMC to win the favor of clients.

Similarly, in the race for the 3nm process, instead of rushing to adopt GAAFET, TSMC chose the reliable FinFET route. Despite Samsung’s early lead with 3nm, their low yields and repeated delays enabled TSMC to surpass them.

TSMC’s previously announced roadmap indicates that the 1.4nm A14 process is expected to be introduced between 2027 and 2028, while the development of the 1nm A10 process is projected to be completed before 2030. The report by Jiwei suggested that TSMC might consider using the next-generation lithography machine only after the 1nm process is in place, potentially adopting the High-NA EUV system around 2029 to 2030.

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• [News] How Costly is the High-NA EUV? TSMC Reportedly Shocked, Considering Not Using the Equipment in its A16 Nodes
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(Photo credit: ASML)

According to a report from CNA, the South Korean government has announced a comprehensive support plan for the semiconductor industry, amounting to KRW 26 trillion (roughly USD 19 billion). The plan includes substantial financial support, expansion of semiconductor parks, infrastructure development, and investment in R&D and talent cultivation, aimed at revitalizing the economy and improving livelihoods.

Reportedly, South Korean President Yoon Suk Yeol chaired the second economic review meeting, where this semiconductor industry support plan was unveiled. The centerpiece of the plan is a KRW 17 trillion financial support program provided by the Industrial Bank of Korea, designed to alleviate potential funding challenges that companies may face when constructing new factories, production lines, and equipment.

The tax reduction incentives, originally set to expire this year, is said to be extended, allowing semiconductor companies to partially offset their R&D and equipment investment costs against income taxes. Yoon stated that the Tax reduction incentives encourage companies to expand their investments, benefiting not only the companies themselves but also creating more quality job opportunities.

He emphasized that over 70% of the support will be directed towards small and medium-sized enterprises (SMEs), rather than just large corporations. Yoon further expressed that as the economy grows, tax cuts will actually generate more tax revenue.

Additionally, a KRW 1 trillion semiconductor ecosystem fund will be established to support smaller semiconductor SMEs with specialized technologies in wafer design, materials, components, and equipment, helping them to become world-class enterprises.

President Yoon also instructed to expedite the construction of semiconductor mega-parks and pledged cooperation with various government agencies to accelerate the resolution of infrastructure needs such as electricity, water, and external roads for the industry.

Particularly concerning the critical issue of power supply affecting yield rates, the government will intensify communication with the parliament to expedite the passage of a special law regarding grid use, which can significantly shorten the construction time for power transmission lines.

Investments in infrastructure are expected to exceed KRW 2.5 trillion, with the construction time for industrial parks projected to be reduced from 7 years to 3.5 years. Additionally, there is a plan to allocate KRW 5 trillion for manpower development from 2025 to 2027, a significant increase from the KRW 3 trillion allocated from 2022 to 2024.

President Yoon pointed out that the future success of the semiconductor industry hinges on system semiconductors, which account for two-thirds of the overall market.

Therefore, the government must collaborate with businesses to propose groundbreaking initiatives to enhance the competitiveness of system semiconductors, ensuring a dominant position in the international market. This comprehensive support plan is expected to be formally implemented shortly after finalization, potentially as early as mid-June.

As per a report from the Korean media outlet TheElec, a semiconductor fund initially planned at 300 billion won has been expanded to KRW 1.1 trillion. The original 7-year construction plan for the semiconductor cluster will be halved, according to South Korea’s Deputy Prime Minister Choi Sang-mok.

The remaining portion of the KRW 26 trillion investment will reportedly be dedicated to fostering researchers in the semiconductor field. South Korean chipmakers Samsung and SK Hynix welcomed the announcement, emphasizing the need for ongoing government support.

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(Photo credit: Samsung)