South Korean media Businesskorea reports that Samsung Electronics Co. has postponed the production schedule for its new semiconductor plant in Taylor, Texas to 2025.

Citing a report from Seoul Economic Daily, Siyoung Choi, the President of Samsung’s semiconductor foundry business, mentioned during a speech in San Francisco that Samsung’s new Tyler Plant – with investment of USD 17 billion – is now expected to commence production in 2025.

Samsung’s initial projection, announced in 2021 when the investment plan was disclosed, had anticipated the Taylor plant to start its mass production in the second half of 2024.

Even before the news of Samsung’s Taylor plant production delay, TSMC’s Arizona fab, “Fab 21,” had already decided to postpone its mass production to 2025 due to tool-in and various labor-related issues.

Reportedly, the delays in production schedules for both TSMC and Samsung indicate that the new semiconductor fab of these two companies will not enter mass production until 2025.

As per the report, industry sources point out that issues such as environmental permit challenges and slow progress in government subsidy policies are major obstacles hindering the development of semiconductor projects in the United States.

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(Photo credit: Samsung)

After more than two years of stagnation in the memory market, which was exacerbated by production cuts from major players like Samsung and Micron earlier this year, the issue of overstock has finally seen improvement.

As per Nikkei’s report, this has driven an increase in prices for DRAM, marking the first such occurrence in nearly two and a half years. Observers are optimistic that the memory market will hit bottom this year, with a recovery and growth expected in 2024.

According to TrendForce’s data, the contract price for the DDR4 8GB, considered a benchmark product for DRAM, reached USD 1.50 in October, a 15.4% increase from September and the first increase since July 2021. The contract price for the same product continued to rise in November by 10%, reaching USD 1.65.

In addition to the DDR4 8GB product, other specifications of DRAM contract prices generally experienced monthly increases of around 10% in October this year. Generally, memory contract prices are determined collaboratively by chip suppliers and corporate customers, and an increase in contract prices signifies an advantage for suppliers.

There are signs of a bottoming out and rebound in the DRAM market in the third quarter of this year. TrendForce indicated that the global DRAM market’s revenue increased by 18% compared to the previous quarter, reaching USD 13.48 billion.

This growth, reportedly, is primarily attributed to production cuts by major suppliers throughout the year, gradually restoring balance to the market supply and demand.

The report also reflects on the pandemic period, noting that the global surge in remote work initially led to a sharp increase in demand for memory. However, as the pandemic gradually subsided in 2021, market demand cooled.

Additionally, persistent challenges such as high inflation and interest rates impacting consumer spending weakened demand for PCs and various consumer electronic devices. This, in turn, led to global oversupply in memory, causing prices to decline consistently.

Major DRAM manufacturers, including Samsung, SK Hynix, and Micron, have been reducing production since the beginning of this year, and they have recently managed to reverse the downturn.

Samsung reported a 16% revenue growth in the third quarter, while SK Hynix achieved an impressive growth rate of 34.4%. Despite a decline in average selling prices, Micron’s third-quarter chip shipment growth contributed to an overall revenue growth of 4.2%.

Moreover, the global NAND Flash market saw a 2.9% sequential increase in revenue in the third quarter, and a growth rate of 20% is anticipated for the fourth quarter, according to TrendForce’s latest research.

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• [Insights] Due to Year-End Sluggish Demand, Spot Prices Hover for DRAM and NAND Flash
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(Photo credit: Samsung)

Samsung Electronics and South Korean internet giant Naver have joined forces to invest in an artificial intelligence semiconductor solution. According to BusinessKorea’s report, the energy efficiency of the first solution chip from the two companies is expected to be roughly eight times higher than competitors like NVIDIA H100.

This new solution is based on a Field-Programmable Gate Array (FPGA) customized for Naver’s HyperCLOVA X large language model.

Samsung and Naver began their collaboration at the end of 2022, utilizing Samsung’s advanced process technology, expertise in memory technologies like computational storage, processing-in-memory (PIM) and processing-near-memory (PNM), as well as Compute Express Link (CXL). Naver’s strengths in software and AI algorithms are also leveraged in this collaboration.

Samsung has already produced and sold various types of memory and storage technologies for AI applications, including SmartSSD, HBM-PIM, and memory expansion modules with CXL interfaces, all crucial for the upcoming AI chips.

“Through our collaboration with NAVER, we will develop cutting-edge semiconductor solutions to solve the memory bottleneck in large-scale AI systems,” said Jinman Han, Executive Vice President of Memory Global Sales & Marketing at Samsung Electronics.

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• [News] Memory Market Gradually Recovering, Samsung and SK Hynix Raise Q4 Financial Outlook
• [News] Memory Giants Samsung & Micron Actively Embrace DDR5 and HBM as Favorable Choices

(Photo credit: Samsung)

Following TSMC’s first plant built in Japan’s Kumamoto Prefecture, Samsung has also chosen Yokohama as the location for its new facility in Japan.

According to Japanese media NHK’s report, South Korean Samsung Electronics has decided the establishment of a new semiconductor research and development center in Yokohama, Japan. with a total investment of JPY 40 billion (approximately USD 278 million).

The Japanese government is set to provide half of the total subsidy for this investment. The project is expected to commence next year and will focus on the research and development of advanced packaging.

Additionally, Samsung plans to hire around 100 local engineers in Japan and is cautiously evaluating the possibility of collaboration with Japanese research organizations.

NHK, citing sources, reported that Japanese Prime Minister Kishida Fumio plans to announce this expanded investment in Japan soon.

Given the continuous competition between China and the United States in the semiconductor sector, the calls for strengthening the domestic semiconductor supply chain in Japan have grown louder.

Consequently, the Japanese government has been encouraging foreign chipmakers to establish a presence in Japan, aiming to reinforce domestic supply chains.

As of May this year, Kishida Fumio met with seven semiconductor giants, including Intel, Samsung, Micron, and TSMC. The meeting demonstrated a commitment to revitalize Japan’s semiconductor industry. At that time, rumors about Japan providing subsidies to Samsung already existed, sparking market discussions.

(Photo credit: Samsung)

Intel CEO Pat Gelsinger has discussed around Intel’s process status, comparisons with TSMC in a recent interview. According to Barron’s report, Gelsinger mentioned in the interview that Intel’s 18A process and TSMC’s N2 process seem comparable, with no significant advantage for either of them.

However, Gelsinger claimed that, ‘But the backside power delivery, everybody says Intel, score.’ He further stated, ‘it gives better area efficiency for silicon, which means lower cost. It gives better power delivery, which means higher performance.’

Gelsinger mentioned that good transistor and great power delivery make 18A a little bit ahead of N2. Besides, TSMC has given a very high-cost envelope, where Intel can fit underneath to be margin accretive.

In fact, not only TSMC and Intel, but also including Samsung, the three semiconductor manufacturing giants are actively positioning themselves in the increasingly competitive field of advanced process technology.

At the recent IEEE International Electron Devices Meeting (IEDM), Intel, TSMC, and Samsung each showcased their CFET (Complementary FET) transistor solutions. The stacked CFET transistor architecture involves stacking two types of transistor -nFETs and pFETs- together, aiming to replace Gate-All-Around (GAA) and become the next-generation transistor design for doubling density.

As reported by IEEE Spectrum, Intel was the first foundry to showcase the CFET solution, publicly unveiling an early version back in 2020. During the conference, Intel introduced one of the simplest circuits manufactured with CFET, focusing on improvements for an inverter.

The CMOS inverter sends the same input voltage to the gates of two-transistor stacked together, generating an output that is logically opposite to the input, and the inverter is completed on a single fin.

Intel also improved the CFET stack’s electrical characteristics by increasing the number of nanosheets per device from two to three, decreasing the separation between the two devices from 50 nm to 30 nm.

According to the current progress, experts, as indicated by IEEE Spectrum, anticipate that the commercialization of CFET technology on a large scale will likely take another 7 to 10 years from now. Before reaching that stage, there are still many preparatory tasks that need to be completed.

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• [News] PC Industry Shifts with Intel’s Propel on AI PC, Benefiting Upstream Companies like TSMC
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(Photo credit: Intel)