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As reported by UDN News, Samsung Electronics is making a significant move by increasing the prices of NAND Flash memory by 20% every quarter until the second quarter of 2024. This price surge exceeds industry expectations.
Within the semiconductor industry, Samsung initially raised NAND wafer prices by 10% to 20% this quarter, Pulse reported. Now, the company has decided to continue this trend by progressively increasing prices by 20% during the first and second quarters of the next year. This strategic decision reflects Samsung’s determination to stabilize NAND wafer prices with the aim of reversing the market’s direction in the first half of the upcoming year.
Based on TrendForce’s research in October, with NAND wafer prices leading the increase since August and suppliers adopting a firmer stance in negotiations, Q4 enterprise SSD contract prices are projected to rise by approximately 5~10%. Meanwhile, reduced production of mainstream processes and fewer suppliers for high-end client SSDs have endowed suppliers with better bargaining power. Consequently, both high-end and low-end products are expected to increase concurrently, with 4Q23 PC client SSD contract prices projected to rise by 8~13%.
TrendForce also reports that Q4 contract prices for mobile DRAM are poised to see an increased quarterly rise of 13–18%. But that’s not all—NAND Flash is also joining the party, with contract prices of eMMC and UFS expected to climb by approximately 10–15% in the same quarter. This quarter is set to star mobile DRAM, traditionally the underperformer in profit margins compared to its DRAM counterparts, as it takes the lead in this round of price increases.
TrendForce foresees that memory prices are expected to continue trending upward in 1Q24. The rate of increase will depend on whether suppliers maintain a conservative production strategy and whether there is enough consumer demand to bolster the market.
Samsung’s Strategy on NAND Affect the Market and Company Performance
Following the latest financial report, NAND is a staple memory chip alongside DRAM, and together they account for around half of Samsung Electronics’ memory chip sales. In conjunction with the aggressive price hikes, Samsung is also curbing production to manage market supply effectively, promoting a positive market environment, and enhancing profitability.
At a recent financial conference on October 31st, Kim Jae-jun, Vice President of Samsung Eletronics, publicly stated, “There will be selective production adjustments to normalize inventories in a short time. A supply cut will be larger for NAND flash than for DRAM.”
Financial analysts estimate that as memory production cuts take effect and prices rise, Samsung’s operations will see a significant improvement starting from the fourth quarter of this year.
NAND Industry Foresee Bright Future amid Memory Price Surge
NAND-related businesses in Taiwan are also optimistic about the industry’s future. Khein Seng Pua, CEO of Phison Electronics Corp, indicated that the adjustment of OEM customer inventories, spanning the past six to nine months, is nearly complete. Consequently, Phison has secured more design-in projects, resulting in a gradual increase in wafer demand. Furthermore, Phison’s controller IC products have advanced into a new process generation, leading to a rise in value-added custom development projects.
Simon Chen, Chairman and CEO of ADATA, anticipates a prolonged period of rising memory prices, starting from the fourth quarter of this year and continuing into the first half of the next year. This is expected to create a two-year era of prosperity in the memory market, with supply shortages predicted in the coming years.
Industry experts highlight the reinvigoration of the NAND wafer market, with customers progressively returning. Samsung, being the global memory chip leader, is spearheading the price hikes, thereby contributing to a favorable pricing trend across the overall market.
(Image: Samsung)
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In recent developments, Samsung Foundry, a subsidiary of Samsung Electronics, has disclosed that it has initiated discussions with major chip clients, gearing up to provide services utilizing 1.4nm and 2nm processes.
It’s been said that Samsung being ahead in the production of 3nm GAA (gate-all-around) process, yet not as favored by major clients as TSMC. In response to the comment, Ki-tae Jeong, the CTO of Samsung Foundry, had share his insights at Semiconductor Expo 2023 in South Korea.
According to the Chosun Ilboon’s report, Jeong pointed out that in the semiconductor foundry industry, it typically takes approximately 3 years for major clients to make their final purchasing decisions. Samsung is actively engaging with prominent clients, and results may become evident in the coming years. Also, the company is currently discussing future processes such as 2nm and 1.4nm with major clients.
How are advanced semiconductor processes progressing?
Compared to mature processes, advanced processes are better suited for applications that demand high performance and low power consumption. With emerging technologies like AI and high-performance computing driving the industry, the demand for advanced processes continues to rise. Leading semiconductor companies are committed to developing new technologies, with chip advanced processes evolving from 5nm to 4nm and now down to 3nm, while looking ahead to the possibility of reaching 2nm and 1.4nm.
Current progress from major players:
Samsung
Samsung has already commenced mass production of its second-generation 3nm chips and aims to introduce the 2nm process by the end of 2025, with the 1.4nm process expected by the end of 2027.
TSMC
TSMC is planning to start production for N3P in the latter half of 2024, with N3X and the 2nm process set to enter mass production in 2025. TSMC will introduce Gate-all-around FETs (GAAFET) transistors for the first time at the 2nm process node, offering a 15% speed increase at the same power consumption and up to a 30% reduction in power consumption at the same speed, all while increasing chip density by more than 15%.
Intel
Intel is diligently pursuing its “Four Years, Five Nodes” plan. Presently, Intel 7 and Intel 4 are in mass production, and the Intel 3 process is expected to enter the readiness for production stage in the latter half of this year. Subsequently, Intel 20A and 18A processes are planned to enter the readiness for production stage in the first and second halves of 2024, respectively.
Moreover, industry experts believe that in the near term, Intel will focus on the Intel 3 process as its flagship offering in the advanced process semiconductor foundry sector to compete with TSMC, Samsung, and other players.
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As the leading global supplier of NAND memory, Samsung is embarking on an ambitious journey to enhance its V-NAND technology, also known as 3D NAND. Early in this week, Samsung has officially declared its commitment to commence mass production of the 9th generation V-NAND memory, featuring an astonishing 300+ layers, by 2024. This achievement will establish a new industry record for the highest number of active layers, solidifying Samsung’s industry leadership.
In a blog post on Samsung Electronics, Jung-Bae Lee, President and Head of Samsung Electronics’ Memory Business, stated, “The ninth-generation V-NAND is well under way for mass production early next year with the industry’s highest layer count based on a double-stack structure.”
Samsung was diligently working on the 9th generation V-NAND back in August this year, preserving the double-stacked technology they first introduced in 2020. Not only is Samsung confirming the trajectory of their next-gen non-volatile memory technology, but it also surpasses competitors by boasting more active layers. It’s been disclosed that SK Hynix’s upcoming 3D NAND will have 321 active layers, Samsung is set to surpass this number.
Jung-Bae Lee further elaborated, “Samsung is also working on the next generation of value-creating technologies, including a new structure that maximizes V-NAND’s input/output (I/O) speed.”
While precise performance details of Samsung’s 9th generation V-NAND remain undisclosed, it will power their upcoming SSDs. In the near future, it is anticipated that Samsung will introduce retail SSDs with the PCIe Gen5 interface, in line with the Samsung 990 Pro series.
Regarding long-term technological advancement, Samsung is committed to minimizing interference between units, reducing device dimensions, and maximizing the count of vertical layers. These innovative strides are clearing the path for Samsung to achieve the industry’s most compact unit size. These endeavors will propel Samsung toward their ambitious goal of developing over 1,000 layers of 3D NAND and distinctive memory solutions, ensuring the continued relevance of their products for data centers, personal computers, and a wide range of applications.
(Image: Samsung)
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According to a report from South Korean media ETNEWS, Samsung Electronics has appointed former Onsemi director Stephen Hong as Vice President to oversee the SiC (Silicon Carbide) power semiconductor business. They’ve also set up an internal department dedicated to SiC power semiconductors.
Stephen Hong, an expert in power semiconductors with around 25 years of experience at major global companies like Infineon, Fairchild, and Onsemi, is leading this effort after joining Samsung.
Stephen Hong is currently in the process of assembling a team for SiC commercialization, while actively engaging with South Korea’s power semiconductor industry ecosystem and academic institutions for market and business feasibility studies. It’s noteworthy that when Samsung officially ventured into the GaN (Gallium Nitride) business, it had also formed relevant business teams in advance.
It’s expected that Stephen Hong will be pivotal in devising the direction and strategies for Samsung’s SiC power semiconductor business. In addition, Samsung Electronics has commenced comprehensive preparations for the GaN power semiconductor business. Samsung’s commitment to this endeavor is underlined by its decision to acquire Aixtron’s latest MOCVD equipment, specifically for processing GaN and SiC wafers. This investment is estimated to be at least 700-800 billion Korean won, roughly equivalent to 0.54-0.62 billion US dollars.
Although Samsung’s third-generation semiconductor foundry business is expected to launch in 2025, it is currently in the research and sample stage, necessitating significant investments in equipment to support future mass production endeavors.
In accordance with TrendForce’s analysis, the global SiC power device market is projected to reach $2.28 billion in 2023, with a notable YoY growth of 41.4%. It is expected to expand to $5.33 billion by 2026.
Samsung made a strategic shift by planning to produce GaN and SiC semiconductors on 8-inch wafers, deviating from the common 6-inch approach and gaining industry attention. The increased focus on SiC aligns with the challenges faced by its wafer foundry business, where fluctuations in fab utilization rates significantly impact financial performance.
According to the most recent research from TrendForce, there’s an expectation that Samsung’s utilization rate for its 8-inch wafer fabrication facility could drop to 50% in 2024. This decline is largely due to a worldwide reduction in semiconductor demand, compounded by geopolitical factors, creating a tough business environment that has affected Samsung’s order volume.
As the demand for SiC and GaN power semiconductors continues to rise and Samsung confronts challenges in its Si wafer business, the company, along with competitors like DB Hitek and Key Foundry, is gearing up to launch 8-inch GaN foundry services. This strategic move is anticipated to come to fruition between 2025 and 2026.
In response to these multifaceted dynamics, Samsung has taken an accelerated approach to GaN and SiC, with the aim of capturing a more substantial market share and breathing new life into its traditional wafer foundry business.
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(Image: Samsung)
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Driven by emerging technologies like AI and high-performance computing, the semiconductor foundry industry increasingly emphasizes the importance of advanced manufacturing processes. Recently, the industry has seen significant developments. Intel announced that it has commenced large-scale production of its Intel 4 process node, while TSMC and Samsung are equally committed to advancing their advanced process technologies.
Intel’s Mass Production of Intel 4 Process Node
On October 15th, Intel China’s official public account revealed that Intel has initiated large-scale production of the Intel 4 process node using Extreme Ultraviolet Lithography (EUV) technology. According to Intel, they are making significant progress with their “Four Years, Five Nodes” plan. This plan aims to produce next-generation products that meet the computational demands driven by AI’s role in the “Siliconomy.”
Being the first process node produced by Intel using EUV lithography technology, Intel 4 offers substantial improvements in performance, efficiency, and transistor density compared to its predecessors. Intel 4 was unveiled at the Intel Innovation 2023 held in September this year.
In comparison to Intel 7, Intel 4 achieves a 2x reduction in area, providing high-performance computing (HPC) logic libraries and incorporating various innovative features.
In detail, Intel 4 simplifies the EUV lithography process, optimizing it for high-performance computing applications, supporting both low voltage (<0.65V) and high voltage (>1.1V) operations. Compared to Intel 7, Intel 4 boasts more than a 20% improvement in iso-power performance, and high-density Metal-Insulator-Metal (MIM) capacitors deliver outstanding power supply performance.
Intel’s “Four Years, Five Nodes” plan is advancing with the following process updates:
Intel 7 and Intel 4 are currently in large-scale production. Intel 3 is on track to meet its planned target by the end of 2023.
Intel’s Intel 20A and Intel 18A, which use Ribbon FET all-around gate transistors and PowerVia backside power delivery technology, are also progressing well, with a target of 2024. Intel will soon introduce the Intel 18A process design kit (PDK) for Intel Foundry Services (IFS) customers.
With the adoption of Intel 4 process nodes, the Intel Core i9 Ultra processor, codenamed “Meteor Lake,” will be released on December 14th this year, ushering in the AIPC era.
On Intel 3 process nodes, the energy-efficient E-core Sierra Forest processor will be launched in the first half of 2024, and the high-performance P-core Granite Rapids processor will follow closely.
Samsung’s 2nm Process Detailed Production Plan
Samsung has already commenced production of its second-generation 3nm chips and plans to continue focusing on 2nm chips.
On June 28th, Samsung Electronics unveiled its latest foundry technology innovations and business strategies at the 7th Samsung Foundry Forum (SFF) in 2023.
In the era of artificial intelligence, Samsung’s foundry program, based on advanced GAA process technology, offers robust support for customers in AI applications. To this end, Samsung has disclosed a detailed production plan and performance levels for its 2nm process. The plan is to achieve mass production for mobile applications by 2025 and respectively expand to HPC and automotive electronics in 2026 and 2027.
Samsung reports that the 2nm process (SF2) improves performance by 12% compared to the 3nm process (SF3), increases efficiency by 25%, and reduces the area by 5%.
Furthermore, reports indicated that Samsung is ensuring the production capacity for products using the next-generation EUV lithography machine, High-NA, in September. This equipment is expected to have a prototype by the end of this year and officially enter production next year.
TSMC’s Mass Production of 2nm by 2025
This year, TSMC has unveiled its latest advanced semiconductor manufacturing roadmap in various locations, including Santa Clara, California, and Taiwan. The roadmap covers a range of processes from 3nm to 2nm.
TSMC’s current roadmap for 3nm includes N3, N3E, N3P, N3X, and N3 AE, with N3 serving as the foundational version, N3E as an enhanced version with further cost optimization, N3P focusing on improved performance with a planned start in the second half of 2024, N3X targeting high-performance computing devices with a mass production goal in 2025, and N3 AE designed specifically for the automotive sector, offering greater reliability and the potential to shorten time-to-market by 2-3 years.
In the 2nm realm, TSMC is planning to achieve mass production of the N2 process by 2025. TSMC has reported that the N2 process will offer a 15% speed improvement over N3E at the same power or a 30% reduction in power consumption, with a 15% increase in transistor density. In September, media reports revealed that TSMC has formed a task force to accelerate 2nm pilot production and mass production, aiming for risk production next year and official mass production in 2025.
To ensure the smooth development of 2nm process technology, TSMC has initiated efforts in the upstream equipment sector. On September 12th, TSMC announced the acquisition of a 10% stake in IMS Nanofabrication, a subsidiary of Intel, for a price not exceeding $432.8 million. IMS specializes in the research and production of electron beam lithography machines, which find extensive applications in semiconductor manufacturing, optical component manufacturing, MEMS manufacturing, and more. The industry sees TSMC’s IMS acquisition as vital for developing crucial equipment and meeting the demand for 2nm process commercialization.
(Image: Intel)