Insights
In recent years, with the rise of AI and 5G technologies leading to increasing computational demands, Silicon Photonics technology has once again become a focal point of discussion in the semiconductor industry.
TrendForce Perspective:
Since the development of the semiconductor industry, the industry’s trajectory has largely followed the development predicted by Gordon Moore – roughly doubling the number of transistors that can be accommodated on an integrated circuit approximately every two years. However, as chip sizes continue to shrink, chip architecture design is gradually being challenged. Semiconductor manufacturers, including TSMC, Samsung, and Intel, are striving to break through Moore’s Law as their goal. Others have publicly announced their focus on mature processes (the industry divides at 7nm, with 7nm and below considered advanced processes) and optimization of existing technologies.
However, even as manufacturers push the boundaries of Moore’s Law, leading to increased transistor density per unit area, signal loss issues inevitably arise during signal transmission since chips rely on electricity to transmit signals. Despite the increased transistor count, power consumption problems persist. Silicon Photonics technology, which replaces electrical signals with optical signals for high-speed data transmission, successfully overcomes this challenge, achieving higher bandwidth and faster data processing. With this approach, chips do not need to cram more transistors per unit area or pursue smaller nanometers and nodes. Instead, they can achieve higher integration and performance on existing processes, further advancing technology.
Currently, Silicon Photonics technology still faces various challenges, including alignment and coupling, thermal management, modulation and detection, expansion and integration, among others. Significant breakthroughs are unlikely in the short term, and major global manufacturers are still in the early development stages. In Taiwan, recent reports suggest that TSMC is actively venturing into Silicon Photonics technology. While TSMC has not officially confirmed this news, during the Silicon Photonics International Forum, a senior vice president from TSMC clearly stated, “If a good Silicon Photonics integration system can be provided, it can address the key issues of energy efficiency and AI computing power. This could be a Paradigm Shift, and we might be at the beginning of a new era.”
This suggests that TSMC is optimistic about the development of Silicon Photonics technology. Although Taiwanese companies have not formally announced their entry into the Silicon Photonics field, it is expected that with the explosive growth in demand for data transmission, storage, and computing driven by AI technology, Silicon Photonics will undoubtedly be a critical technology for future semiconductor development.
Press Releases
TrendForce’s latest insights reveal that by 2023, shipments of foldable smartphones could skyrocket to an impressive 18.3 million units, marking a 43% YoY surge. However, this only captures a slim 1.6% of the year’s total smartphone market. Fast forward to 2024, and we’re looking at another leap—a 38% growth, translating to a hefty 25.2 million units and nudging the market share up to 2.2% Looking at the medium to long term, TrendForce believes the expansion of the foldable smartphone market is inevitable. By 2027, shipments could soar to a whopping 70 million units, seizing around 5% of the global smartphone market.
The driving force behind the foldable market’s expansion? Reduced costs and the expansion strategies of Chinese brands. TrendForce posits that as the cost of components plummets—especially panel and hinge expenses—the stage is set for foldable phone prices to potentially slide below the US$1,000 threshold. This shift would undeniably spur consumer interest and purchase intent.
Branding paints its own picture. This year, Samsung once again led the pack, with projections pointing toward a robust 12.5 million unit shipment. But there’s a twist. Its stronghold, a staggering 82% market share in 2022, slipped to 68%. Why? It’s because of the surging tidal wave of foldables from Chinese contenders. Huawei clinched the runner-up spot, estimated to have dispatched around 2.5 million foldables for a respectable 14% of the market share. Hot on their heels were OPPO and Xiaomi, with market shares of 5% and 4%, respectively. Other brands have each snagged less than 4%.
Pandemic repercussions echo here too. TrendForce sheds light on the fact that Chinese foldable brands, impacted by recent global events, have mostly kept their eyes on home turf, eschewing aggressive overseas expansion. However, if these brands pivot and ramp up their global sales game, they might just turbocharge the foldable market’s growth trajectory.
And then, there’s Apple—the enigmatic juggernaut. To date, Apple’s foray into foldables has been tepid, to say the least. This restraint has undoubtedly doused consumer fervor for foldable. Yet, true to form, Apple’s unwavering obsession with user experience could be the culprit. Persistent challenges with foldable tech—think panel evenness and hinge design—might be holding them back. But here’s the kicker: Achieving perfection with larger foldable panels is somewhat simpler than their smaller counterparts. Could this mean Apple might leapfrog right into medium-sized foldable products—like laptops or tablets? Only time will tell.
For more information on reports and market data from TrendForce’s Department of Display Research, please click here, or email Ms. Grace Li from the Sales Department at graceli@trendforce.com
(Photo credit: Samsung)
News
According to the news from ChinaTimes, Qualcomm announced on the 11th that it has reached a three-year agreement with Apple to supply 5G communication chips for Apple’s smartphones from 2024 to 2026. This also implies that Apple’s efforts to develop its own 5G modem chips may fall through, and the contract manufacturer TSMC stands to benefit the most.
Qualcomm did not disclose the value of this deal but mentioned that the terms of the agreement are similar to previous ones. Previous supply agreements have been highly profitable for Qualcomm but costly for Apple. According to UBS estimates from last month, Qualcomm’s sales of modem chips to Apple in the previous fiscal year amounted to $7.26 billion, accounting for approximately 16% of the company’s revenue.
This also highlights that Apple’s progress in developing modem chips may not be as expected, leading to a delay in their use in their flagship smartphones. Currently, Apple’s iPhones use 5G modem chips from Qualcomm.
Only a few companies worldwide have the capability to produce communication chips, including Qualcomm, MediaTek, and Samsung. In 2019, Apple acquired Intel’s smartphone modem business for $1 billion, along with 2,200 employees and a series of patents. Intel faced difficulties in developing 5G modem chips, resulting in annual losses of around $1 billion.
The market expects Apple to gradually reduce its reliance on third-party chip suppliers. Qualcomm originally estimated that by 2023, their 5G chips would make up only 20% of iPhones. However, Qualcomm’s CFO stated in November of the previous year that “most” of Apple’s phones in 2023 would contain their chips.
News
According to Taiwan’s TechNews report, Lu Donghui, Chairman of Micron Technology Taiwan, stated that in response to the growing demand in the AI market, Micron Technology Taiwan will continue to invest in advanced processes and packaging technologies to produce High Bandwidth Memory (HBM) products. Micron Technology Taiwan is the only Micron facility globally with advanced packaging capabilities.
Lu Donghui, speaking at a media event, mentioned that Micron had previously introduced the industry’s first 8-layer stack (8-High) 24GB HBM3 Gen 2 product, which is now in the sampling phase. This product boasts a bandwidth exceeding 1.2TB/s and a transmission rate exceeding 9.2Gb/s, which is 50% higher than other HBM3 solutions on the market. Micron’s HBM3 Gen 2 product offers 2.5 times better energy efficiency per watt compared to previous generations, making it ideal for high-performance AI applications.
Micron’s HBM3 Gen 2 memory products are manufactured using the most advanced 1-beta process technology in Taiwan and Japan. Compared to the previous 1-alpha process, the 1-beta process reduces power consumption by approximately 15% and increases bit density by over 35%, with each chip offering a capacity of up to 16Gb. Through Micron’s advanced packaging technology, the 1-beta process memory chips are stacked in 8 layers, and the complete HBM3 Gen 2 chips are packaged and sent to customers’ specified semiconductor foundries like TSMC, Intel, Samsung, or third-party packaging and testing facilities for GPUs, CPUs.
Lu Donghui highlighted that Taiwan’s robust semiconductor manufacturing ecosystem makes it the exclusive hub for Micron’s advanced packaging development worldwide. By combining this ecosystem with Micron’s offerings, they can provide customers with comprehensive solutions to meet market demands. While HBM products represent a relatively small portion of the overall memory market, their future growth potential is significant, with expectations to capture around 10% of the entire memory market in the short term.
(Photo credit: Micron)
News
Semiconductor process technology is nearing the boundaries of known physics. In order to continually enhance processor performance, the integration of small chips (chiplets) and heterogeneous Integration has become a prevailing trend. It is also regarded as a primary solution for extending Moore’s Law. Major industry players such as TSMC, Intel, Samsung, and others are vigorously developing these related technologies.
What are SoC, SiP, and Chiplet?
To understand Chiplet technology, we must first clarify two commonly used terms: SoC and SiP. SoC (System on Chip) involves redesigning multiple different chips to utilize the same manufacturing process and integrating them onto a single chip. On the other hand, SiP (System in Package) connects multiple chips with different manufacturing processes using heterogeneous integration techniques and integrates them within a single packaging form.
Chiplet technology employs advanced packaging techniques to create a SiP composed of multiple small chips. It integrates small chips with different functions onto a single substrate through advanced packaging techniques. While Chiplets and SiPs may seem similar, Chiplets are essentially chips themselves, whereas SiP refers to the packaging form. They have differences in functionality and purpose.
Chiplets: Today’s Semiconductor Development Trend
The design concept of Chiplet technology offers several advantages over SoC, notably in significantly improving chip manufacturing yield. As chip sizes increase to enhance performance, chip yield decreases due to the larger surface area. Chiplet technology can integrate various smaller chips with relatively high manufacturing yields, thus enhancing chip performance and yield.
Furthermore, Chiplet technology contributes to reduced design complexity and costs. Through heterogeneous integration, Chiplets can combine various types of small chips, reducing integration challenges in the initial design phase and facilitating design and testing. Additionally, since different Chiplets can be independently optimized, the final integrated product often achieves better overall performance.
Chiplets have the potential to lower wafer manufacturing costs. Apart from CPUs and GPUs, other units within chips can perform well without relying on advanced processes. Chiplets enable different functional small chips to use the most suitable manufacturing process, contributing to cost reduction.
With the evolution of semiconductor processes, chip design has become more challenging and complex, leading to rising design costs. In this context, Chiplet technology, which simplifies design and manufacturing processes, effectively enhances chip performance, and extends Moore’s Law, holds significant promise.
Applications and Development of Chiplets
In recent years, global semiconductor giants like AMD, TSMC, Intel, NVIDIA, and others have recognized the market potential in this field, intensively investing in Chiplet technology. For example, AMD’s recent products have benefited from the ‘SiP + Chiplet’ manufacturing approach. Moreover, Apple’s M1 Ultra chip achieved high performance through a customed UltraFusion packaging architecture. In academia, institutions like the University of California, Georgia Tech, and European research organizations have begun researching interconnect interfaces, packaging, and applications related to Chiplet technology.
In conclusion, due to Chiplet technology’s ability to lower design costs, reduce development time, enhance design flexibility and yield, while expanding chip functionality, it is an indispensable solution in the ongoing development of high-performance chips.
This article is from TechNews, a collaborative media partner of TrendForce.