As per a report from Korea Economic Daily citing unnamed sources on July 15th, Samsung Electronics is preparing to mass-produce the logic die for HBM4 using its advanced 4nm process.

The logic die, situated at the bottom of the chip stack, is a core component of HBM. Memory manufacturers are already capable of producing logic dies for existing products like HBM3e. However, regarding HBM4, the sixth-generation model, with its custom features demanded by customers, requires additional wafer processing steps.

Reportedly, Samsung’s 4nm process, which boasts is said boasting a yield rate exceeding 70%, is one of their flagship technologies. This advanced process is also used in producing the Exynos 2400 processor for their flagship AI smartphone, the Galaxy S24.

An industry source cited by the report further stated that the 4nm process is much costlier than the 7nm and 8nm but significantly better in terms of chip performance and power consumption. Reportedly, Samsung, which manufactures HBM3e with the 10nm process, is looking to take the throne in the HBM sector by applying the 4nm process.

On the other hand, SK Hynix announced its collaboration with TSMC in April 2024. In a statement released on April 19th, SK Hynix stated that the two semiconductor giants will collaborate on developing the 6th generation HBM4 chips, with production scheduled for 2026.

The same report from the Korean Economic Daily also addressed that, Samsung has reportedly deployed employees from its System LSI division to the newly established HBM research team. In response to Samsung’s actions, SK Hynix and TSMC have decided to add the 5nm process in addition to the originally planned 12nm process for producing the logic die of HBM4.

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(Photo credit: Samsung)

As top memory giants and AI chip companies all gear up for the combat of next-gen high bandwidth memory (HBM), JEDEC, the leader in the development of standards for the microelectronics industry, revealed the preliminary specifications of HBM4 last week. According to its press release and a report from Wccftech, HBM4 is poised to deliver substantial memory capacities, with densities up to 32Gb in 16-Hi stacks.

According to JEDEC, HBM4 aims to boost data processing rates while preserving key features such as higher bandwidth, reduced power consumption, and increased capacity per die or stack, which are crucial traits for applications that demand efficient management of large datasets and complex calculations, such as generative AI, high-performance computing, high-end graphics cards, and servers.

According to JEDEC’s preliminary specifications, HBM4 is anticipated to feature a “doubled channel count per stack” compared to HBM3, which indicates a higher utilization area, leading to significantly enhanced performance. It is also worth noting that in order to support device compatibility, the new standard ensures that a single controller can work with both HBM3 and HBM4.

JEDEC notes that HBM4 will specify 24 Gb and 32 Gb layers, offering support for TSV stacks ranging from 4-high to 16-high. The committee has initially agreed on speed bins up to 6.4 Gbps, with ongoing discussions for higher frequencies.

Interestingly enough, JEDEC did not specify how HBM4 integrates memory and logic semiconductors into a single package, which would be one of the major challenges the industry has been eagerly trying to solve.

Earlier in June, NVIDIA announced its next-gen Rubin GPU, targeting to be released in 2026, will feature 8 HBM4, while its Rubin Ultra GPU will come with 12 HBM4 chips.

The roadmaps for memory giants on HBM4 is generally in accordance with NVIDIA’s product pipeline. Samsung, for instance, is said to be developing a large-capacity HBM4 memory with a single stack capacity of 48GB, which is expected to enter production in 2025.

The current HBM market leader, SK hynix, on the other hand, has collaborated with TSMC on the development and production of HBM4, scheduled for mass production in 2026.

Micron has also disclosed its next-generation HBM memory, tentatively named HBM Next. It is expected that HBM Next will offer capacities of 36GB and 64GB, available in various configurations.

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(Photo credit: SK hynix)

The semiconductor industry, driven by AI, is entering a new upward cycle. According to a forecast report from SEMI, after the trough in 2023, the total sales of equipment in 2024 will hit a new high, with growth momentum continuing into 2025. Among this trend, per a report from Commercial Times, major companies including TSMC, Intel, Samsung, SK hynix, and Micron are all actively preparing, with plans to continue increasing capital expenditure next year in preparation for the AI era.

TSMC and Intel are the most proactive foundries. Intel plans to increase its capital expenditure by 2% in 2024, reaching USD 26.2 billion; TSMC’s capital expenditure for this year is expected to be between USD 28 billion and USD 32 billion.

The same report further cited sources, indicating that TSMC’s capital expenditure this year will reach the upper end of the estimated range. Next year, the upper limit is expected to increase by another USD 5 billion to USD 37 billion, potentially reaching the second-highest level in its history.

It’s reported that customer demand for TSMC’s 2nm process capacity has exceeded expectations. In addition to Apple securing the first batch of TSMC’s 2nm capacity, non-Apple customers are also actively planning for advanced processes. TSMC continues to advance its goal of mass production of the 2nm process by next year.

Another source cited by Commercial Times reveals that TSMC accelerated equipment orders in the second quarter and further increased momentum in the third quarter, primarily to ensure the smooth launch of the 2nm process by mid-next year.

In the HBM sector, Samsung and SK hynix are reportedly raising funds to prepare for significant production expansion in 2025.  A report from Korean media outlet Korea Economic Daily (KED) indicated that Samsung Electronics and SK hynix are considering applying for loans from the Korea Development Bank, with planned loan amounts of KRW 5 trillion (roughly USD 3.6 billion) and KRW 3 trillion (roughly USD 2.2 billion), respectively.

Micron’s capital expenditure plan for the 2024 fiscal year is about USD 8 billion. In the fourth quarter of the 2024 fiscal year, Micron will spend approximately USD 3 billion on fab construction and new wafer fab equipment (WFE). For the 2025 fiscal year, Micron plans to significantly increase its capital expenditure, targeting 30% of its revenue, or about USD 12 billion. Earlier, Micron’s Chief Operating Officer, Manish Bhatia, stated that the scale of the HBM business is expected to expand to several billion dollars in the 2025 fiscal year.

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(Photo credit: Micron)

According to a report from BusinessKorea, memory giant SK hynix is deepening its collaboration with TSMC and NVIDIA, and will announce a closer partnership at the Semicon Taiwan exhibition in September.

SK hynix has been collaborating with TSMC for many years. In 2022, TSMC announced the establishment of the OIP 3DFabric Alliance at its North America Technology Symposium, incorporating partners in memory and packaging.

At that time, Kangwook Lee, Senior Vice President and PKG Development Lead at SK hynix, revealed that the company has been closely working with TSMC on previous generations and current high-bandwidth memory (HBM) technologies, supporting compatibility with the CoWoS process and HBM interconnectivity.

After joining the 3DFabric Alliance, SK hynix reportedly plans to deepen its collaboration with TSMC to develop solutions for the next generation of HBM, looking to achieve innovations in system-level products.

SK hynix President, Justin Kim, is reportedly said to be delivering a keynote speech at the International Semiconductor Exhibition in Taipei in September, marking SK hynix’s first participation in such a keynote address. Following the speech, Kim will engage in discussions with senior executives from TSMC, possibly including NVIDIA CEO Jensen Huang, to discuss collaborative plans for the next generation of HBM. This move is expected to further solidify the trilateral alliance between SK hynix, TSMC, and NVIDIA.

Notably, the collaboration among the three giants was hinted in the first half of this year. On April 25th, SK Group Chairman Chey Tae-won traveled to Silicon Valley to meet with NVIDIA CEO Jensen Huang, potentially related to these strategies.

Reportedly, SK hynix will adopt TSMC’s logic process to manufacture the base die for HBM (High Bandwidth Memory). Reports indicate that SK hynix and TSMC have agreed to collaborate on the development and production of HBM4, scheduled for mass production in 2026.

HBM stacks core chips vertically on the base die, which are interconnected. While SK hynix currently produces HBM3e using its own process for the base die, it will switch to TSMC’s advanced logic process for HBM4. The same report further suggested that SK hynix will highlight achievements at forums, including achieving more than a 20% reduction in power consumption compared to initial targets for HBM4.

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(Photo credit: SK hynix)

According to a report from Commercial Times, SK Hynix, Samsung, and Micron, the world’s top three memory manufacturers, are actively investing in high-bandwidth memory (HBM) capacity expansion plans. Industry sources cited by the same report estimate that by 2025, the additional production will reach approximately 276,000 units, bringing the total capacity to 540,000 units, an annual increase of 105%.

Regarding the latest developments in HBM, TrendForce indicates that HBM3e will become the market mainstream this year, with shipments concentrated in the second half of the year.

Currently, SK Hynix remains the primary supplier for HBM, along with Micron, both utilizing 1beta nm processes and already shipping to NVIDIA. Samsung, using a 1alpha nm process, is expected to complete qualification in the second quarter and begin deliveries mid-year.

Regarding major memory players’ expansion plans on HBM, Samsung is gradually upgrading its Pyeongtaek facilities (P1L, P2L, and P3L) in South Korea to be used for DDR5 and HBM. Meanwhile, the Hwaseong facilities (Line 13, 15, and 17) are being upgraded to the 1α process, retaining only a small portion of capacity at the 1y/1z process to meet the demands of specialized industries such as aerospace.

SK Hynix produces HBM at its M16 production line in Icheon, South Korea, and is upgrading its M14 production line to the 1α/1β process to supply DDR5 and HBM products. Additionally, after receiving clearance from the U.S. government, its Wuxi plant in China is actively upgrading from the 1y/1z process to the 1z/1α process for producing DDR4 and DDR5 products.

Micron’s HBM production is conducted at its Hiroshima plant in Japan, with capacity expected to increase to 25,000 units in the fourth quarter of this year. In the long term, Micron plans to introduce EUV processes (1γ, 1δ) and build a new cleanroom.

In the short term, Micron will utilize its production capacities at the Linkou and Taichung plants in Taiwan, increasing the proportion of 1β process. By the end of 2025, the total production for HBM is expected to reach around 60,000 units.

According to Commercial Times, the HBM production volume of the world’s top three manufacturers will maintain high growth for two consecutive years, with the global total wafer production volume expected to reach approximately 540,000 units per month by the end of 2025.

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• [News] Samsung Establishes New HBM Team to Advance HBM3, HBM3e and HBM4 Development
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(Photo credit: SK Hynix)