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SK hynix, the current High Bandwidth Memory (HBM) market leader, announced on August 6th that it has signed a non-binding preliminary memorandum of terms with the U.S. Department of Commerce to receive up to USD 450 million in proposed direct funding and access to proposed loans of USD 500 million as part of the CHIPS and Science Act. The funding, according to its press release, will be used to build a production base for semiconductor packaging in Indiana.
Earlier in April, the other two memory giants, Samsung and Micron, have secured funds under the CHIPS and Science Act as well, receiving USD 6.4 billion and USD 6.1 billion, respectively.
SK hynix also noted in its press release that it plans to seek from the U.S. Department of the Treasury a tax benefit equivalent of up to 25% of the qualified capital expenditures through the Investment Tax Credit program.
The South Korean memory chip maker also said that it will proceed with the construction of the Indiana production base as planned to provide AI memory products. Through this, it looks forward to contributing to build a more resilient supply chain of the global semiconductor industry.
The signing follows SK hynix’s announcement in April that it plans to invest USD 3.87 billion to build a production base for advanced packaging in Indiana in a move expected to create around 1,000 jobs. According to a previous report by The Wall Street Journal, the advanced packaging fab it is expected to commence operations by 2028.
As the major HBM supplier of AI giant NVIDIA, SK hynix has good reason to accelerate the pace of capacity expansion. The recent NVIDIA Blackwell B200, with each GPU utilizing 8 HBM3e chips, has also underscored SK hynix’s role in the critical components supply chain for the AI industry.
On the other hand, a week earlier, semiconductor equipment leader Applied Materials was said to be rejected for funding under the CHIPS act for a R&D center in Silicon Valley, which targets to develop next-generation chipmaking tools. It has tried to gain U.S. funding for a USD 4 billion facility in Sunnyvale, California, which was slated to be completed in 2026.
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(Photo credit: SK hynix)
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Per a report from Reuters, Intel is said to be receiving the second new High-NA EUV equipment from ASML, costing EUR 350 million (~USD 383 million).
According to Intel’s earnings call on August 1, CEO Pat Gelsinger stated that Intel began receiving the first large equipment in December, and the installation process would take several months, which is expected to bring about a new generation of more powerful computer chip.
Gelsinger noted during the call that the second High-NA equipment is about to enter the facility in Oregon. Due to the poor stock performance following Intel’s earnings report, this statement did not attract much attention.
Previously, a senior executive from ASML once mentioned in July that the company already begun shipping the second High NA equipment to an unnamed customer, but would only record revenue for the first set this year. However, there are still some uncertainties regarding when the customer will adopt this equipment.
ASML has already received orders for over ten High-NA equipment from customers including TSMC, Samsung, Intel, Micron, and SK Hynix. Intel plans to use this technology for mass production by 2027, and TSMC is also set to receive the equipment this year, the time to put into production has not been disclosed, though.
ASML executive Christophe Fouquet stated on July 17 that DRAM memory chip manufacturers, which could refer to Samsung, SK Hynix, or Micron, are expected to start using High-NA equipment by 2025 or 2026.
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(Photo credit: ASML)
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As the battle of HBM intensifies between memory giants, the competition of NAND is also heating up. According to a report by Korean media outlet etnews, SK hynix is developing 400-layer NAND flash memory, aiming to get the technology ready for mass production by the end of 2025.
Citing sources familiar with the matter, the report notes that SK hynix is currently working with supply chain partners to develop process technologies and equipment needed for 400-layer and above NANDs. As the company plans to apply hybrid bonding to achieve the breakthrough, many packaging materials and components suppliers are expected to enter the new supply chain.
According to the report, SK hynix is reviewing new materials for bonding and various technologies for connecting different wafers, including polishing, etching, deposition, and wiring. With the goal of getting the technology and infrastructure ready by the end of next year, full-scale production for the 400-layer NAND is anticipated to begin in the first half of 2026.
Currently, the Big Three in the memory sector are all trying to push the boundaries on the layers of NAND. Earlier in April, Samsung confirmed that it has begun mass production for its one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), with the number of layers reaching 290. For now, the company aims to stack V-NAND to over 1000 layers by 2030.
Micron, on the other hand, has announced the 2650 client SSD, its first product built from 276-layer 3D NAND on July 30th. Japanese memory chipmaker Kioxia, after successfully increasing the number of 3D NAND layers to 218 in 2023, even stated that achieving a 1,000-layer level by 2027 would be possible.
In August, 2023, SK hynix showcased its sample of the world’s first 321-layer NAND product. Now, as the limit is expected to be pushed up to 400 layers, the company plans to apply hybrid bonding to the manufacturing, which adopts a “wafer-to-wafer” (W2W) structure, etnews notes.
According to the report, until now, SK hynix has been stacking cells on top of the peripherals, the driving circuit area, using the method of “Peripheral Under Cell (PUC)” to manufacture NAND. The structure is similar to a mixed-use high-rise apartment where the peripheral (commercial space) is at the bottom and the cells (residential units) are stacked on top.
However, as the number of NAND layers increases, the peripheral is prone to be damaged during the cell stacking process due to the high heat and pressure generated during the cell process, the report explains.
Therefore, SK hynix plans to apply hybrid bonding to overcome the issues. By implementing cells and peripherals on separate wafers and then bonding the two wafers together, the method allows the peripheral wafer that drive the cells to be separately manufactured, thus enabling a stable increase in NAND layers.
Regarding the progress on the development of 400-layer NAND, SK hynix stated that it cannot confirm details about its technology development or mass production timeline, the report notes.
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(Photo credit: SK hynix)
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Samsung Electronics, which has been surround by concerns that its HBM3e products are still struggling to pass NVIDIA’s qualifications, has confirmed in its second quarter earnings call that the company’s fifth-generation 8-layer HBM3e is currently undergoing customer valuation, and is scheduled to enter mass production in the third quarter, according to a report by Business Korea.
TrendForce notes that Samsung’s recent progress on HBM3e qualification seems to be solid, and we can soon expect both 8hi and 12hi to be qualified in the near future. The company is eager to gain higher HBM market share from SK hynix so its 1alpha capacity has reserved for HBM3e. TrendForce believes that Samsung is going to be a very important supplier on HBM category.
Driven by the momentum, the report from Business Korea, citing an official speaking at the conference call on July 31st, states that the share of HBM3e chips within Samsung’s HBMs is anticipated to surpass the mid-10 percent range in the third quarter. Moreover, it is projected to speedily grow to 60% by the fourth quarter.
According to Samsung, its HBM sales in the second quarter already grew by around 50% from the previous quarter. Being ambitious about its HBM3 and HBM3e sales, Samsung projects its HBM sales will increase three to five times in the second half of 2024, driven by a steep rise of about two times each quarter.
Samsung has already taken a big leap on HBM as its HBM3 chips are said to have been cleared by NVIDIA last week. According to a previous report by Reuters, Samsung’s HBM3 will initially be used exclusively in the AI giant’s H20, which is tailored for the Chinese market.
On the other hand, the South Korean memory giant notes that it has completed the preparations for volume production of its 12-layer HBM3e chips. The company plans to expand the supply in the second half of 2024 to meet the schedules requested by multiple customers, according to Business Korea. The progress of its sixth-generation HBM4 is also on track, scheduled to begin shipping in the second half of 2025, Business Korea notes.
Samsung Electronics reported higher-than-expected financial results in the second quarter, with a six-fold year-on-year increase in net income, soaring from KRW 1.55 trillion won (USD 1.12 billion) to KRW 9.64 trillion (USD 6.96 billion), as demand for its advanced memory chips that are crucial for AI training remained strong.
SK hynix, as the current HBM market leader, has expressed its optimism in securing the throne as well. The company reportedly expects its HBM3e shipments to surpass those of HBM3 in the third quarter, with HBM3e accounting for more than half of the total HBM shipments in 2024. In addition, it expects to begin supplying 12-layer HBM3e products to customers in the fourth quarter.
Micron, on the other hand, has reportedly started mass production of 8-layer HBM3e as early as in February. The company reportedly plans to complete preparations for mass production of 12-layer HBM3e in the second half and supply it to major customers like NVIDIA in 2025.
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(Photo credit: Samsung)
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According to a report from Bloomberg, the US is reportedly considering new measures and could unilaterally impose restrictions on China as early as late August. These measures would limit China’s access to AI memory and related equipment capable of producing them.
Moreover, another report from Reuters further indicates that US allies, including semiconductor equipment manufacturers from Japan, the Netherlands, and South Korea—such as major Dutch semiconductor equipment maker ASML and Tokyo Electron—will not be affected in their shipments. The report also notes that countries whose exports will be impacted include Israel, Taiwan, Singapore, and Malaysia.
Bloomberg, citing sources, revealed that the purpose of these measures is to prevent major memory manufacturers like Micron, SK hynix, and Samsung Electronics from selling high-bandwidth memory (HBM) to China.
These three companies dominate the global HBM market. Reportedly, regarding this matter, Micron declined to comment, while Samsung and SK hynix did not immediately respond to requests for comment.
Bloomberg’s source also emphasized that the US has yet made a final decision. The source also state that if implemented, the new measures would cover chips such as HBM2, HBM3, and HBM3e, as well as the equipment needed to manufacture these chips.
The source further revealed that Micron will essentially not be affected by the new regulations, as Micron stopped exporting HBM to China after China banned Micron’s memory from being used in critical infrastructure in 2023.
Reportedly, it is still unclear what methods the US will use to restrict South Korean companies. One possibility is the Foreign Direct Product Rule (FDPR). Under this rule, if a foreign-made product uses any US technology, even just a small amount, the US can impose restrictions.
Both SK hynix and Samsung are said to be relying on chip design software and equipment from US companies such as Cadence Design Systems and Applied Materials.
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(Photo credit: SK hynix)